mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-21 11:29:17 +07:00
drm/amdgpu: get_fw_version isn't ASIC specific
Method of getting firmware version is the same across ASICs, so remove them from ASIC-specific files and create one in amdgpu_amdkfd.c. This new created get_fw_version simply reads fw_version from adev->gfx than parsing the ucode header. Signed-off-by: Amber Lin <Amber.Lin@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
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a1b11201af
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0da8b10e36
@ -335,6 +335,43 @@ void amdgpu_amdkfd_free_gtt_mem(struct kgd_dev *kgd, void *mem_obj)
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amdgpu_bo_unref(&(bo));
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}
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uint32_t amdgpu_amdkfd_get_fw_version(struct kgd_dev *kgd,
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enum kgd_engine_type type)
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{
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struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
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switch (type) {
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case KGD_ENGINE_PFP:
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return adev->gfx.pfp_fw_version;
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case KGD_ENGINE_ME:
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return adev->gfx.me_fw_version;
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case KGD_ENGINE_CE:
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return adev->gfx.ce_fw_version;
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case KGD_ENGINE_MEC1:
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return adev->gfx.mec_fw_version;
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case KGD_ENGINE_MEC2:
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return adev->gfx.mec2_fw_version;
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case KGD_ENGINE_RLC:
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return adev->gfx.rlc_fw_version;
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case KGD_ENGINE_SDMA1:
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return adev->sdma.instance[0].fw_version;
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case KGD_ENGINE_SDMA2:
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return adev->sdma.instance[1].fw_version;
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default:
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return 0;
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}
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return 0;
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}
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void amdgpu_amdkfd_get_local_mem_info(struct kgd_dev *kgd,
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struct kfd_local_mem_info *mem_info)
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{
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@ -81,6 +81,18 @@ struct amdgpu_kfd_dev {
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uint64_t vram_used;
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};
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enum kgd_engine_type {
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KGD_ENGINE_PFP = 1,
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KGD_ENGINE_ME,
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KGD_ENGINE_CE,
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KGD_ENGINE_MEC1,
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KGD_ENGINE_MEC2,
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KGD_ENGINE_RLC,
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KGD_ENGINE_SDMA1,
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KGD_ENGINE_SDMA2,
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KGD_ENGINE_MAX
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};
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struct amdgpu_amdkfd_fence *amdgpu_amdkfd_fence_create(u64 context,
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struct mm_struct *mm);
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bool amdkfd_fence_check_mm(struct dma_fence *f, struct mm_struct *mm);
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@ -142,6 +154,8 @@ int amdgpu_amdkfd_alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
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void **mem_obj, uint64_t *gpu_addr,
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void **cpu_ptr, bool mqd_gfx9);
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void amdgpu_amdkfd_free_gtt_mem(struct kgd_dev *kgd, void *mem_obj);
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uint32_t amdgpu_amdkfd_get_fw_version(struct kgd_dev *kgd,
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enum kgd_engine_type type);
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void amdgpu_amdkfd_get_local_mem_info(struct kgd_dev *kgd,
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struct kfd_local_mem_info *mem_info);
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uint64_t amdgpu_amdkfd_get_gpu_clock_counter(struct kgd_dev *kgd);
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@ -22,14 +22,12 @@
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#include <linux/fdtable.h>
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#include <linux/uaccess.h>
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#include <linux/firmware.h>
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#include <linux/mmu_context.h>
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#include <drm/drmP.h>
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#include "amdgpu.h"
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#include "amdgpu_amdkfd.h"
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#include "cikd.h"
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#include "cik_sdma.h"
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#include "amdgpu_ucode.h"
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#include "gfx_v7_0.h"
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#include "gca/gfx_7_2_d.h"
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#include "gca/gfx_7_2_enum.h"
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@ -139,7 +137,6 @@ static bool get_atc_vmid_pasid_mapping_valid(struct kgd_dev *kgd, uint8_t vmid);
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static uint16_t get_atc_vmid_pasid_mapping_pasid(struct kgd_dev *kgd,
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uint8_t vmid);
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static uint16_t get_fw_version(struct kgd_dev *kgd, enum kgd_engine_type type);
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static void set_scratch_backing_va(struct kgd_dev *kgd,
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uint64_t va, uint32_t vmid);
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static void set_vm_context_page_table_base(struct kgd_dev *kgd, uint32_t vmid,
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@ -191,7 +188,6 @@ static const struct kfd2kgd_calls kfd2kgd = {
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.address_watch_get_offset = kgd_address_watch_get_offset,
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.get_atc_vmid_pasid_mapping_pasid = get_atc_vmid_pasid_mapping_pasid,
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.get_atc_vmid_pasid_mapping_valid = get_atc_vmid_pasid_mapping_valid,
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.get_fw_version = get_fw_version,
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.set_scratch_backing_va = set_scratch_backing_va,
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.get_tile_config = get_tile_config,
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.set_vm_context_page_table_base = set_vm_context_page_table_base,
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@ -792,63 +788,6 @@ static void set_scratch_backing_va(struct kgd_dev *kgd,
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unlock_srbm(kgd);
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}
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static uint16_t get_fw_version(struct kgd_dev *kgd, enum kgd_engine_type type)
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{
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struct amdgpu_device *adev = (struct amdgpu_device *) kgd;
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const union amdgpu_firmware_header *hdr;
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switch (type) {
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case KGD_ENGINE_PFP:
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hdr = (const union amdgpu_firmware_header *)
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adev->gfx.pfp_fw->data;
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break;
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case KGD_ENGINE_ME:
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hdr = (const union amdgpu_firmware_header *)
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adev->gfx.me_fw->data;
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break;
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case KGD_ENGINE_CE:
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hdr = (const union amdgpu_firmware_header *)
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adev->gfx.ce_fw->data;
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break;
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case KGD_ENGINE_MEC1:
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hdr = (const union amdgpu_firmware_header *)
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adev->gfx.mec_fw->data;
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break;
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case KGD_ENGINE_MEC2:
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hdr = (const union amdgpu_firmware_header *)
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adev->gfx.mec2_fw->data;
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break;
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case KGD_ENGINE_RLC:
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hdr = (const union amdgpu_firmware_header *)
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adev->gfx.rlc_fw->data;
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break;
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case KGD_ENGINE_SDMA1:
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hdr = (const union amdgpu_firmware_header *)
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adev->sdma.instance[0].fw->data;
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break;
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case KGD_ENGINE_SDMA2:
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hdr = (const union amdgpu_firmware_header *)
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adev->sdma.instance[1].fw->data;
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break;
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default:
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return 0;
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}
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if (hdr == NULL)
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return 0;
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/* Only 12 bit in use*/
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return hdr->common.ucode_version;
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}
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static void set_vm_context_page_table_base(struct kgd_dev *kgd, uint32_t vmid,
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uint64_t page_table_base)
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{
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@ -23,12 +23,10 @@
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#include <linux/module.h>
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#include <linux/fdtable.h>
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#include <linux/uaccess.h>
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#include <linux/firmware.h>
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#include <linux/mmu_context.h>
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#include <drm/drmP.h>
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#include "amdgpu.h"
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#include "amdgpu_amdkfd.h"
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#include "amdgpu_ucode.h"
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#include "gfx_v8_0.h"
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#include "gca/gfx_8_0_sh_mask.h"
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#include "gca/gfx_8_0_d.h"
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@ -95,7 +93,6 @@ static bool get_atc_vmid_pasid_mapping_valid(struct kgd_dev *kgd,
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uint8_t vmid);
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static uint16_t get_atc_vmid_pasid_mapping_pasid(struct kgd_dev *kgd,
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uint8_t vmid);
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static uint16_t get_fw_version(struct kgd_dev *kgd, enum kgd_engine_type type);
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static void set_scratch_backing_va(struct kgd_dev *kgd,
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uint64_t va, uint32_t vmid);
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static void set_vm_context_page_table_base(struct kgd_dev *kgd, uint32_t vmid,
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@ -148,7 +145,6 @@ static const struct kfd2kgd_calls kfd2kgd = {
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get_atc_vmid_pasid_mapping_pasid,
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.get_atc_vmid_pasid_mapping_valid =
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get_atc_vmid_pasid_mapping_valid,
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.get_fw_version = get_fw_version,
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.set_scratch_backing_va = set_scratch_backing_va,
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.get_tile_config = get_tile_config,
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.set_vm_context_page_table_base = set_vm_context_page_table_base,
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@ -751,63 +747,6 @@ static void set_scratch_backing_va(struct kgd_dev *kgd,
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unlock_srbm(kgd);
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}
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static uint16_t get_fw_version(struct kgd_dev *kgd, enum kgd_engine_type type)
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{
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struct amdgpu_device *adev = (struct amdgpu_device *) kgd;
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const union amdgpu_firmware_header *hdr;
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switch (type) {
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case KGD_ENGINE_PFP:
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hdr = (const union amdgpu_firmware_header *)
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adev->gfx.pfp_fw->data;
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break;
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case KGD_ENGINE_ME:
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hdr = (const union amdgpu_firmware_header *)
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adev->gfx.me_fw->data;
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break;
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case KGD_ENGINE_CE:
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hdr = (const union amdgpu_firmware_header *)
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adev->gfx.ce_fw->data;
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break;
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case KGD_ENGINE_MEC1:
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hdr = (const union amdgpu_firmware_header *)
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adev->gfx.mec_fw->data;
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break;
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case KGD_ENGINE_MEC2:
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hdr = (const union amdgpu_firmware_header *)
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adev->gfx.mec2_fw->data;
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break;
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case KGD_ENGINE_RLC:
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hdr = (const union amdgpu_firmware_header *)
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adev->gfx.rlc_fw->data;
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break;
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case KGD_ENGINE_SDMA1:
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hdr = (const union amdgpu_firmware_header *)
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adev->sdma.instance[0].fw->data;
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break;
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case KGD_ENGINE_SDMA2:
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hdr = (const union amdgpu_firmware_header *)
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adev->sdma.instance[1].fw->data;
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break;
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default:
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return 0;
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}
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if (hdr == NULL)
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return 0;
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/* Only 12 bit in use*/
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return hdr->common.ucode_version;
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}
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static void set_vm_context_page_table_base(struct kgd_dev *kgd, uint32_t vmid,
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uint64_t page_table_base)
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{
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@ -25,12 +25,10 @@
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#include <linux/module.h>
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#include <linux/fdtable.h>
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#include <linux/uaccess.h>
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#include <linux/firmware.h>
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#include <linux/mmu_context.h>
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#include <drm/drmP.h>
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#include "amdgpu.h"
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#include "amdgpu_amdkfd.h"
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#include "amdgpu_ucode.h"
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#include "soc15_hw_ip.h"
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#include "gc/gc_9_0_offset.h"
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#include "gc/gc_9_0_sh_mask.h"
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@ -111,7 +109,6 @@ static uint16_t get_atc_vmid_pasid_mapping_pasid(struct kgd_dev *kgd,
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uint8_t vmid);
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static void set_vm_context_page_table_base(struct kgd_dev *kgd, uint32_t vmid,
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uint64_t page_table_base);
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static uint16_t get_fw_version(struct kgd_dev *kgd, enum kgd_engine_type type);
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static void set_scratch_backing_va(struct kgd_dev *kgd,
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uint64_t va, uint32_t vmid);
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static int invalidate_tlbs(struct kgd_dev *kgd, uint16_t pasid);
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@ -158,7 +155,6 @@ static const struct kfd2kgd_calls kfd2kgd = {
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get_atc_vmid_pasid_mapping_pasid,
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.get_atc_vmid_pasid_mapping_valid =
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get_atc_vmid_pasid_mapping_valid,
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.get_fw_version = get_fw_version,
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.set_scratch_backing_va = set_scratch_backing_va,
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.get_tile_config = amdgpu_amdkfd_get_tile_config,
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.set_vm_context_page_table_base = set_vm_context_page_table_base,
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@ -874,56 +870,6 @@ static void set_scratch_backing_va(struct kgd_dev *kgd,
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*/
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}
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/* FIXME: Does this need to be ASIC-specific code? */
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static uint16_t get_fw_version(struct kgd_dev *kgd, enum kgd_engine_type type)
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{
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struct amdgpu_device *adev = (struct amdgpu_device *) kgd;
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const union amdgpu_firmware_header *hdr;
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switch (type) {
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case KGD_ENGINE_PFP:
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hdr = (const union amdgpu_firmware_header *)adev->gfx.pfp_fw->data;
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break;
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case KGD_ENGINE_ME:
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hdr = (const union amdgpu_firmware_header *)adev->gfx.me_fw->data;
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break;
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case KGD_ENGINE_CE:
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hdr = (const union amdgpu_firmware_header *)adev->gfx.ce_fw->data;
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break;
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case KGD_ENGINE_MEC1:
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hdr = (const union amdgpu_firmware_header *)adev->gfx.mec_fw->data;
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break;
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case KGD_ENGINE_MEC2:
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hdr = (const union amdgpu_firmware_header *)adev->gfx.mec2_fw->data;
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break;
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case KGD_ENGINE_RLC:
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hdr = (const union amdgpu_firmware_header *)adev->gfx.rlc_fw->data;
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break;
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case KGD_ENGINE_SDMA1:
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hdr = (const union amdgpu_firmware_header *)adev->sdma.instance[0].fw->data;
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break;
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case KGD_ENGINE_SDMA2:
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hdr = (const union amdgpu_firmware_header *)adev->sdma.instance[1].fw->data;
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break;
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default:
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return 0;
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}
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if (hdr == NULL)
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return 0;
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/* Only 12 bit in use*/
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return hdr->common.ucode_version;
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}
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static void set_vm_context_page_table_base(struct kgd_dev *kgd, uint32_t vmid,
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uint64_t page_table_base)
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{
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@ -493,9 +493,9 @@ bool kgd2kfd_device_init(struct kfd_dev *kfd,
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{
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unsigned int size;
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kfd->mec_fw_version = kfd->kfd2kgd->get_fw_version(kfd->kgd,
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kfd->mec_fw_version = amdgpu_amdkfd_get_fw_version(kfd->kgd,
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KGD_ENGINE_MEC1);
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kfd->sdma_fw_version = kfd->kfd2kgd->get_fw_version(kfd->kgd,
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kfd->sdma_fw_version = amdgpu_amdkfd_get_fw_version(kfd->kgd,
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KGD_ENGINE_SDMA1);
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kfd->shared_resources = *gpu_resources;
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@ -85,18 +85,6 @@ enum kgd_memory_pool {
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KGD_POOL_FRAMEBUFFER = 3,
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};
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enum kgd_engine_type {
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KGD_ENGINE_PFP = 1,
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KGD_ENGINE_ME,
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KGD_ENGINE_CE,
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KGD_ENGINE_MEC1,
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KGD_ENGINE_MEC2,
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KGD_ENGINE_RLC,
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KGD_ENGINE_SDMA1,
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KGD_ENGINE_SDMA2,
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KGD_ENGINE_MAX
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};
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/**
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* enum kfd_sched_policy
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*
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@ -230,8 +218,6 @@ struct tile_config {
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* @hqd_sdma_destroy: Destructs and preempts the SDMA queue assigned to that
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* SDMA hqd slot.
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*
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* @get_fw_version: Returns FW versions from the header
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*
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* @set_scratch_backing_va: Sets VA for scratch backing memory of a VMID.
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* Only used for no cp scheduling mode
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*
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@ -311,8 +297,6 @@ struct kfd2kgd_calls {
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struct kgd_dev *kgd,
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uint8_t vmid);
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uint16_t (*get_fw_version)(struct kgd_dev *kgd,
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enum kgd_engine_type type);
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void (*set_scratch_backing_va)(struct kgd_dev *kgd,
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uint64_t va, uint32_t vmid);
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int (*get_tile_config)(struct kgd_dev *kgd, struct tile_config *config);
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