Commit Graph

694522 Commits

Author SHA1 Message Date
Charlene Liu
035e0fe548 drm/amd/display: adding FCLK and DPPCLK clock types
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:23:11 -04:00
Mario Kleiner
00d7930c51 drm/amd/display: Prevent premature pageflip when comitting in vblank. (v3)
Make sure we do not program a hw pageflip inside vblank 'n' iff the
atomic flip is comitted while inside the same vblank 'n'. We must
defer such a flip by one refresh cycle to vblank 'n+1', unless this
is a DRM_MODE_PAGE_FLIP_ASYNC async pageflip, which must always
execute as soon as possible.

Without this, pageflips programmed via X11 GLX_OML_sync_control extensions
glXSwapBuffersMscOML(..., target_msc, ...); call and/or via DRI3/Present
PresentPixmap(..., target_msc, ...); request will complete one vblank
too early whenever target_msc > current_msc + 1, ie. more than 1 vblank
in the future. In such a case, the call of the pageflip ioctl() would be
triggered by a queued drmWaitVblank() vblank event, which itself gets
dispatched inside the vblank one frame before the target_msc vblank.

Testing with this patch does no longer show any problems with
OML_sync_control swap scheduling or flip completion timestamps.
Tested on R9 380 Tonga.

v2: Add acked/r-b by Harry and Michel.
v3: Feedback from Andrey: Must not wait an extra frame for
    DRM_MODE_PAGE_FLIP_ASYNC flips.

Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Acked-by: Harry Wentland <harry.wentland@amd.com> (v1)
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>

Cc: Harry Wentland <Harry.Wentland@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:23:05 -04:00
Mario Kleiner
753c66c91b drm/amd/display: Fix race between vblank irq and pageflip irq. (v2)
Since DC now uses CRTC_VERTICAL_INTERRUPT0 as VBLANK irq trigger
and vblank interrupts actually happen earliest at start of vblank,
instead of a bit before vblank, we no longer need some of the
fudging logic to deal with too early vblank irq handling (grep for
lb_vblank_lead_lines). This itself fixes a pageflip scheduling
bug in DC, caused by uninitialized  use of lb_vblank_lead_lines,
with a wrong startup value of 0. Thanks to the new vblank irq
trigger this value of zero is now actually correct for DC :).

A new problem is that vblank irq's race against pflip irq's,
and as both can fire at first line of vblank, it is no longer
guaranteed that vblank irq handling (therefore -> drm_handle_vblank()
-> drm_update_vblank_count()) executes before pflip irq handling
for a given vblank interval when a pageflip completes. Therefore
the vblank count and timestamps emitted to user-space as part of
the pageflip completion event will be often stale and cause new
timestamping and swap scheduling errors in user-space.

This was observed with large frequency on R9 380 Tonga Pro.

Fix this by enforcing a vblank count+timestamp update right
before emitting the pageflip completion event from the pflip
irq handler. The logic in core drm_update_vblank_count() makes
sure that no redundant or conflicting updates happen, iow. the
call turns into a no-op if it wasn't needed for that vblank,
burning a few microseconds of cpu time though.

Successfully tested on AMD R9 380 "Tonga Pro" (VI/DCE 10)
with DC enabled on the current DC staging branch. Independent
measurement of pageflip completion timing with special hardware
measurement equipment now confirms correct pageflip timestamps
and counts in the pageflip completion events.

v2: Review comments by Michel, drop outdated paragraph
    about problem already fixed in 2nd patch of the series.
    Add acked/r-b by Harry and Michel.

Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Acked-by: Harry Wentland <harry.wentland@amd.com> (v1)
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

Cc: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:22:55 -04:00
Pratik Vishwakarma
32a1892a86 drm/amd/display: get_atomic_property missing for drm_connector_funcs
DRM_IOCTL_MODE_GETCONNECTOR fails with EINVAL on enabling DRIVER_ATOMIC
With this DRM_IOCTL_MODE_GETCONNECTOR returns all the connector properties.
freesync_property and freesync_capable_property return 0 currently.

TESTS(On Chromium OS on Stoney Only)
* Builds without compilation errors.
* 'atomictest' proceeds after applying patch and fails with vblank event
timed out.
* Chromium OS ui comes up.

Signed-off-by: Pratik Vishwakarma <Pratik.Vishwakarma@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:22:51 -04:00
Harry Wentland
664a2ed115 drm/amd/display: Fallback on legacy properties in atomic_get_properties
We still rely on legacy properties. Fallback on legacy properties until
we get to pull these into some atomic state.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:22:48 -04:00
Harry Wentland
7df498fa4c drm/amd/display: Allow planes on all crtcs
4.9 kernel will always add the assigned crtc to possible_crtcs on a
plane. This is no longer the case on newer kernels. Make sure we allow
any plane on any crtc.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:22:44 -04:00
Alex Deucher
6f43fd6297 drm/amd/display: fix nullptr on vega initialization
Signed-off-by: Jordan Lazare <Jordan.Lazare@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Reviewed-by: Roman Li <Roman.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:22:39 -04:00
Andrey Grodzovsky
9faa423716 drm/amd/display: Fix s3 hang on resume.
Avoid enabling CRTC_VERTICAL_INTERRUPT0 twice on resume.
It's enabled once from within manage_dm_interrupts in mode set
and another explicitly from amdgpu_dm_irq_resume_late.
Seems it lead to CRTC hang.

Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:22:35 -04:00
Jordan Lazare
7160c74cd0 drm/amd/display: Log clock source in error condition
Signed-off-by: Jordan Lazare <Jordan.Lazare@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:22:32 -04:00
Yongqiang Sun
dd3f348f00 drm/amd/display: Ignore visible flag when check surface update type.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:22:28 -04:00
Jordan Lazare
28f7245432 drm/amd/display: Fill in vrefresh and min_vblank_time for dce8/dce10
PPLib is now calling into DC to get vrefresh and min_vblank_time, but
since full bandwidth calcs are missing for those generations, the pplib
structures were never being filled. This change fills the currently
required fields to prevent screen corruption.

Signed-off-by: Jordan Lazare <Jordan.Lazare@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Jordan Lazare <Jordan.Lazare@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:22:25 -04:00
Amy Zhang
6848e9896b drm/amd/display: PSR Aux Channel and Static Screen Support Fix
- Correct the aux channel selection according to DAL3

Signed-off-by: Amy Zhang <Amy.Zhang@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:22:21 -04:00
Andrey Grodzovsky
7c7f5b15be drm/amd/display: Refactor edid read.
Allow Linux to use DRM provided EDID read functioality
by moving  DAL edid implementation to module hence
removing this code from DC by this cleaning up DC
code for upstream.

v2: Removing ddc_service. No more need for it.

Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:22:17 -04:00
Andrey Grodzovsky
bb01672c79 drm/amd/display: Fix i2c write flag.
I2C_M_RD was translated to write instead of read.

Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:22:14 -04:00
Andrey Grodzovsky
5c4e980643 drm/amd/display: Remove get_connector_for_sink.
Keep 1:1 relation between MST sink and it's MST connector.

Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:22:10 -04:00
Andrey Grodzovsky
9fb8de78ed drm/amd/display: Remove get_connector_for_link.
We can keep a 1:1 relation between a link and a physical
connector and hence skip the iteration. This function
is used in context of only physical connetors.

Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:22:07 -04:00
Dmytro Laktyushkin
dff06ddd7f drm/amd/display: fix dce_calc surface pitch setting for non underlay pipes
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:22:03 -04:00
Zeyu Fan
bddd696ddd drm/amd/display: Temporary disable PSR for HBR2 & HBR3
Signed-off-by: Zeyu Fan <Zeyu.Fan@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:22:00 -04:00
Reza Amini
e8d726b71c drm/amd/display: refactor member referencing to improve readability
Signed-off-by: Reza Amini <reza.amini@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:21:56 -04:00
Reza Amini
934d292316 drm/amd/display: remove surface validation against stream rect
Surface information is by default copied from old context in dc_commit_stream.
Thus unchange streams will not be affected. For new streams, we shouldn't
validate the new mode against the surface configuration of old_context.

Signed-off-by: Reza Amini <reza.amini@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:21:52 -04:00
Shirish S
64d8b7806e drm/amd/display: update plane functionalities
This patch introduces amdgpu_drm_plane_state
structure, which subclasses drm_plane_state and
holds data suitable for configuring hardware.

It switches reset(), atomic_duplicate_state()
& atomic_destroy_state() functions to new internal
implementation, earlier they were pointing to
drm core functions.

TESTS(On Chromium OS on Stoney Only)
* Builds without compilation errors.
* 'plane_test' passes for XR24 format
  based Overlay plane.
* Chromium OS ui comes up.

Signed-off-by: Shirish S <shirish.s@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:21:46 -04:00
Harry Wentland
f2a0f5e6b2 drm/amd/display: Fix cleanup in amdgpu_dm_initialize_drm_device
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:21:42 -04:00
Alex Deucher
d4e13b0db1 drm/amd/display: decouple per-crtc-plane model
Current design has per-crtc-plane model.
As a result, for asic's that support underlay,
are unable to expose it to user space for modesetting.

To enable this, the drm driver intialisation now runs
for number of surfaces instead of stream/crtc.

This patch plumbs surface capabilities to drm framework
so that it can be effectively used by user space.

Tests: (On Chromium OS for Stoney Only)
* 'modetest -p'  now shows additional plane
  with YUV capabilities in case of CZ and ST.
* 'plane_test' fails with below error:
  [drm:amdgpu_dm_connector_atomic_set_property [amdgpu]] *ERROR* Unsupported screen depth 0
  as ther is no support for YUYV
* Checked multimonitor display works fine

Signed-off-by: Shirish S <shirish.s@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:21:35 -04:00
Ding Wang
4e3133c79d drm/amd/display: obtain usHBR3En bit from BP 1
ASICs using bios parser 1 don't check HBR3 capability as there is no such
a bit usHBR3En in ATOM_ENCODER_CAP_RECORDER.
Therefore, will use ATOM_ENCODER_CAP_RECORDER_V2 and thus obtain the usHBR3En
bit.

Signed-off-by: Ding Wang <ding.wang@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:21:31 -04:00
Vitaly Prosyak
7b779c991d drm/amd/display: stereo support
Frame sequential, top-bottom and side-by-side support.

Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:21:28 -04:00
Tony Cheng
fcbb5ad3fe drm/amd/display: use CP2520-3 for PHY compliance automation
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:21:24 -04:00
Yongqiang Sun
dabb3979e1 drm/amd/display: Fix MPO exit and cursor issue.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:21:21 -04:00
Roman Li
940c654e64 drm/amd/display: increase timeout for dmif dealloc
In some use-cases, e.g. multiple 4K displays,
exisitng wait time for reg update of 30msec timed out
during mode setiing that sometimes resulted in system bad state
as we continue without waiting for registry update complete.
Increasing timeout to 35msec fixes that problem.

Signed-off-by: Roman Li <Roman.Li@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:21:17 -04:00
Charlene Liu
fd8cc371ed drm/amd/display: voltage request related change
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:21:13 -04:00
Andrey Grodzovsky
e902915507 drm/amd/display: use CRTC_VERTICAL_INTERRUPT0 as a trigger for VBLANK.
Register ISR hnadler on the new interrupt.

Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:21:08 -04:00
Andrey Grodzovsky
667e1498a9 drm/amd/display: use CRTC_VERTICAL_INTERRUPT0 as VBLANK trigger.
VBLANK interrupt is driven bu line buffer vcounter which is
ahead of CRTC vcounter. Use an interrupt that fires at the actual
CRTC vblank start boundry.

Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:21:04 -04:00
Harry Wentland
5e141de452 drm/amd/display: Rename bandwidth_calcs.h to dce_calcs.h
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:21:01 -04:00
Yongqiang Sun
18f7a1e408 drm/amd/display: Power on front end during set mode.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:20:58 -04:00
xhdu
8c8953139c drm/amd/display: Add audio/video ContainerId implementation
Leave hardcoded if no ContainerId provided by DM.

Signed-off-by: Duke Du <Duke.Du@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:20:54 -04:00
Charlene Liu
3c8c9d6cd1 drm/amd/display: using calculated values for VReady/Startup
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:20:50 -04:00
Charlene Liu
2fc67983fb drm/amd/display: remove redundant check
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:20:47 -04:00
Charlene Liu
7e2fe3190d drm/amd/display: DP is hotplugged, HDMI with 4:2:0 corruption
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:20:43 -04:00
Leon Elazar
00f0201999 drm/amd/display: Fix applying surface to underlay pipe
1. Locking all pipes before doing any changes
2. Applying surface for both top and bottom pipes

Signed-off-by: Leon Elazar <leon.elazar@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:20:40 -04:00
Andrey Grodzovsky
0702a01f97 drm/amd/display: Set cursor pitch to cursor width (in pixels).
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Jordan Lazare <Jordan.Lazare@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:20:36 -04:00
Andrey Grodzovsky
ce75805e0a drm/amd/display: Unhardcode cursor size reported back to UMD.
This will return back MAX cursor size for given ASIC.

Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Jordan Lazare <Jordan.Lazare@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:20:33 -04:00
Andrey Grodzovsky
1034934584 drm/amd/display: Unhardcode acrtc->max_cursor_{height,width}
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Jordan Lazare <Jordan.Lazare@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:20:30 -04:00
Andrey Grodzovsky
d092bf6585 drm/amd/display: Fix gfx9 parameters reading for DC.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Jordan Lazare <Jordan.Lazare@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:20:26 -04:00
Andrey Grodzovsky
53d35dc60d drm/amd/display: Fix the NULL pointer. (v2)
ret value in amdgpu_dm_atomic_check was not rest to EINVAL
after drm_atomic_add_affected_planes and by this making
any subsequent validation failure pass when returning
to atomic_check.

v2: Add WARN_ON print for dc_commit_streams in
amdgpu_dm_atomic_commit_tail since this should never
fail.

Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:20:23 -04:00
Tony Cheng
0e19401f95 drm/amd/display: support PHY compliance automation for CP2520 pattern 1/2/3
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:20:19 -04:00
Tony Cheng
3f8a944016 drm/amd/display: support CP2520 pattern 2 for HBR2 compliance
- also some clean up

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:20:16 -04:00
Yongqiang Sun
e73c1efca8 drm/amd/display: Use stream_enc to get head pipe.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:20:12 -04:00
Dmytro Laktyushkin
745cc746da drm/amd/display: remove dc_pre_update_surfaces_to_stream from dc use
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:20:09 -04:00
Tony Cheng
cc04bf7e4f drm/amd/display: use extended receiver cap for dpcd ver
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:20:05 -04:00
Leon Elazar
ee8f63e178 drm/amd/display: changing the dc_update_surfaces_and_stream
1. Adding the ability to update the stream parameters during FULL_UPDATE type

Signed-off-by: Leon Elazar <leon.elazar@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:20:00 -04:00
Dmytro Laktyushkin
faddcb360c drm/amd/display: fix bw calc internal initialization error
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:19:57 -04:00