Commit Graph

2289 Commits

Author SHA1 Message Date
Alexander Shiyan
01e4f95853 mmc: mxcmmc: Convert to devm-* API
Replace existing resource handling in the driver with managed
device resource, this ensures more consistent error values and
simplifies error paths.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Chris Ball <chris@printf.net>
2014-05-12 18:04:31 -04:00
Sachin Kamat
15a2e2ab62 mmc: dw_mmc: exynos: Staticize dw_mci_exynos_pmops
'dw_mci_exynos_pmops' is local to this file.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Seungwon Jeon <tgih.jun@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Chris Ball <chris@printf.net>
2014-05-12 18:04:30 -04:00
Micky Ching
5027251ece mmc: rtsx: add R1-no-CRC mmc command type handle
a27fbf2f06 ("mmc: add ignorance case for CMD13 CRC error") produced
a cmd.flags unhandled in realtek pci host driver.  This will make MMC
card fail to initialize, this patch is used to handle the new cmd.flags
condition and MMC card can be used.

Signed-off-by: Micky Ching <micky_ching@realsil.com.cn>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Chris Ball <chris@printf.net>
2014-04-22 07:06:40 -04:00
Seungwon Jeon
bb8175a8aa mmc: sdhci: clarify DDR timing mode between SD-UHS and eMMC
Added MMC_DDR52 as eMMC's DDR mode is distinguished from SD-UHS.

Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Chris Ball <chris@printf.net>
2014-04-20 17:00:06 -04:00
Seungwon Jeon
cab3a8021b mmc: dw_mmc: clarify DDR timing mode between SD-UHS and eMMC
Replaced UHS_DDR50 with MMC_DDR52. And MMC_CAP_UHS_DDR50
is removed because of non-implementation of UHS signaling.

Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Chris Ball <chris@printf.net>
2014-04-20 17:00:01 -04:00
Seungwon Jeon
1a0ae377bf mmc: rtsx: clarify DDR timing mode between SD-UHS and eMMC
Added MMC_DDR52 as eMMC's DDR mode is distinguished from SD-UHS.

CC: Wei WANG <wei_wang@realsil.com.cn>
CC: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Chris Ball <chris@printf.net>
2014-04-20 16:59:56 -04:00
Seungwon Jeon
4039ff4741 mmc: sh_mmcif: clarify DDR timing mode between SD-UHS and eMMC
Replaced UHS_DDR50 with MMC_DDR52.

CC: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Chris Ball <chris@printf.net>
2014-04-20 16:59:52 -04:00
Seungwon Jeon
5438ad95a5 mmc: omap: clarify DDR timing mode between SD-UHS and eMMC
Replaced UHS_DDR50 with MMC_DDR52.

Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com>
Acked-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Chris Ball <chris@printf.net>
2014-04-20 16:59:48 -04:00
Seungwon Jeon
6dad6c9594 mmc: mmci: clarify DDR timing mode between SD-UHS and eMMC
Added MMC_DDR52 as eMMC's DDR mode distinguished from SD-UHS.

CC: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Chris Ball <chris@printf.net>
2014-04-20 16:59:41 -04:00
Linus Torvalds
97e18dc007 MMC highlights for 3.15:
Core:
  - CONFIG_MMC_UNSAFE_RESUME=y is now default behavior.
  - DT bindings for SDHCI UHS, eMMC HS200, high-speed DDR, at 1.8/1.2V.
  - Add GPIO descriptor based slot-gpio card detect API.
 
 Drivers:
  - dw_mmc: Refactor SOCFPGA support as a variant inside dw_mmc-pltfm.c.
  - mmci: Support HW busy detection on ux500.
  - omap: Support MMC_ERASE.
  - omap_hsmmc: Support MMC_PM_KEEP_POWER, MMC_PM_WAKE_SDIO_IRQ, (a)cmd23.
  - rtsx: Support pre-req/post-req async.
  - sdhci: Add support for Realtek RTS5250 controllers.
  - sdhci-acpi: Add support for 80860F16, fix 80860F14/SDIO card detect.
  - sdhci-msm: Add new driver for Qualcomm SDHCI chipset support.
  - sdhci-pxav3: Add support for Marvell Armada 380 and 385 SoCs.
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Merge tag 'mmc-updates-for-3.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc

Pull MMC updates from Chris Ball:
 "MMC highlights for 3.15:

  Core:
   - CONFIG_MMC_UNSAFE_RESUME=y is now default behavior
   - DT bindings for SDHCI UHS, eMMC HS200, high-speed DDR, at 1.8/1.2V
   - Add GPIO descriptor based slot-gpio card detect API

  Drivers:
   - dw_mmc: Refactor SOCFPGA support as a variant inside dw_mmc-pltfm.c
   - mmci: Support HW busy detection on ux500
   - omap: Support MMC_ERASE
   - omap_hsmmc: Support MMC_PM_KEEP_POWER, MMC_PM_WAKE_SDIO_IRQ, (a)cmd23
   - rtsx: Support pre-req/post-req async
   - sdhci: Add support for Realtek RTS5250 controllers
   - sdhci-acpi: Add support for 80860F16, fix 80860F14/SDIO card detect
   - sdhci-msm: Add new driver for Qualcomm SDHCI chipset support
   - sdhci-pxav3: Add support for Marvell Armada 380 and 385 SoCs"

* tag 'mmc-updates-for-3.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc: (102 commits)
  mmc: sdhci-acpi: Intel SDIO has broken card detect
  mmc: sdhci-pxav3: add support for the Armada 38x SDHCI controller
  mmc: sdhci-msm: Add platform_execute_tuning implementation
  mmc: sdhci-msm: Initial support for Qualcomm chipsets
  mmc: sdhci-msm: Qualcomm SDHCI binding documentation
  sdhci: only reprogram retuning timer when flag is set
  mmc: rename ARCH_BCM to ARCH_BCM_MOBILE
  mmc: sdhci: Allow for irq being shared
  mmc: sdhci-acpi: Add device id 80860F16
  mmc: sdhci-acpi: Fix broken card detect for ACPI HID 80860F14
  mmc: slot-gpio: Add GPIO descriptor based CD GPIO API
  mmc: slot-gpio: Split out CD IRQ request into a separate function
  mmc: slot-gpio: Record GPIO descriptors instead of GPIO numbers
  Revert "dts: socfpga: Add support for SD/MMC on the SOCFPGA platform"
  mmc: sdhci-spear: use generic card detection gpio support
  mmc: sdhci-spear: remove support for power gpio
  mmc: sdhci-spear: simplify resource handling
  mmc: sdhci-spear: fix platform_data usage
  mmc: sdhci-spear: fix error handling paths for DT
  mmc: sdhci-bcm-kona: fix build errors when built-in
  ...
2014-04-09 08:39:39 -07:00
Adrian Hunter
c67480173f mmc: sdhci-acpi: Intel SDIO has broken card detect
Intel SDIO has broken card detect so add a quirk to reflect that.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Chris Ball <chris@printf.net>
2014-04-07 21:27:14 -04:00
Linus Torvalds
2d1eb87ae1 Merge branch 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm
Pull ARM changes from Russell King:

 - Perf updates from Will Deacon:
   - Support for Qualcomm Krait processors (run perf on your phone!)
   - Support for Cortex-A12 (run perf stat on your FPGA!)
   - Support for perf_sample_event_took, allowing us to automatically decrease
     the sample rate if we can't handle the PMU interrupts quickly enough
     (run perf record on your FPGA!).

 - Basic uprobes support from David Long:
     This patch series adds basic uprobes support to ARM. It is based on
     patches developed earlier by Rabin Vincent. That approach of adding
     hooks into the kprobes instruction parsing code was not well received.
     This approach separates the ARM instruction parsing code in kprobes out
     into a separate set of functions which can be used by both kprobes and
     uprobes. Both kprobes and uprobes then provide their own semantic action
     tables to process the results of the parsing.

 - ARMv7M (microcontroller) updates from Uwe Kleine-König

 - OMAP DMA updates (recently added Vinod's Ack even though they've been
   sitting in linux-next for a few months) to reduce the reliance of
   omap-dma on the code in arch/arm.

 - SA11x0 changes from Dmitry Eremin-Solenikov and Alexander Shiyan

 - Support for Cortex-A12 CPU

 - Align support for ARMv6 with ARMv7 so they can cooperate better in a
   single zImage.

 - Addition of first AT_HWCAP2 feature bits for ARMv8 crypto support.

 - Removal of IRQ_DISABLED from various ARM files

 - Improved efficiency of virt_to_page() for single zImage

 - Patch from Ulf Hansson to permit runtime PM callbacks to be available for
   AMBA devices for suspend/resume as well.

 - Finally kill asm/system.h on ARM.

* 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: (89 commits)
  dmaengine: omap-dma: more consolidation of CCR register setup
  dmaengine: omap-dma: move IRQ handling to omap-dma
  dmaengine: omap-dma: move register read/writes into omap-dma.c
  ARM: omap: dma: get rid of 'p' allocation and clean up
  ARM: omap: move dma channel allocation into plat-omap code
  ARM: omap: dma: get rid of errata global
  ARM: omap: clean up DMA register accesses
  ARM: omap: remove almost-const variables
  ARM: omap: remove references to disable_irq_lch
  dmaengine: omap-dma: cleanup errata 3.3 handling
  dmaengine: omap-dma: provide register read/write functions
  dmaengine: omap-dma: use cached CCR value when enabling DMA
  dmaengine: omap-dma: move barrier to omap_dma_start_desc()
  dmaengine: omap-dma: move clnk_ctrl setting to preparation functions
  dmaengine: omap-dma: improve efficiency loading C.SA/C.EI/C.FI registers
  dmaengine: omap-dma: consolidate clearing channel status register
  dmaengine: omap-dma: move CCR buffering disable errata out of the fast path
  dmaengine: omap-dma: provide register definitions
  dmaengine: omap-dma: consolidate setup of CCR
  dmaengine: omap-dma: consolidate setup of CSDP
  ...
2014-04-05 13:20:43 -07:00
Marcin Wojtas
5491ce3f79 mmc: sdhci-pxav3: add support for the Armada 38x SDHCI controller
The SDHCI unit used on the Armada 380 and 385 Marvell SoC is similar
to the PXAv3 unit. The only difference is that on Armada 38x, the
PXAv3 unit accesses memory through MBus windows which must be
configured prior to using the device. Without this, DMA would not
work.

In order to achieve this, the sdhci-pxav3 driver is extended with an
additional compatible string "marvell,armada-380-sdhci". When this
compatible string is used, the MBus windows are initialized in a way
that is identical to what all other DMA-capable drivers for Marvell
EBU platforms do.

Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Chris Ball <chris@printf.net>
2014-03-29 12:18:19 -04:00
ZhangZhen
59ff3eb6d6 workqueue: remove deprecated WQ_NON_REENTRANT
Tejun Heo has made WQ_NON_REENTRANT useless in the dbf2576e37
("workqueue: make all workqueues non-reentrant"). So remove its
usages and definition.

This patch doesn't introduce any behavior changes.

tj: minor description updates.

Signed-off-by: ZhangZhen <zhenzhang.zhang@huawei.com>
Sigend-off-by: Tejun Heo <tj@kernel.org>
Acked-by: James Chapman <jchapman@katalix.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-03-29 09:33:03 -04:00
Georgi Djakov
415b5a75da mmc: sdhci-msm: Add platform_execute_tuning implementation
This patch adds implementation for platform specific tuning in order
to support HS200 bus speed mode on Qualcomm SDHCI controller.

Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Chris Ball <chris@printf.net>
2014-03-26 21:27:39 -04:00
Georgi Djakov
0eb0d9f4de mmc: sdhci-msm: Initial support for Qualcomm chipsets
This platform driver adds the initial support of Secure Digital Host
Controller Interface compliant controller found in Qualcomm chipsets.

Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
Tested-by: Ivan T. Ivanov <iivanov@mm-sol.com>
Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Chris Ball <chris@printf.net>
2014-03-26 21:27:30 -04:00
Arend van Spriel
2bc024855e sdhci: only reprogram retuning timer when flag is set
When the host->tuning_count is zero it means that the retuning is
disabled. This is checked on the first run of sdhci_execute_tuning()
by the if statement below:

	if (!(host->flags & SDHCI_NEEDS_RETUNING) && host->tuning_count &&
	    (host->tuning_mode == SDHCI_TUNING_MODE_1)) {

So only when tuning_count is non-zero it will set the host flag
SDHCI_USING_RETUNING_TIMER. The else statement is only for re-programming
the timer, which means that flag must be set. Because that is not checked
the else statement is executed in the first run when tuning_count is zero.

This was seen on a host controller which indicated SDHCI_TUNING_MODE_1 (0)
and tuning_count being zero. Suspect that (one of) these registers is not
properly set.

Signed-off-by: Arend van Spriel <arend@broadcom.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Aaron Lu <aaron.lu@intel.com>
Signed-off-by: Chris Ball <chris@printf.net>
2014-03-25 16:54:00 -04:00
Christian Daudt
fc2bd2e492 mmc: rename ARCH_BCM to ARCH_BCM_MOBILE
Currently ARCH_BCM has been used for Broadcom Mobile V7 based SoCs.
In order to allow other Broadcom SoCs to also use mach-bcm directory and
files, this patch renames the original ARCH_BCM to ARCH_BCM_MOBILE, and
uses ARCH_BCM to define any Broadcom chip residing in mach-bcm directory.

Signed-off-by: Christian Daudt <bcm@fixthebug.org>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Chris Ball <chris@printf.net>
2014-03-24 09:26:50 -04:00
Adrian Hunter
655bca7616 mmc: sdhci: Allow for irq being shared
If the SDHCI irq is shared with another device then the interrupt
handler can get called while SDHCI is runtime suspended.  That is
harmless but the warning message is not useful so remove it.  Also
returning IRQ_NONE is more appropriate.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Chris Ball <chris@printf.net>
2014-03-17 09:13:02 -04:00
Adrian Hunter
aad95dc49c mmc: sdhci-acpi: Add device id 80860F16
Add ACPI HID 80860F16 as a host controller for a SD card.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Chris Ball <chris@printf.net>
2014-03-17 09:12:57 -04:00
Adrian Hunter
4fd4409c81 mmc: sdhci-acpi: Fix broken card detect for ACPI HID 80860F14
Some 80860F14 devices do not support card detect and must rely
completely on GPIO.  Presently the card detect GPIO is used
only to wake-up from runtime suspend.  Change to using
mmc_gpioid_request_cd() which will cause the SDHCI driver to
prefer the GPIO to the host controller's native card detect.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Chris Ball <chris@printf.net>
2014-03-17 09:12:39 -04:00
Russell King
b42b9b12e9 mmc: sdhci-spear: use generic card detection gpio support
sdhci has support for using GPIOs for card detection.  If we have a
GPIO specified, we can use that directly, without needing our own
interrupt handler.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Chris Ball <chris@printf.net>
2014-03-04 16:28:47 -05:00
Russell King
42c1add970 mmc: sdhci-spear: remove support for power gpio
None of this code is currently used: there are no definitions of
struct sdhci_plat_data in arch/arm, neither are there any DT properties
which use card_power_gpio/power_active_high/power_always_enb.  In any
case, slot power control should be rigged up via vmmc and the regulator
subsystem in the DT case.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Chris Ball <chris@printf.net>
2014-03-04 16:28:44 -05:00
Russell King
475d9e3ebf mmc: sdhci-spear: simplify resource handling
Use devm_ioremap_resource() to simplify iomem resource handling in the
probe path.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Chris Ball <chris@printf.net>
2014-03-04 16:28:42 -05:00
Russell King
fcdb7c8f50 mmc: sdhci-spear: fix platform_data usage
sdhci-spear is unsafe should a probe fail or defer, since it overwrites
the platform_data with its own driver-private data.  It's trivial to
fix as SDHCI allows for driver-private data to be appended to its own
structure - we just need to arrange the code to allow this.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Chris Ball <chris@printf.net>
2014-03-04 16:28:39 -05:00
Russell King
142dbab951 mmc: sdhci-spear: fix error handling paths for DT
Fix the error handling paths for DT and simplify using the devm_* API
for clk_get().

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Chris Ball <chris@printf.net>
2014-03-04 16:28:28 -05:00
Russell King
4025ce24f3 mmc: sdhci-bcm-kona: fix build errors when built-in
`sdhci_bcm_kona_remove' referenced in section `.data' of drivers/built-in.o: defined in discarded section `.exit.text' of drivers/built-in.o

Fixes: 058feb5366 ("mmc: sdhci-bcm-kona: make linker-section warning go away")
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tested-by: Markus Mayer <markus.mayer@linaro.org>
Acked-by: Matt Porter <mporter@linaro.org>
Cc: <stable@vger.kernel.org>
Signed-off-by: Chris Ball <chris@printf.net>
2014-03-04 16:27:23 -05:00
Balaji T K
a2e771522c mmc: omap_hsmmc: add autocmd23 support
Add support for autocmd23 support

Signed-off-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Chris Ball <chris@printf.net>
2014-03-04 11:46:49 -05:00
Balaji T K
bf129e1ca1 mmc: omap_hsmmc: add cmd23 support
Add set block count command support for close ended multiblock read/write.

Signed-off-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Chris Ball <chris@printf.net>
2014-03-04 11:46:48 -05:00
Balaji T K
9d0253341b mmc: omap_hsmmc: split dma setup
split start dma function into setup and start dma to keep track of
host_cookie when cmd23 support is enabled along with async request.

Signed-off-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Chris Ball <chris@printf.net>
2014-03-04 11:46:37 -05:00
Balaji T K
d4b2c375fc mmc: omap_hsmmc: fix request done for sbc error case
mrq is not populated for set block count(cmd23) command.
Use block read/write mmc_commond pointer for request done and
avoid NULL pointer access in error case for sbc (cmd23).

Signed-off-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Chris Ball <chris@printf.net>
2014-03-04 11:45:10 -05:00
Balaji T K
6e3076c27d mmc: omap_hsmmc: save clock rate to use in interrupt context
clk_get_rate throws DEBUG_LOCKS_WARN_ON(in_interrupt()) warning
if called from interrupt context.
use cached clock rate in set_data_timeout, so that
set_data_timeout can be called from interrupt context.

Signed-off-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Chris Ball <chris@printf.net>
2014-03-04 11:45:07 -05:00
Balaji T K
4ea42235b5 mmc: omap_hsmmc: remove redundant reset done
Remove redundant reset done check since omap hwmod layer ensures IP reset.

Signed-off-by: Balaji T K <balajitk@ti.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Chris Ball <chris@printf.net>
2014-03-04 11:45:05 -05:00
Balaji T K
19df45bcd7 mmc: omap_hsmmc: fix return error code for of_get_hsmmc_pdata
of_get_hsmmc_pdata returns a pointer, returning NULL is invalid,
return ERR_PTR for error case.

Signed-off-by: Balaji T K <balajitk@ti.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Chris Ball <chris@printf.net>
2014-03-04 11:45:02 -05:00
Balaji T K
2cf171cb25 mmc: omap_hsmmc: remove pbias workaround
remove pbias workaround

Signed-off-by: Balaji T K <balajitk@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Tested-by: Florian Vaussard <florian.vaussard@epfl.ch>
Tested-by: Stefan Roese <sr@denx.de>
Signed-off-by: Chris Ball <chris@printf.net>
2014-03-04 11:44:58 -05:00
Balaji T K
e99448ff1f mmc: omap_hsmmc: adapt hsmmc to use pbias regulator
In DT case, PBAIS registers are programmed via regulator,
use regulator APIs to control PBIAS.

Signed-off-by: Balaji T K <balajitk@ti.com>
Tested-by: Florian Vaussard <florian.vaussard@epfl.ch>
Tested-by: Stefan Roese <sr@denx.de>
Signed-off-by: Chris Ball <chris@printf.net>
2014-03-04 11:44:50 -05:00
Balaji T K
987fd49b89 mmc: omap_hsmmc: handle vcc and vcc_aux independently
handle vcc and vcc_aux independently to reduce indent.

Signed-off-by: Balaji T K <balajitk@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Tested-by: Florian Vaussard <florian.vaussard@epfl.ch>
Tested-by: Stefan Roese <sr@denx.de>
Signed-off-by: Chris Ball <chris@printf.net>
2014-03-04 11:44:44 -05:00
Balaji T K
f2ddc1dab6 mmc: omap_hsmmc: use devm_regulator API
Use devm_regulator API, while at it use
devm_regulator_get_optional for optional vmmc_aux supply

Signed-off-by: Balaji T K <balajitk@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Tested-by: Florian Vaussard <florian.vaussard@epfl.ch>
Tested-by: Stefan Roese <sr@denx.de>
Signed-off-by: Chris Ball <chris@printf.net>
2014-03-04 11:44:41 -05:00
Daniel Mack
c9ae64db67 mmc: omap_hsmmc: support more DT properties
This should probably be done implicitly through mmc_of_parse(), but that
doesn't play well along with the multi-slot model the hsmmc driver
features. Hence, for now, do it manually. The properties are already
documented in Documentation/devicetree/bindings/mmc/mmc.txt.

Signed-off-by: Daniel Mack <zonque@gmail.com>
Acked-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Chris Ball <chris@printf.net>
2014-03-04 11:44:39 -05:00
Nishanth Menon
59445b10d0 mmc: omap_hsmmc: Add support for quirky omap3 hsmmc controller
When device is booted using devicetree, platforms impacted by Erratum
2.1.1.128 is not detected easily in the mmc driver. This erratum
indicates that the module cannot do multi-block transfers. Platforms
such as LDP which use OMAP3 ES revision prior to ES3.0 are impacted by
this.

Provide a new compatible property "ti,omap3-pre-es3-hsmmc" to allow
driver to determine if driver needs to implement quirks associated
with the specific module version (primarily because the IP revision
information is not sufficient for the same).

Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Chris Ball <chris@printf.net>
2014-03-04 11:44:31 -05:00
Dan Carpenter
b38313d627 mmc: omap_hsmmc: remove a duplicative test
Static checkers complain that testing for both "next" and "!next" is
duplicative.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Acked-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Chris Ball <chris@printf.net>
2014-03-04 11:44:13 -05:00
Felipe Balbi
370aede6a1 mmc: dw_mmc: fix possible build error
Fix the following build errors:

drivers/mmc/host/dw_mmc-k3.c: In function ‘dw_mci_k3_suspend’:
drivers/mmc/host/dw_mmc-k3.c:58:2: error: implicit declaration of
	function ‘dw_mci_suspend’ [-Werror=implicit-function-declaration]
  ret = dw_mci_suspend(host);
  ^
drivers/mmc/host/dw_mmc-k3.c: In function ‘dw_mci_k3_resume’:
drivers/mmc/host/dw_mmc-k3.c:76:2: error: implicit declaration of
	function ‘dw_mci_resume’ [-Werror=implicit-function-declaration]
  return dw_mci_resume(host);
  ^
drivers/mmc/host/dw_mmc-k3.c: At top level:
drivers/mmc/host/dw_mmc-k3.c:53:12: warning: ‘dw_mci_k3_suspend’ defined
	but not used [-Wunused-function]
 static int dw_mci_k3_suspend(struct device *dev)
            ^
drivers/mmc/host/dw_mmc-k3.c:65:12: warning: ‘dw_mci_k3_resume’ defined
	but not used [-Wunused-function]
 static int dw_mci_k3_resume(struct device *dev)
            ^

Signed-off-by: Felipe Balbi <balbi@ti.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Chris Ball <chris@printf.net>
2014-03-03 14:00:56 -05:00
Tomasz Figa
2200300060 mmc: sdhci-s3c: Do not allow frequencies higher than requested
This patch modifies sdhci_s3c_consider_clock() to fail if bus clock
being considered can not provide frequency lower or equal requested,
instead of returning the lowest supported.

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by; Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Chris Ball <chris@printf.net>
2014-03-03 10:23:39 -05:00
Tomasz Figa
3ac147facf mmc: sdhci-s3c: Fix handling of bus clock switching
Currently the driver assumes at probe that controller is configured for
last valid enumerated bus clock. This assumption is completely wrong, as
there is no way to ensure such configuration until the hardware gets
first configured (by calling sdhci_s3c_set_clock()).

This patch modifies the driver to set current clock at probe to unknown
state (represented by negative value) and make sure that the hardware
gets actually configured to selected clock in sdhci_s3c_set_clock().

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by; Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Chris Ball <chris@printf.net>
2014-03-03 10:23:36 -05:00
Tomasz Figa
222a13c5d0 mmc: sdhci-s3c: Simplify min/max clock calculation
This patch reimplements functions calculating minimum and maximum clock
rates to leverage clock rate cache introduced by previous patches.

In addition, the calculation is simplified to just comparing input
clock rates (max case) or input clock rates divided by maximum divisor
(min case), which is basically what the original code did, but with much
more unnecessary work.

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by; Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Chris Ball <chris@printf.net>
2014-03-03 10:23:32 -05:00
Tomasz Figa
8f4b78d9bb mmc: sdhci-s3c: Use correct condition to check for clock presence
IS_ERR() must be used to make sure that not a valid clock was returned
by clk_get() and company.

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by; Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Chris Ball <chris@printf.net>
2014-03-03 10:23:22 -05:00
Tomasz Figa
6eb28bdcb2 mmc: sdhci-s3c: Cache bus clock rates
To fix scheduling while atomic happening in sdhci_s3c_set_clock() caused
by calling clk_get_rate() that might sleep, this patch modifies the
driver to cache rates of all bus clocks at probe time and then only use
those cache values.

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by; Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Chris Ball <chris@printf.net>
2014-03-03 10:23:18 -05:00
Tomasz Figa
8880a4a526 mmc: sdhci-s3c: Use shifts to divide by powers of two
Current implementation of sdhci_s3c_consider_clock() is highly
inefficient due to multiple integer divisions by variable performed in a
loop. Since only divisors that are powers of two are considered, this
patch replaces them with respective shifts, removing all the integer
divisions.

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by; Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Chris Ball <chris@printf.net>
2014-03-03 10:21:32 -05:00
Dinh Nguyen
ec1e5d703e mmc: dw_mmc: Add support for SOCFPGA's platform specific implementation
Like the rockchip, Altera's SOCFPGA platform specific implementation of the
dw_mmc driver requires using the HOLD register for SD commands. This patch
renames dw_mci_rockchip_prepare_command to dw_mci_pltfm_prepare_command so
that SOCFPGA and Rockchip can use it.

Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Tested-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Acked-by: Seungwon Jeon <tgih.jun@samsung.com>
Signed-off-by: Chris Ball <chris@printf.net>
2014-02-26 21:30:12 -05:00
Dinh Nguyen
47a1f522d7 mmc: dw_mmc-socfpga: Remove the SOCFPGA specific platform for dw_mmc
It turns now that the only really platform specific code that is needed for
SOCFPGA is using the SDMMC_CMD_USE_HOLD_REG in the prepare_command function.
Since the Rockchip already has this functionality, re-use the code that is
already in dw_mmc-pltfm.c.

Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Tested-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Acked-by: Seungwon Jeon <tgih.jun@samsung.com>
Signed-off-by: Chris Ball <chris@printf.net>
2014-02-26 21:29:57 -05:00