This series adds support for am437x RTC-only mode in suspend. In the
RTC-only mode suspend, everything is shut down except the RTC. This
makes the power consumption very low for suspend mode.
To support RTC-only mode, we need to export omap_rtc_power_off_program()
from the rtc driver and improve PM code to save and restore the wkup
domain context. As RTC-only mode depends on the device being wired
properly for things like memory, we need to also check for the machine
type before we allow it. We also need to run DDR3 hardware leveling on
resume.
Note that there is a trivial merge conflict between the RTC branch
and these changes where the RTC branch makes tm2bcd() a void function
and the error handling parts can be just dropped.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlywwLIRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXOBhg/+NRYTBaO4pmFKlTMKs+bgdpftHf6wPSID
kUy62YiKhMMgbe6J+Ts/Hk2kCibuOfFmQ0axGFdHzMhpwTGThsWFiwaVr7OKF6ZE
DwOlJ1ZwM2OXcdf8wVupRL/54Tg1Wjc6y/T63Q5K+IqKz7gjdf6n7CXdYn22qTmp
4WK81dW1fx+9QNBbGBmMXEbNRlEImxeZRnWF1zJvydOCxO0jRbgnlGgpZJr36TeL
Jj+HN+4fD6WmaQ3Slbgcr0jbAowjjTuyUfFwzEBe9G2KlxRyrxDd4ryY78tNxcIe
L+yNMm7RGHD1Mb0+tdmpXESuj+O4hsuXglnK5vl19yc95nbwbTeRu0sv+WBEAal4
mY7xTMzT08rLT7fDXuJ+5vZNbR1TLGIekmNnj5BvV8LyZ9ypXToOlOCtFonQxULu
HFsiDkOOdKQhkuzw+V8EBksMXdD5crTVxyHY95hguvWTBUMTJjBo0Bq/9EmhKx0m
HOglctIivV1/GFg/82QKatjXLLeuXtFqUJa7lc6GIkVteAvEhrbg2DQ8QhnZ8Zg+
ghx0kKsA+KXvOItI6JrMjk/GQuwXTcIytkUhfTVuVlN+gV2PbGFCbohJOatwtXkp
0+VQ0H6AN04FJPqgLDR1njvks6Ll503gbnqodDNL/xgaN+Pjw5zTabkM/hdIyCNV
KS6XhdlYvtQ=
=yNbG
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v5.2/am4-pm-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/drivers
PM changes for am335x and am437x
This series adds support for am437x RTC-only mode in suspend. In the
RTC-only mode suspend, everything is shut down except the RTC. This
makes the power consumption very low for suspend mode.
To support RTC-only mode, we need to export omap_rtc_power_off_program()
from the rtc driver and improve PM code to save and restore the wkup
domain context. As RTC-only mode depends on the device being wired
properly for things like memory, we need to also check for the machine
type before we allow it. We also need to run DDR3 hardware leveling on
resume.
Note that there is a trivial merge conflict between the RTC branch
and these changes where the RTC branch makes tm2bcd() a void function
and the error handling parts can be just dropped.
* tag 'omap-for-v5.2/am4-pm-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: sleep43xx: Run EMIF HW leveling on resume path
memory: ti-emif-sram: Add ti_emif_run_hw_leveling for DDR3 hardware leveling
soc: ti: pm33xx: AM437X: Add rtc_only with ddr in self-refresh support
soc: ti: pm33xx: Move the am33xx_push_sram_idle to the top
ARM: OMAP2+: pm33xx: Add support for rtc+ddr in self refresh mode
rtc: OMAP: Add support for rtc-only mode
Signed-off-by: Olof Johansson <olof@lixom.net>
This series of changes for ti-sysc interconnect target module driver
gets us to the point where we can actually drop legacy platform data
for many devices in favor of device tree data.
To do this, we improve ti-sysc driver not to rely on platform data
callbacks to manage module clocks, and handle more quirks needed for
some devices. Also few minor fixes are needed, but were considered
not needed to be sent separately as they only show up with this series.
Then we drop several thousands of lines of legacy platform data for
omap4, omap5, dra7, am335x and am437x. We drop platform data for mmc,
i2c, gpio and uart devices to start with as those are typically
easily tested on all devices. In case of unexpected issues, we can just
add back the legacy platform data for a single device type if needed.
Finally we add initial support for enabling and disabling some devices
without legacy platform data callbacks. I was planning on sending the
dropping of legacy platform data as a separate series, but already
applied Roger's patch on top and pushed it out.
Note that this series depends on related SoC and is based on those.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlywvZERHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXNkVBAAqFcPgl/OGYOp1xWHnKRXMJfYLYzHEn8v
V05UPodmSeszU3SUEonxCW14fiAxy3tp082Bl4Zp31Q0yKodzjC5ZOF57zGt6ZHg
Twkgs5TAIgpFJwzbb104FXGgZH6Lj//IEhMAnwXzcT5YxNYdOU5bhFffQbxmunvb
pQFX2x436BBWHnbIiI4zb/CKobgPNRQwoz8ndlKiqk20qLTUmzSLrKI8WPkFdste
E1WD8HC+BSxvCq78sr3qDqdEJ7klWABkrjNJr8BOGPHyQuzTpuqOnQP+I83IKPmG
6v0kH9u8Ik7TN6ald/AfaRD5qhiKrhL5tQm+U/pODQ9cVNE8cPpWqWbV/cWUtXka
yPWJtOC9NKuULZxvHrZdGoYTKHPdSdrfBOKGLIOBhuYi6Do8Hhvrg/ZrKN+hjkNz
v9iUbL9ssSr96zuAz5PrwFXk7lYWVgq/Xpb+/LZgCiMb6ww3akuioYCVdjNbbT7Y
Dzd1Gu+UtBut17BxpSimuoB6ZGLffzrXaD4ThRmxdZ/CVbdFxbw58Sam/i2E6Hqw
sXAGLrFXGO7hT2QOpppw7+zZJQXKd2g9V6MXCMTW9hkqyfopn6J2vK/sPqQGPzTs
SstCgqG5ubkAwQ18piTmveFwQKFYVO4CHjdmTmxGmO+gDtdDfChVo6+YG+1wSImE
SWPEEgkrHDs=
=HJlq
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v5.2/ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/soc
Driver changes for ti-sysc for v5.2 merge window
This series of changes for ti-sysc interconnect target module driver
gets us to the point where we can actually drop legacy platform data
for many devices in favor of device tree data.
To do this, we improve ti-sysc driver not to rely on platform data
callbacks to manage module clocks, and handle more quirks needed for
some devices. Also few minor fixes are needed, but were considered
not needed to be sent separately as they only show up with this series.
Then we drop several thousands of lines of legacy platform data for
omap4, omap5, dra7, am335x and am437x. We drop platform data for mmc,
i2c, gpio and uart devices to start with as those are typically
easily tested on all devices. In case of unexpected issues, we can just
add back the legacy platform data for a single device type if needed.
Finally we add initial support for enabling and disabling some devices
without legacy platform data callbacks. I was planning on sending the
dropping of legacy platform data as a separate series, but already
applied Roger's patch on top and pushed it out.
Note that this series depends on related SoC and is based on those.
* tag 'omap-for-v5.2/ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (33 commits)
bus: ti-sysc: Add generic enable/disable functions
ARM: OMAP2+: Drop mcspi platform data for omap4
ARM: OMAP2+: Drop uart platform data for dra7
ARM: OMAP2+: Drop gpio platform data for dra7
ARM: OMAP2+: Drop i2c platform data for dra7
ARM: OMAP2+: Drop mmc platform data for dra7
ARM: OMAP2+: Drop uart platform data for omap5
ARM: OMAP2+: Drop gpio platform data for omap5
ARM: OMAP2+: Drop i2c platform data for omap5
ARM: OMAP2+: Drop mmc platform data for omap5
ARM: OMAP2+: Drop uart platform data for am33xx and am43xx
ARM: OMAP2+: Drop gpio platform data for am33xx and am43xx
ARM: OMAP2+: Drop i2c platform data for am33xx and am43xx
ARM: OMAP2+: Drop mmc platform data for am330x and am43xx
ARM: OMAP2+: Drop uart platform data for omap4
ARM: OMAP2+: Drop gpio platform data for omap4
ARM: OMAP2+: Drop i2c platform data for omap4
ARM: OMAP2+: Drop mmc platform data for omap4
Documentation: bus: ti-sysc: fix spelling mistakes "multipe" and "interconnet"
bus: ti-sysc: Detect DMIC for debugging
...
Signed-off-by: Olof Johansson <olof@lixom.net>
This series of changes mostly consists of ti-sysc interconnect driver
related preparation work. With these changes and the related ti-sysc
driver changes, we can start dropping legacy omap_hwmod_*data.c platform
data for many devices.
There are also two am335x and am437x related PM changes for secure
devices that have ROM handling some parts and needs EFUSE power domain
active.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlywuEIRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXPoiQ/+MfNIZ9QBirmX+l8JKQfsb7GYXeza6LR0
InU9Olc2iai+2LJ9ArC1xctrZoV+CSzm+TIrnaCZYXNsx7VKJ+Vc6V+iq+VzqPWe
8KQ92kzkz12j5ohajp3L82Hnk7vsLRU+LMdC4OxqeQGnvrz2p8JtbsvqxkCgRUIU
ZC/plF16SdcAXiVvQ/vFoGj37oo5UI3pX4CsXTsnjrFiRMh9BIAGzpmIorKn5ows
FQ6spUExtSFAZ4rIHhjaP0KTcGGv2ltdBvPZFjczGIGnxSScF8augcADJDOzrinO
Pt1rXUaDzCbmYGOS0QP070Xx0eVIWQom0MLIA+x8mrXBcVL2jQ4vuN/d7DzM5XNs
PSWhDN6OtN/D9ocZ3S5JcnZJLYcnfNIi0L0CbQPZgS844YYSRkAYFmbrLYAskSO4
wrixYjyme+CofeD2fEItESaNVHYw7PH78zmdY9RDHK3cQxqshaOfdZLNhnAF/TZ7
dGKnRyl6hWpn0O1rAqstvno4XIg18URJQrtx3EV21eBnmHSs2FRSjfrpCEjnODk6
YkD3X/hF01DLxV5Hh97Hj6F351KDqL27g1+Md69ktfdprqMwpTMTQHCSgogCg3yN
0bLe6x7KijKtWkM/JnTkNU8S5iEDK6+4CvCHfBUTx86t01mSfOWg6JcVLmUL87lF
pQM1Lr5LHoo=
=WkV8
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v5.2/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/soc
SoC changes for omap variants for v5.2 merge window
This series of changes mostly consists of ti-sysc interconnect driver
related preparation work. With these changes and the related ti-sysc
driver changes, we can start dropping legacy omap_hwmod_*data.c platform
data for many devices.
There are also two am335x and am437x related PM changes for secure
devices that have ROM handling some parts and needs EFUSE power domain
active.
* tag 'omap-for-v5.2/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: pm33xx-core: Do not Turn OFF CEFUSE as PPA may be using it
ARM: OMAP2+: Wakeupgen: AM43xx HS devices should save context like non-HS
ARM: OMAP2+: Handle reset quirks for dynamically allocated modules
ARM: OMAP2+: Remove hwmod .rev data and use local SoC checks instead
ARM: OMAP2+: Allocate struct omap_hwmod based on dts data
ARM: OMAP2+: Define _HWMOD_STATE_DEFAULT and use it
ARM: OMAP2+: Prepare class allocation for dynamically allocated modules
ARM: OMAP2+: Make interconnect target module allocation functions static
ARM: OMAP2+: Fix potentially uninitialized return value for _setup_reset()
ARM: dts: Fix dcan clkctrl clock for am3
Signed-off-by: Olof Johansson <olof@lixom.net>
STPMIC1 is a PMIC from STMicroelectronics. The STPMIC1 integrates 10
regulators, 3 power switches, a watchdog and an input for a power on key.
Signed-off-by: Pascal Paillet <p.paillet@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch enables AMBA support for stm32 family.
stm32 family embeds different amba pl180 variants.
Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
- A fix on LS1021A-TWR board that SGMII PCS link remains down for
eTSEC0 upon an ifdown/ifup sequence.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJcvTFYAAoJEFBXWFqHsHzOMjUIAI0yp8evhF7SKhz7IESfs4sk
O7ER8WMJb11gWgQICEJCWshBfaj28kRO25INLJgA9Txm19wB7brfKv/wVlYSrQeU
kIhKZHJkp3xVibfopuqWlq3jsZyoMSPzaLKGK8d8i2PE1ug6zDvTQAfebMtjKGxU
kZjj2q3o7Vo81MK5aswy5ohMPyHfMszZbfgLVBbk5dY7X9W6F0abkRxReAjnfDrL
QPMpMLCRHoIymPkTqDmsyQ090ZLZW+3XCL0lvDzfCVvlrvM3FaBb6HclzvZuaeBr
TghmBIlc/as9Kgnh/kygDkDkUwKfE1t2ntaRFdxgqxwOpwtMw3RQ643FFGAAHtU=
=BDC3
-----END PGP SIGNATURE-----
Merge tag 'imx-fixes-5.1-3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
i.MX fixes for 5.1, round 3:
- A fix on LS1021A-TWR board that SGMII PCS link remains down for
eTSEC0 upon an ifdown/ifup sequence.
* tag 'imx-fixes-5.1-3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: ls1021: Fix SGMII PCS link remaining down after PHY disconnect
Signed-off-by: Olof Johansson <olof@lixom.net>
- Pinctrl related fixes for the A33 NAND controller
- Fix the refcounting of DT nodes in our core code
- Fix for a typo'd DT property
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXLmrygAKCRDj7w1vZxhR
xWPzAPsG8IOfePeDDq5QtpXuO/ksMCb1H/+1dsHwe6yW2CFrQwD/W3p/n5i/ervO
tUtfb4a4uz0WthUrApkWlCUS30IGdwU=
=/Hf9
-----END PGP SIGNATURE-----
Merge tag 'sunxi-fixes-for-5.1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into fixes
Allwinner fixes for 5.1
- Pinctrl related fixes for the A33 NAND controller
- Fix the refcounting of DT nodes in our core code
- Fix for a typo'd DT property
* tag 'sunxi-fixes-for-5.1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: dts: sun8i: a33: Reintroduce default pinctrl muxing
arm64: dts: allwinner: a64: Rename hpvcc-supply to cpvdd-supply
ARM: sunxi: fix a leaked reference by adding missing of_node_put
ARM: sunxi: fix a leaked reference by adding missing of_node_put
Signed-off-by: Olof Johansson <olof@lixom.net>
- A couple of imx6q-logicpd device tree fixes to reduce inrush current,
so that the board can always work properly.
- Fix buggy device trees that use AR803X to set up phy-mode as
rgmii-id. These device trees are broken since day one, and the bug
gets exposed by the AR803X phy driver changes. i.MX community agreed
to fix those broken device trees rather than supporting messy back
compatibility in driver code.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJctEe5AAoJEFBXWFqHsHzOayAH/igeN6Se6+DdOTCHiHHOeew4
udAHDVaNnSNAYIggvn+0T6QfkI21ugaFUWwtVgeINeVsXSKwk3w/AJVl79KFmSy1
Ivewk8KTLKO/Ig24XqMXdX2RnDed+xR8JVyNLUrAfnOYZSdZ10VWnovkSMCZcHwM
h6reHoCrf/+Teh3xRaEr/xgzrzK5mIFhEgu5iaeGdcQhtqaBYuXSb/KGEDbAkpaP
X8rnetZvUH2Z/og5i4c/0cP8rh1KDZ+c6+9cbDfhWCGf61tadZPGxBMUfMtQEPio
HV0Kxd7+j+lTtG6OjpbTAzLXJ25H3hbleEyflZQpAmUEkb+KIYwkAcpbcLqk2EY=
=q05H
-----END PGP SIGNATURE-----
Merge tag 'imx-fixes-5.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
i.MX fixes for 5.1, round 2:
- A couple of imx6q-logicpd device tree fixes to reduce inrush current,
so that the board can always work properly.
- Fix buggy device trees that use AR803X to set up phy-mode as
rgmii-id. These device trees are broken since day one, and the bug
gets exposed by the AR803X phy driver changes. i.MX community agreed
to fix those broken device trees rather than supporting messy back
compatibility in driver code.
* tag 'imx-fixes-5.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx6q-logicpd: Reduce inrush current on USBH1
ARM: dts: imx6q-logicpd: Reduce inrush current on start
ARM: dts: imx: Fix the AR803X phy-mode
Signed-off-by: Olof Johansson <olof@lixom.net>
1. DTC warning fixes: move timer and pmu nodes outside of soc node,
2. Properly override MDMA0 on Universal C210,
3. Fix camera clock provider (to match bindings and driver) on Goni.
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAlzFutEQHGtyemtAa2Vy
bmVsLm9yZwAKCRDBN2bmhouD1+GlD/9e3Xau4T6ajo16iFvrkstIP08MeVpRIeVO
N0M5kstOOwg5pL01MybNq7EjKpHxAHgtCR6uodttDlXdscGmjRPK7kY00lAk8+Nz
w1b+aaltwlLHoRourimXYRs9E/6iB/L5fHND9AAEf/uJoj4eYzN7YsvnxaWzncH3
YMISO7iMFHGNtQV1XLvSCy2gWnQb4OEcadCqAMenGRLxIzsiy2YwWUcPHlIeU1EO
eaSzSj5CxkC4abOBObRGRqtzutypfU81yxhdHeUVIZW8veqPAXwyNF4f238Qw2At
UYHyBS6zKBut/p8rwKCVSru1aPbQvdXWmyp9oFGopxZAGX+v9m7LdTKBVKEyQI7A
FGmY54MStrSjq8qsm3GddaRhXT0IwxGUS3VjIohSdLA7pdr1nYC+z3B+511WvZbe
KFqnO3pOXuCwzCB/d2z9hpeNhw4PBuksmxe5qBdv2+yIaq8q9Xq9fa4w7x1PJb+9
SO7oFlJzlIp3L3/N575HoKzh/eGa7ae8fl899eyZj/D7cSb/wJmgoHvBY/I6jRr/
pCUm836sxXGBqHZJqbdXMQoX1qA3W6zk37SXYP3VCpaQD1as4Vlx3RZtr0EQnG6A
W1kU2NdypdIsHcC+JIAq3vq3FyDExxa31vv6skzL+BXJw/Fv7Udu8hWF/imKRi30
WRimvDLfvQ==
=5OFy
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt-5.2-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM changes for v5.2, second round
1. DTC warning fixes: move timer and pmu nodes outside of soc node,
2. Properly override MDMA0 on Universal C210,
3. Fix camera clock provider (to match bindings and driver) on Goni.
* tag 'samsung-dt-5.2-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: s5pv210: Fix camera clock provider on Goni board
ARM: dts: exynos: Properly override node to use MDMA0 on Universal C210
ARM: dts: exynos: Move fixed-clocks out of soc on Exynos3250
ARM: dts: exynos: Remove unneeded address/size cells from fixed-clock on Exynos3250
ARM: dts: exynos: Move pmu and timer nodes out of soc
Signed-off-by: Olof Johansson <olof@lixom.net>
It is discouraged to have OF partitions as subnodes directly
under the device, create a "partitions" subnode and put the
partitions inside it.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
* Add cxo_board as ref clk for DSI phy
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJcwoe6AAoJEFKiBbHx2RXVIOsQAKo8s6aXZOFX1kSANTbdov3u
pLfo2hjNsU+TrtrFMBVKxo7RkK1E4ehGzuOPtAoi8/uD9dlf11K8yzvKl4Dap7kX
XNW0vTFJJlodfs2t5ktPm828vfzSBVj5sWViU4U6ewa+psA+tQqtR3nXvWn546Ix
IaRRarmqLv5gMJSdsO3dwGYUgiMBFoWwLcz4KpzFnQydsNJRVXB/v8cyrAfn7TBg
VGlvV3JDhNtmfebvfJqmRUSWIT9FM5N2TLZnRH6esquUGheM/3h2bg5/Z51UH5pG
PZnMJeoAzBAdGhT/XVLNIb2rzc6qRaH+t2dU1MkUo3z5lm5Trkqe/jGUJIOd4SJr
+SERYBOVZNDwlLgevT39/2g29X1cYkf18heX3loEmwX7m0CnzC2/JySD5AcbH5bd
1p2SLkRDMNa3KPc9Zz3WGOlG7/Iwb2l6Hdyz4qKKAVQSEay7mCug56MWc+hGDcng
YCphWD72PGZ8hPTFs6cNlNLXFf4az1LTuzf3LFYW7z6nH87njiV5cKWyQ6uJKJd9
QA1j/Yg3BvQH0OmaDJzEeFkQGPZZSU73IlFWJPcfGCoUntTILjDT09Q3ZdyYUR2N
AySWtL3fKYYIfBB+kbI+aBtC6jexCta2n7O3ohb7+JiTNTFxqEVfjAy+xjE0O6uj
qfgPh5e+S22xtG2gvZwh
=tqE5
-----END PGP SIGNATURE-----
Merge tag 'qcom-dts-for-5.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into arm/dt
Qualcomm Device Tree Changes for v5.2 - Part 2
* Add cxo_board as ref clk for DSI phy
* tag 'qcom-dts-for-5.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
ARM: dts: qcom-apq8064: Set 'cxo_board' as ref clock of the DSI PHY
Signed-off-by: Olof Johansson <olof@lixom.net>
and veyron chromeos devices in particular (regulators, suspend, cleanups)
and bulk conversion of the remaining gpios to the helper constants denoting
the iomux.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAly/e34QHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgQrnCACfbN22yHoWGSgTan4L08XQ0hkU53t6PNsA
qyuN/IPdI93bRy/RnFE+Fz9ml9mu9FeuPANEIcdAPyG1NIJxo5q/jOh3+3wOmYqD
0ibgmEL0+WoVJcHwCjlCslei5yNn5/8aYaUkXOwYklKTyA79fPpvym55ds6uqgr/
bhgtr0BE+cQKJKVE12FPM9eUSsz/0huRl9NyFbuLGaViJ+2HjHp7M5Cr40/Lepz/
R48t9RJONGeAQtzyMRrIB6d+AqtvADtojwcmCij1ut/tl5WxlVt5McdilfaYmY5B
hWklMi+fwmEu/hwb3ohL4rqRrM+dKAFT2U+MwMek7etqStIW3yHa
=ctep
-----END PGP SIGNATURE-----
Merge tag 'v5.2-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt
Much love for rk3288 in general (power coefficients for the scheduler)
and veyron chromeos devices in particular (regulators, suspend, cleanups)
and bulk conversion of the remaining gpios to the helper constants denoting
the iomux.
* tag 'v5.2-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: vdd_gpu off in suspend for rk3288-veyron
ARM: dts: rockchip: vcc33_ccd off in suspend for rk3288-veyron-chromebook
ARM: dts: rockchip: Add DDR retention/poweroff to rk3288-veyron hogs
ARM: dts: rockchip: Add dynamic-power-coefficient for rk3288
ARM: dts: rockchip: bulk convert gpios to their constant counterparts
ARM: dts: rockchip: Add BT_EN to the power sequence for veyron
ARM: dts: rockchip: Remove unnecessary setting of UART0 SCLK rate on veyron
Signed-off-by: Olof Johansson <olof@lixom.net>
The old "cooling-{min,max}-state" properties for thermal bindings were
ratified to "cooling-{min,max}-level" by commit eb168b70de ("of:
thermal: Fix inconsitency between cooling-*-state and cooling-*-level"),
which were later removed entirely by commit e04907dbc2 ("dt-bindings:
thermal: Remove "cooling-{min|max}-level" properties").
The pwm-fan binding, however, was apparently in-flight in parallel with
that ratification, and so managed to introduce an example of the old
properties which escaped the scope of the later cleanup and has thus
continued to be dutifully copied for new boards despite being useless.
Clean up these remaining undocumented anachronisms to minimise any
further confusion.
Acked-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add interrupt support for wathdog on Armada 38x
-----BEGIN PGP SIGNATURE-----
iFwEABECAB0WIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCXL7DygAKCRALBhiOFHI7
1QmnAJdl9XeceYsBM8ibjRwpeFncEsnIAJ9eC10vVJW1I/GOtxlHczFj68Hs2g==
=mxNK
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt-5.2-1' of git://git.infradead.org/linux-mvebu into arm/dt
mvebu dt for 5.2 (part 1)
- Add interrupt support for wathdog on Armada 38x
* tag 'mvebu-dt-5.2-1' of git://git.infradead.org/linux-mvebu:
ARM: dts: armada-38x: add interrupts for watchdog
Signed-off-by: Olof Johansson <olof@lixom.net>
- New board support: imx50-kobo-aura, imx53-m53menlo, imx6dl-eckelmann,
imx7d-mba7, imx7d-zii-rpu2, and vf610-zii-spb4.
- Add i2c, mmc and spi aliases for SoC i.MX35, i.MX50 and i.MX6SL.
- Use new 'reset-gpios' property describing CODEC reset pin for board
mx6qdl-zii-rdu2, imx6qdl-gw5903 and imx6qdl-var-dart.
- Specify viewport count for PCIE block on SoC imx7d and imx6qdl.
- Correct 'ipg' clock of SDMA device for i.MX5, i.MX6 and i.MX7 SoCs.
- Rename MMDC memory controller device to be generic and add MMDC
device for imx7ulp SoC.
- Add OCOTP device support for imx7ulp SoC.
- Improve ZII board DTS by switching to SPDX identifier and using generic
device node name.
- A series from Rui Miguel Silva to add various media related devices
for i.MX7 SoC, and enable ov2680 sensor support for imx7s-warp board.
- Random small updates on various board support.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJcvnAtAAoJEFBXWFqHsHzO3sMIAJf0bti3jbXU734/K47jXRab
FzyAomL2OyblolwUKjpWjpC84xQy1/3v8Y3V5YCu8X4GdGVoOLkzk5VFKZJPA78k
UAfvxTY1fGgi7F+UM0aTgB7Gar7BaRnXbdHb14P/9xNyaIrkqmJ4jRXQOx5LU55m
pG6ej3E691N4OYycdayN4RY/7XS/afv57+W6B1uDJF/5PP5lCGAC0HxWVBvHoxCW
a0oCifjINI5ND/kQFIgUlrdcBaVR9CkoonQAPMPHG1CDBJa7t9MaJUt1WT0d4sxT
RSmfGrJRhsCRHHP5DGPjT4Fg41WXCZF55a45gsL9PTSuwYUmhUOzuHnOys3bUDs=
=u6zj
-----END PGP SIGNATURE-----
Merge tag 'imx-dt-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX arm device tree update for 5.2:
- New board support: imx50-kobo-aura, imx53-m53menlo, imx6dl-eckelmann,
imx7d-mba7, imx7d-zii-rpu2, and vf610-zii-spb4.
- Add i2c, mmc and spi aliases for SoC i.MX35, i.MX50 and i.MX6SL.
- Use new 'reset-gpios' property describing CODEC reset pin for board
mx6qdl-zii-rdu2, imx6qdl-gw5903 and imx6qdl-var-dart.
- Specify viewport count for PCIE block on SoC imx7d and imx6qdl.
- Correct 'ipg' clock of SDMA device for i.MX5, i.MX6 and i.MX7 SoCs.
- Rename MMDC memory controller device to be generic and add MMDC
device for imx7ulp SoC.
- Add OCOTP device support for imx7ulp SoC.
- Improve ZII board DTS by switching to SPDX identifier and using generic
device node name.
- A series from Rui Miguel Silva to add various media related devices
for i.MX7 SoC, and enable ov2680 sensor support for imx7s-warp board.
- Random small updates on various board support.
* tag 'imx-dt-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (59 commits)
ARM: dts: imx7s: Specify #io-channel-cells in ADC nodes
ARM: dts: vf610-zii-dev-rev-b: Specify CS as GPIO_ACTIVE_LOW in spi0
ARM: dts: vf610-zii-dev: Mark i2c0 SCL as GPIO_OPEN_DRAIN
ARM: dts: Add support for ZII i.MX7 RPU2 board
ARM: dts: bugfix tqma7 soft reset issue
ARM: dts: imx53: Add Menlosystems M53 board
ARM: dts: imx53: Rename M53 SoM touchscreen node
ARM: dts: imx6dl-sabreauto: update opp table for auto part
ARM: dts: imx: Use generic node names for Zii dts
ARM: dts: imx: Switch Zii dts to SPDX identifier
ARM: dts: imx6q-logicpd: Shutdown LCD regulator during suspend
ARM: dts: imx6q-logicpd: Enable Analog audio capture
ARM: dts: imx6sll: add cooling-cells for cpu-freq cooling device
ARM: dts: imx50: Add Kobo Aura DTS
ARM: dts: imx6qdl-var-dart: Use new CODEC reset pin name
ARM: dts: imx6qdl-gw5903: Use new CODEC reset pin name
ARM: dts: mx6qdl-zii-rdu2: Use new CODEC reset pin name
ARM: dts: imx50: Specify IMX5_CLK_IPG as "ahb" clock to SDMA
ARM: dts: imx51: Specify IMX5_CLK_IPG as "ahb" clock to SDMA
ARM: dts: imx53: Specify IMX5_CLK_IPG as "ahb" clock to SDMA
...
Signed-off-by: Olof Johansson <olof@lixom.net>
* R-Car E2 (r8a7794) based Alt board
- Enable USB and DA9063 PMIC
* R-Car V2H (R8A77920) based Blanche board
- Enable IIC3 and DA9063 PMIC
* RZ/G1C (r8a77470) based iWave SBC
- Enable HDMI, USB Phy[01], USB2.0 Host and HS-USB
* RZ/G1C (r8a77470) SoC
- Describe DU, VIN, PWM and HSCIF, USB PHY, USB2.0 Host and HSUSB in DT
* RZ/A1H (R7S7210) based rskrza1 board
- Enable remaining LEDs and I2C
* R-Mobile A1 (r8a7740) based ape6evm,
R-Car H1 (r8a7779) based marzen,
R-Car M1A (R8A7778) based bockw and
Emma Mobile EV2 based kzm9d boads
- Tidy up bootargs
* R-Mobile A1 (r8a7740) based ape6evm
- Enable NOR FLASH
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE4nzZofWswv9L/nKF189kaWo3T74FAly5a1oACgkQ189kaWo3
T75nFBAAlpilL1lHAzKp9ULF4DEuHRHLaYa4UhFAXWHXEF0hKPrG2/ibwFcHUxf5
fWuopUIIWqXhGb/p99EzErjjA5+l+qTx7WQWASownti94DQA8Scp9KT0NTGSupw5
nuu9EWS9epeAxH47uCC3DePVlL30uQ3bdaQazC6ULWU0SCVmZIl4tnWWL+YXPirC
Gzxez7EttiU3KEaAH+3gVJJreqEpxVNLT8kd/sxXxfGn12mlosyCmb4f20A5erMq
F5d2sVtR5AgAm+nALjPjXb6XstnzIDuca6ZYKmlkKZRMTxYObdek96EAGyL15HTi
sGdtnsk6cZZ08veVHRMD5NCyNKNw6aCdWTfNPw4+JW5k3boVgWIQFjrJD6fhwo4c
wN/DXCfT4WGwK0ok42EuRA2mEJl6PPin7Pf40j+wgO5pYEc+0zu38WTJ2/R0IezA
ej3Itgdvaw2zWlfjKw4Sobexph2uvw93Kd+LuRU7yDpuEp6jJVC/n5IoV8ozP5zg
qRw/H3e/po/F7UXe7/mdas7XcWdrxZ9kTi7a6JTJDMf7/RTB97+yURFPMPU2CdeW
5YQJUHG4oZIJO6vHnbmSEi8JA69eM8ecoiRYNP+DUpfz/wp2iUKYYNbRkeKloy+C
TrAHR3RXGh6zttiLrtC8Adch4GePUJf8aS0BWIip8/+TueupkOM=
=rKrw
-----END PGP SIGNATURE-----
Merge tag 'renesas-arm-dt-for-v5.2' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into arm/dt
Renesas ARM Based SoC DT Updates for v5.2
* R-Car E2 (r8a7794) based Alt board
- Enable USB and DA9063 PMIC
* R-Car V2H (R8A77920) based Blanche board
- Enable IIC3 and DA9063 PMIC
* RZ/G1C (r8a77470) based iWave SBC
- Enable HDMI, USB Phy[01], USB2.0 Host and HS-USB
* RZ/G1C (r8a77470) SoC
- Describe DU, VIN, PWM and HSCIF, USB PHY, USB2.0 Host and HSUSB in DT
* RZ/A1H (R7S7210) based rskrza1 board
- Enable remaining LEDs and I2C
* R-Mobile A1 (r8a7740) based ape6evm,
R-Car H1 (r8a7779) based marzen,
R-Car M1A (R8A7778) based bockw and
Emma Mobile EV2 based kzm9d boads
- Tidy up bootargs
* R-Mobile A1 (r8a7740) based ape6evm
- Enable NOR FLASH
* tag 'renesas-arm-dt-for-v5.2' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (21 commits)
ARM: dts: ape6evm: Reorder bootargs
ARM: dts: marzen: Add rw to bootargs and use ip=dhcp
ARM: dts: bockw: Reorder bootargs
ARM: dts: kzm9d: Add rw parameter to bootargs
ARM: dts: iwg23s-sbc: Enable HS-USB
ARM: dts: r8a77470: Add HSUSB device nodes
ARM: dts: iwg23s-sbc: Enable USB USB2.0 Host
ARM: dts: r8a77470: Add USB2.0 Host (EHCI/OHCI) device
ARM: dts: iwg23s-sbc: Enable USB Phy[01]
ARM: dts: r8a77470: Add USB PHY DT support
ARM: dts: r8a77470: Add VIN support
ARM: dts: r8a77470: Add PWM support
ARM: dts: r8a77470: Add HSCIF support
ARM: dts: alt: Enable USB support
ARM: dts: rskrza1: Add remaining LEDs
ARM: dts: rskrza1: Add I2C support
ARM: dts: iwg23s-sbc: Add HDMI support
ARM: dts: r8a77470: Add DU support
ARM: dts: ape6evm: Add NOR FLASH
ARM: dts: alt: Add DA9063 PMIC node
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Our usual bunch of changes shared between arm and arm64, the most notable
one being:
- Fix of improper usage of DT bindings, thanks to the DT validation
- Add the SID for the H3 and H5
- New board: RerVision H3-DVK
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXLm2aQAKCRDj7w1vZxhR
xQJYAQDs7mcoEHwBqw+1iZGmHZuvj4jJXdAd/FkmoujMawaGoQD/a4zddy8AL7s9
WA9I42cSuBwfZjftLX/br4Ycssd1sgQ=
=90I8
-----END PGP SIGNATURE-----
Merge tag 'sunxi-h3-h5-for-5.2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt
Allwinner H3/H5 changes for 5.2
Our usual bunch of changes shared between arm and arm64, the most notable
one being:
- Fix of improper usage of DT bindings, thanks to the DT validation
- Add the SID for the H3 and H5
- New board: RerVision H3-DVK
* tag 'sunxi-h3-h5-for-5.2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: dts: sun8i: mapleboard: Remove cd-inverted
ARM: dts: sunxi: h3/h5: Remove useless phy-names from EHCI and OHCI
ARM: dts: sun8i: h3: bluetooth for Banana Pi M2 Zero board
ARM: dts: sun8i: h3: Add default dr_mode
ARM: dts: sun8i: h3: Refactor the pinctrl node names
ARM: dts: sunxi: h3/h5: Remove stale pinctrl-names entry
ARM: dts: sunxi: h3/h5: Add device node for SID
ARM: dts: sun8i-h3: Add support for the RerVision H3-DVK board
Signed-off-by: Olof Johansson <olof@lixom.net>
This PR is pretty significant, but it been mostly about:
- Fixing the DTC warnings in most of our DT. We're now down to 2
warnings, from several thousands.
- Fixing a good number of minor issues, typos, and so on thanks to the DT
validation tools
- Describe the MBUS controller and the special DMA RAM mapping on the A13
- Add support for the LRADC on the A83t
- Add support for the I2C bus used for the PMIC on the A33
- Start using the DT annotation /omit-if-no-ref/ on our pinctrl nodes
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXLmxsgAKCRDj7w1vZxhR
xQs0APwIUuCrLfRD0av6xeCI4bon+G6drCxNVqkgf/cm3sAd5AEAzd6Ok74CEJar
xlSPxgqpBxCVyt2bxQxfN5mch2OPKgA=
=HH/F
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-for-5.2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt
Allwinner DT changes for 5.2
This PR is pretty significant, but it been mostly about:
- Fixing the DTC warnings in most of our DT. We're now down to 2
warnings, from several thousands.
- Fixing a good number of minor issues, typos, and so on thanks to the DT
validation tools
- Describe the MBUS controller and the special DMA RAM mapping on the A13
- Add support for the LRADC on the A83t
- Add support for the I2C bus used for the PMIC on the A33
- Start using the DT annotation /omit-if-no-ref/ on our pinctrl nodes
* tag 'sunxi-dt-for-5.2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (65 commits)
ARM: dts: sun8i: a83t: Enable USB OTG controller on some boards
ARM: dtsi: axp81x: add USB power supply node
ARM: dts: sun5i: Reorder pinctrl nodes
ARM: dts: sun6i: i7: Remove useless property
ARM: dts: sun4i: lime: Fix the USB PHY ID detect GPIO properties
ARM: dts: sun4i: protab2: Remove stale pinctrl-names entry
ARM: dts: sunxi: Remove useless phy-names from EHCI and OHCI
ARM: dts: sun8i: v40: bananapi-m2-berry: Sort device node dereferences.
ARM: dts: sun5i: Add the MBUS controller
dt-bindings: sunxi: Add compatible for OrangePi 3 board
ARM: dts: sun8i: a83t: Add I2C2 pinmux setting for PE pins
dt-bindings: arm: sunxi: Add Beelink GS1 board
ARM: dts: sun8i: tbs-a711: Add support for volume keys input
ARM: dts: sunxi: Add R_LRADC support for A83T
ARM: dts: sunxi: Improve A33 NAND transfers by using DMA
ARM: dts: sun8i: tbs-a711: Enable UART2 (for NEO-6M GPS module)
ARM: dts: sunxi: Remove useless pinctrl nodes
ARM: dts: sunxi: Remove pinctrl groups setting bias
ARM: dts: sunxi: Remove useless address and size cells
ARM: dts: sunxi: Conform to DT spec for NAND controller
...
Signed-off-by: Olof Johansson <olof@lixom.net>
This contains a set of changes to move PLL power supplies to the XUSB
pad controller, which is necessary to ensure the proper sequencing
during boot. Other patches in this set clean up usage of SPDX license
identifiers in device tree files as well as add support for the ACTMON
hardware on Tegra30.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAly4jj0THHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoVtzEACmrojN8vh3Au0dZ8m7h+DyscYFlOFW
nQ+sSav8SR9j+MhpUGfMOPY7Hk4AjGwOM0zV5EW91hfnRl0BdyWPhAhD8xiT0lnG
sa/alwIScWSWpAHvoJ7jro0/8pLkNh5G98mpxJlHcyNOQWXW/L35H/8XdtgLMXng
mgoQpLigzwpS6Q31TA6BdhelRPJ6pibkHsy1FErrMheHdyRAhlS+mJTfgOGp0OP4
T/cMn5gc/Shdy4mJl4K6t/vQ7fMkxNnfqOCa2q4mDDo254tuOU5GPG5pG16yw6Xp
2p9JYXa9sdTLFTfa4QcQubujm1DVqTml11yOStuetYOklWTowbxyqGoCggHZZZTi
FiLKylnfwVlDEaCUu+IP6bsW2zgmovfKuZooKYDT2A8yimZYixYPZbmMmYyGIDEr
GxtP++f9GSqgqDSQLOYfPgtoOAWe74nhPEZFzlyeC/CKZQvZeEG/OiVEIUdfglkj
SMrvQ9Wb8K/sqjlj2p5p0/SLdUHAz/DgTBm7MDz0IAdurYL5bGwE0qULZDQPeF3s
43mkuX/E4F31S2yUelyi7GkMAZVdo5WqqKN+Fq8S3QTm8QUuZTx4bVBgdJhzOnVS
WniclDYTguK4LNCE9ryGNXsN5/T9f1RE5JTd4VqMW9+oLu8e32EGP5QxWYTGpD/5
R3EF+VYdwK60Zw==
=Gc2T
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-5.2-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
ARM: tegra: Device tree changes for v5.2-rc1
This contains a set of changes to move PLL power supplies to the XUSB
pad controller, which is necessary to ensure the proper sequencing
during boot. Other patches in this set clean up usage of SPDX license
identifiers in device tree files as well as add support for the ACTMON
hardware on Tegra30.
* tag 'tegra-for-5.2-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Add ACTMON support on Tegra30
ARM: tegra: venice2: Move PLL power supplies to XUSB pad controller
ARM: tegra: nyan: Move PLL power supplies to XUSB pad controller
ARM: tegra: jetson-tk1: Move PLL power supplies to XUSB pad controller
ARM: tegra: apalis: Move PLL power supplies to XUSB pad controller
ARM: tegra: Remove gratuitous parentheses in SPDX license identifier
ARM: tegra: Convert to SPDX license tags for Tegra124 Apalis
Signed-off-by: Olof Johansson <olof@lixom.net>
This series of changes adds a new pinmux instance defines for am335x,
and a new AM33XX_PADCONF macro. And then the rest of the series updates
the dts files to use it.
The reasons for doing this is the pinmux configuration has been hard to
use and read. And we need to do this for eventually for moving to use
values.
This change is done one machine at a time, and can be easily reverted
as needed in case of unexpected trouble. The old macro is still working,
and we're planning to keep it around until we eventually change to use
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAly18IoRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXPwQA//ajq5abErjoCtPQrf/4bv9NdZQcBkRaHa
k4pZ8hgWvLQYzNDZirQhe174UUCUUIdc7yppRYzgjqYmWLvNHSs4ax9SeBKn1bHd
40gZMzmJeHByRNjK1WHHUBLXtuMRIbOk7k4Lcgqi3en1a9jHnJaq0h/Xde69nrWz
rjcewWEbZeqYvIRZJDv17vbY3DY6gebP3DQzKLEX89vTfMJF0vgTm6YVskhW1Jtx
3Coj/M5e3//gDRBD8bpLdOac1irQe2+MMFMh4GH9ctF9/ZK45cXKz3p8j+em0YgJ
yYXimAFqVY0lQuFNC6L/PfsQ8YDSuVTHqTS6vajZvqoDB4wMsYjw8ivag5S0NpqV
baaft1SyQ1x7YeuKny/jSZ+1vYIe2Omms45Dc3JYLX2EltLDDEzriPpohIcqetOp
XJfxAEFbAU9Mk1tMSS8hvpoj9ezodQz3tYS8Mwc15Dg2SDfT7yya1kDowOpVa9sn
MKvFZ5jIfYdq3es/vDm9sa0qunmQBX1iM5Jzp1u+GUYa5p7kTcojCd++FoR7/do5
R2V96N8NaxUTATCEpMCxCJsSYeQrc4ZmnUWBHRVntQJrPxolTwRpH3yEWMBFN4l1
7XU56mEkDzXQMnHJbrzOyNWa/iAmYqUJXU9WbvrmMOv3ZMro7NqIl5mD46XkBBBK
8BzayzP1QRg=
=QimO
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v5.2/dt-am3-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
Add am335x pinmux defines and start using them
This series of changes adds a new pinmux instance defines for am335x,
and a new AM33XX_PADCONF macro. And then the rest of the series updates
the dts files to use it.
The reasons for doing this is the pinmux configuration has been hard to
use and read. And we need to do this for eventually for moving to use
values.
This change is done one machine at a time, and can be easily reverted
as needed in case of unexpected trouble. The old macro is still working,
and we're planning to keep it around until we eventually change to use
* tag 'omap-for-v5.2/dt-am3-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (38 commits)
ARM: dts: am335x: wega: Replaced register offsets with defines
ARM: dts: am335x: sl50: Replaced register offsets with defines
ARM: dts: am335x: shc: Replaced register offsets with defines
ARM: dts: am335x: sbc-t335: Replaced register offsets with defines
ARM: dts: am335x: sancloud-bbe: Replaced register offsets with defines
ARM: dts: am335x: phycore-som: Replaced register offsets with defines
ARM: dts: am335x: pepper: Replaced register offsets with defines
ARM: dts: am335x: pdu001: Replaced register offsets with defines
ARM: dts: am335x: pcm-953: Replaced register offsets with defines
ARM: dts: am335x: osd335x-common: Replaced register offsets with defines
ARM: dts: am335x: osd3358-sm-red: Replaced register offsets with defines
ARM: dts: am335x: nano: Replaced register offsets with defines
ARM: dts: am335x: moxa-uc-8100-me-t: Replaced register offsets with defines
ARM: dts: am335x: moxa-uc-2101: Replaced register offsets with defines
ARM: dts: am335x: moxa-uc-2100-common: Replaced register offsets with defines
ARM: dts: am335x: lxm: Replaced register offsets with defines
ARM: dts: am335x: igep0033: Replaced register offsets with defines
ARM: dts: am335x: icev2: Replaced register offsets with defines
ARM: dts: am335x: evmsk: Replaced register offsets with defines
ARM: dts: am335x: evm: Replaced register offsets with defines
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add base support for Agilex platform
- Add 'cap-mmc-highspeed' Stratix10 and 32-bit SoCFPGA platform
- Increase Stratix10 QSPI support to 100 MHz
-----BEGIN PGP SIGNATURE-----
iQJIBAABCgAyFiEEoHhMeiyk5VmwVMwNGZQEC4GjKPQFAly1Mv8UHGRpbmd1eWVu
QGtlcm5lbC5vcmcACgkQGZQEC4GjKPS7mg//d56np59wWQ1k4wP7FFo3ewnNcqdu
Zr3e2T586KCRFpCAH2zsY32jzPLPgzgX0ssiXg4FDr8Q0tptDfYFtkzUfM+9J8LH
91VhGCUoq3YfKudnovl4vOo9QLTXyXxm9qSv4MN+8z+np/uLOc05qWFrPS6Ylh0O
cYcC/1hif8svnxziH9d7QwF3Eely8aYAETY4waQVG5SDkzVMG9JuecC8rfxfOyCv
uMy4jBTeOY7xDAJwl0yILPcI3qLZX97AoBUD64b7TmgGkrraSm9xijDmQKRFgFlz
r42Ze4o1kjY+iKYefyXJiE+k4TQUoark8V0tBLst8KujiveH6gPQ8T8s75d0djFj
r9koVafOege64KsY3Gdrkkv7e9vI8oCqcy/dvoApb9RBA3X+4V/gXJCZxv5KPOcn
t3/swEsHKYnmJ1GumkmCnO+2aGKkDcJewJkQrnU4DNC8AVyGOyehPu9kqYfrMC3g
eODzoHWC+4ZKltglfxP0mihqXHXcdYrSHfxAKtWAZyTect20w5w3dCsvvvpoxaA2
gYr008kqrGVIxumpCZlbaEVnr/0PnHdiMstIWMVsIOsvs8EuvQrbmJJS2TSqhhI0
gUFyADgnh4RCV/cD3EeYC9dokM6Ms2SDB/r7QdnQG1aELkVi51hSJf201w6fYemI
Uq1EBLmMGaF8zow=
=PxBZ
-----END PGP SIGNATURE-----
Merge tag 'socfpga_dts_updates_for_v5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/dt
SoCFPGA DTS updates for v5.2
- Add base support for Agilex platform
- Add 'cap-mmc-highspeed' Stratix10 and 32-bit SoCFPGA platform
- Increase Stratix10 QSPI support to 100 MHz
* tag 'socfpga_dts_updates_for_v5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
arm64: dts: agilex: Add initial support for Intel's Agilex SoCFPGA
arm64: dts: stratix10: increase QSPI max frequency to 100MHz
arm64: dts: stratix10: enable MMC highspeed support
ARM: dts: socfpga: enable MMC highspeed support
Signed-off-by: Olof Johansson <olof@lixom.net>
- This adds the MCDE display controller and some displays.
- The Lima MALI-400 driver is added to the kernel, so
let's add this block to the Ux500 DTS file.
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJct5oFAAoJEEEQszewGV1zpwsQAJ0pbd2GkXZ0AfmbTr8qgJmn
Dy8rxTwI7cmdTI1RnQNANTwvhypZDeslZ6tCb/5KqSE7cC6gSy7c+QaTiWfjSYud
NQt/vMrQI+ijOq+shABnk6S4ig2G4WDbCW04cKlWSODbH+bAdJ5LFNkiAeTR0DRm
n8OjzottC+jbICz/D4o07yZv/MesmVJziC+i8DnYZlEIWGPCpNHmXGaVi5fOFue0
ty83/C/lKMb///9XNuvTR4X03R+yARb0n54pQ/bo1eECq9zc2qcX6iXEOYiQLHul
tHKYY6MC7wEIpPJ4uNDtsFvIeAUsI6RWgtDGbnh8zUecpYKDbwbyV7KOFIMF/NEd
eG7ZHaguWhXIcHoYCEyunmUSdVFQJjPk8dfk7M+Fv9wCqihOoGRlyi0mEZCuypEA
YTi27mBAUQEWn6Ub1V/vRdILmh2ACBXn5kntJYq4RYofH1FkyuZ8FK5pxb7uV3zy
w0fhy2ZZMtAQ5+iD0YyCaehcSE7FR3C7aIPnV5BBXaIRRAZWQUqSP2xGd8hs++J0
/0hSEO2NNg7067XMAJyl4aUjUbO2kBzvX5PeKpm8l6CtRnQLoO0wUFiaInM7IxjC
wJWgd2o0ht9ZPNoTCcptSqd7q0zrDnK+kSXjswOEy1Qn77bb5relXEykPoBYwjIv
Oe+k3VpboUWbIvpH340D
=IT/9
-----END PGP SIGNATURE-----
Merge tag 'ux500-dts-v5.2-armsoc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into arm/dt
Ux500 DTS changes for the v5.2 kernel cycle.
- This adds the MCDE display controller and some displays.
- The Lima MALI-400 driver is added to the kernel, so
let's add this block to the Ux500 DTS file.
* tag 'ux500-dts-v5.2-armsoc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: dts: Ux500: Add MCDE and Samsung display
ARM: dts: ux500: Add Mali-400
Signed-off-by: Olof Johansson <olof@lixom.net>
This series of devicetree changes adds the l4 abe interconnect devices
and moves the devices to their right places in the hierarchy similar
to what we've already done for most l4 devices earlier. We first add
a shared omap4-mcpdm.dtsi to make adding omap4-l4-abe.dtsi easier for
the mcpdm changes. And as earlier, in case of unexpected trouble,
devices can be probed the old way by moving one device at a time to the
old place.
This series of changes depends on the ti-sysc driver changes for handling
the external optional clocks that the mcpdm relies on, and is based on
the related ti-sysc driver changes. Note that this series does not depend
on dropping of the leagcy platform data, but I already had those committed
along with the ti-sysc driver changes and noticed too late.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAly0qJARHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXMMshAAq4XkZYB07CcMugY8WO0SA1fj42CfIMis
NWqexA3K2dpwnPlj8jaAd0d5Xlmr+2S25IMHCP8qk8K+t8aFGmTfQsKif1irfk9D
Xp+8burVIZKMQcxXHfaJKTlTXCFkE6ha+Kb6sYnYjOB/lXP7rsHCn0O7MPY54Uip
a/z/NN3M1yMdJPoZZyPRaWD6nSd62FYC8hOqAlCvBe5qEM4CWdvINvvW4FMyRHCW
UHhGVvcyGV3UtiTmInQTnvbw5Ha38QESkJrhm0JnItBrxaUOfPfXnHfgZprBTO8G
yFQwMhKmokehWAO+1PiULzHdE5UiYKoy+eNgooYIM1wSor0dn9UoAThW4D69cET7
azY0xXAVzFtFc75IOgD3HWo9p00faGLW2hQP+XxAtPCQnGfR26PzCHk+VzR3b608
q40U6pkZCQ2g1P99fDDJostPz8ZuDG4vB5bE5yVwhbIWXjQWhyReJFCYoZD4hiFh
k4l5y7iPAxGndn7AjrAV7iUmqUZBJcuk+qu7YEb+nrMwwbWJA1g8+6zxYFl7TXJt
ihsOEWBQninNJ1PvesGr9DjWAvmmhQq/wtSSChd5/SGfHI9HVNedJJEFCcozrRLf
RIerncFUXKIVXV1ZNJMaQ3/U2r1f5a3867SvqeR5IGIIMhHyvVi5HXwzzB6Znszz
DTmI0uAU4FA=
=P5Js
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v5.2/dt-ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
Devicetree changes for omap4 and 5 l4 abe interconnect
This series of devicetree changes adds the l4 abe interconnect devices
and moves the devices to their right places in the hierarchy similar
to what we've already done for most l4 devices earlier. We first add
a shared omap4-mcpdm.dtsi to make adding omap4-l4-abe.dtsi easier for
the mcpdm changes. And as earlier, in case of unexpected trouble,
devices can be probed the old way by moving one device at a time to the
old place.
This series of changes depends on the ti-sysc driver changes for handling
the external optional clocks that the mcpdm relies on, and is based on
the related ti-sysc driver changes. Note that this series does not depend
on dropping of the leagcy platform data, but I already had those committed
along with the ti-sysc driver changes and noticed too late.
* tag 'omap-for-v5.2/dt-ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (44 commits)
ARM: dts: Add l4 abe interconnect hierarchy and ti-sysc data for omap5
ARM: dts: Add l4 abe interconnect hierarchy and ti-sysc data for omap4
ARM: dts: Add common mcpdm dts file for omap4
bus: ti-sysc: Add generic enable/disable functions
ARM: OMAP2+: Drop mcspi platform data for omap4
ARM: OMAP2+: Drop uart platform data for dra7
ARM: OMAP2+: Drop gpio platform data for dra7
ARM: OMAP2+: Drop i2c platform data for dra7
ARM: OMAP2+: Drop mmc platform data for dra7
ARM: OMAP2+: Drop uart platform data for omap5
ARM: OMAP2+: Drop gpio platform data for omap5
ARM: OMAP2+: Drop i2c platform data for omap5
ARM: OMAP2+: Drop mmc platform data for omap5
ARM: OMAP2+: Drop uart platform data for am33xx and am43xx
ARM: OMAP2+: Drop gpio platform data for am33xx and am43xx
ARM: OMAP2+: Drop i2c platform data for am33xx and am43xx
ARM: OMAP2+: Drop mmc platform data for am330x and am43xx
ARM: OMAP2+: Drop uart platform data for omap4
ARM: OMAP2+: Drop gpio platform data for omap4
ARM: OMAP2+: Drop i2c platform data for omap4
...
Signed-off-by: Olof Johansson <olof@lixom.net>
This series of changes configures dra7 pcie x2 lane mode, configures
am43xx-epos-evm regulators and keypad wakeup source, and uses standard
reset-gpios instead of gpio-reset for n810.
We also need to split dra7 dtsi files for properly supporting dra76x
and am576 as some of the devices are different such as usb and pruss.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAly0pfQRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXNM3BAAvrQsjq1NTq6k7L5yZuInYtP+L7isRTz3
M7AWpMOjXex+a3GoZ8a8qrRVc6IqohAid75y8Y1qDvFVi9QEMrCsYlRwlYl048UM
o5Ry4CePIY9XvUurRIemisT5/RQ4jzz9BBPogIJeQHl9r4qKbZEzTllmHnE7D78i
Eh52IHQKScyO5MmUxZErH2f2StPHINjvO5WeuUUGcDcg7pcRlnbgLDtx26deewbl
qMCh/3u71vd0g1JyEScOSq/QkeASpDx0sJifCLeWOmRZyarQGg5SduxVnQ6OJo8U
xqiQ5dNYEn4BASOZ6BFGmSyqjvQWgmA0RnxkGB9nYPk9s9Lafq+gWgFNrI99Eavm
BERMXlsrOJ/y5STjx+wmZ/IEeUceNqHK44xr8hcYweiu1Duv8+lfRRLLOdj2besh
SPYsomoqY1yQKvr3k7YcuCddsFQZ9RtcaLVjlJmNlDE078jI1f/v9ZLXY8K8ZF3G
gm07S/HtuX7xWM/fRveXrP2YQ+OREoyo5cTeDAyZmk/bY3sqVwgRuicgXAqu0Zdg
AJQCnNda4UAIohtC98RHS1MB5BuwTyv431iAsxaAvK2cAR8NnV3qr5AmBbgP1iMP
/oLeXA6OpfT+JHk/tGQ0TG9LrqNqW9DyZZOqfXCGYTiRJd06qUxvPIZOsUQFnJho
jIsDaa4YQjc=
=uc0c
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v5.2/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
Devicetree changes for omap variants
This series of changes configures dra7 pcie x2 lane mode, configures
am43xx-epos-evm regulators and keypad wakeup source, and uses standard
reset-gpios instead of gpio-reset for n810.
We also need to split dra7 dtsi files for properly supporting dra76x
and am576 as some of the devices are different such as usb and pruss.
* tag 'omap-for-v5.2/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: dra7: Separate AM57 dtsi files
dt-binding: arm: omap: Add information for AM5748
ARM: dts: omap2420-n810: Use new CODEC reset pin name
ARM: dts: am43xx-epos-evm: Add matrix keypad as wakeup source
ARM: dts: am43xx-epos-evm: Keep DCDC3 regulator on in suspend to memory
ARM: dts: am43xx-epos-evm: Keep DCDC5 and DCDC6 always on
ARM: dts: dra7: Add properties to enable PCIe x2 lane mode
Signed-off-by: Olof Johansson <olof@lixom.net>
1. Use proper ADC on Exynos4412.
2. Extend the Exynos5420 Arndale Octa board with: CPU cooling maps,
unused regulators, ADC and UHS-I SD card support. Beside that adjust
regulators to proper level and add always-on when needed.
3. Extend the Exynos5260: high speed I2C and proper external interrupts.
Also fix shared external interrupt line and use better PLL for MMC
clocks.
4. Fix audio recording (broken around v5.1) and microphone recording
(since v4.14) on Exynos5422 Odroid XU3 boards.
5. Minor cleanups (stdout-path and bootargs).
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAlyzVAUQHGtyemtAa2Vy
bmVsLm9yZwAKCRDBN2bmhouD1zDYD/90pj6rKICJZh1N/63rsTR1WBFRNu+C2gMc
Rw7A3IFVcL32yiofCiWqZ0DXQ7s7+uYMGT78d8HXZIoEHqWH0RmNZfrLc5aVG4xe
cEYaaoZyrr/aJdUIQo1ZaoVQCyDB7zIMGkjQh/+s73+kXeEId10uhxkeD7e/6PFG
j0q1SuGnD6jNZuutDJlg38uJ5PL3MC4PWACzdTIUnyX9cBQfiIsCWYwwtNIh7zlG
3vNm97UcBtb6mjlut/PiGlVfG8QVibU+6D+cdZVIki9l72yCjBEdoTultHGFPhzK
E8bwl2DI1d1NVny47+X9+NdlbQuVlMTF+pgi3JhF0nojOMjk+AdpK3pR6nKBS8jX
44oDCVQFf2mQe1pD90teyCd7CqU51YiNap2LWObxT6UhaObNa1oOwJtvbDgStNCz
tX7INDKrLHoX85MryWpEu8U22uckdkRGf+0hYRcHE6ga9N+WOVFK+TLCL3MoKE/1
zRfSWzAdS4ySVaMmOf3NQCz2bakbzbDjfDcdk+oBCoNvcpnUGtlgvYvHt4ZBx+3L
bFtbu6bfkI5WuIY7ZyswWXfP5uVK63O1xj/386dAP6L/83/opuD6GXLW80RrRsfn
VNPRv1kQ6UuXedViBkw4a68rGmiQb/ozVjroDSRzCyxA/5HRZ1ysy+3+C+JtmZZC
i3T1TrbUdA==
=xLxq
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt-5.2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM changes for v5.2
1. Use proper ADC on Exynos4412.
2. Extend the Exynos5420 Arndale Octa board with: CPU cooling maps,
unused regulators, ADC and UHS-I SD card support. Beside that adjust
regulators to proper level and add always-on when needed.
3. Extend the Exynos5260: high speed I2C and proper external interrupts.
Also fix shared external interrupt line and use better PLL for MMC
clocks.
4. Fix audio recording (broken around v5.1) and microphone recording
(since v4.14) on Exynos5422 Odroid XU3 boards.
5. Minor cleanups (stdout-path and bootargs).
* tag 'samsung-dt-5.2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Remove console argument from bootargs
ARM: dts: exynos: Use stdout-path property instead of console in bootargs
ARM: dts: exynos: Fix spelling mistake of EXYNOS5420
ARM: dts: exynos: Fix audio (microphone) routing on Odroid XU3
ARM: dts: exynos: Always enable necessary APIO_1V8 and ABB_1V8 regulators on Arndale Octa
ARM: dts: exynos: Extend the eMMC node on Arndale Octa
ARM: dts: exynos: Add support for UHS-I SD cards on Arndale Octa
ARM: dts: exynos: Adjust ldo23 and ldo27 to lower levels on Arndale Octa
ARM: dts: exynos: Fix audio routing on Odroid XU3
ARM: dts: exynos: Enable ADC on Arndale Octa
ARM: dts: exynos: Fix interrupt for shared EINTs on Exynos5260
ARM: dts: exynos: Add interrupts for dedicated EINTs on Exynos5260
ARM: dts: exynos: Add high speed I2C ports for Exynos5260
ARM: dts: exynos: Use bustop PLL as the source for MMC clocks on Exynos5260
ARM: dts: exynos: Order nodes alphabetically in Arndale Octa
ARM: dts: exynos: Add CPU cooling on Arndale Octa
ARM: dts: exynos: Add unused PMIC regulators on Arndale Octa board
ARM: dts: exynos: Use stdout path property on Arndale Octa board
ARM: dts: exynos: Document regulator used by ADC on Odroid U3
ARM: dts: exynos: Use ADC for Exynos4x12 on Exynos4412
Signed-off-by: Olof Johansson <olof@lixom.net>
Highlights:
----------
MPU part:
-Add initial support of stm32mp157a-dk1 board:
This board embeds a STM32MP157a SOC with AC package (TFBGA361, 148 ios)
and 512MB of DDR3. Several connections are available on this boards:
4*USB2.0, 1*USB2.0 typeC, SDcard, RJ45, HDMI, Arduino connector, ...
-Add initial support of stm32mp157c-dk2 board:
This board is a "super-set" of stm32mp157a-dk1. It embeds a STM32MP157c SOC
with AC package (TFBGA361, 148 ios) and 512MB of DDR3. Same connections
than stm32mp157a-dk1 board are available. Display panel (otm8009a) and
Murata wifi/BT combo is added.
-Add and enable SD card support (MMCI variant) on stm32mp157c-ed1/ev1 and
on stm32mp157a-dk1/dk2 boards.
-Add and enable PMIC support (STPMIC1 chip) on stm32mp157c-ed1/ev1 and
on stm32mp157a-dk1/dk2 boards.
-Add and enable IPCC mailbox support on stm32mp157c-ed1/ev1 and
on stm32mp157a-dk1/dk2 boards.
-Add sysconfig clock support on stm32mp157c.
-Add romem and temperature calibration support on stm32mp157c.
-Add SPDIFRX support on stm32mp157c.
-Enable CEC on stm32mp157a-dk1/dk2.
MCU part:
-Add and enable SD card support (MMCI variant) on stm32h743 eval and disco
boards.
-Add romem and temperature calibration support on stm32f429
(and so stm32f469).
-Enable stm32f769 clock driver
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJcrzgEAAoJEH+ayWryHnCFhDMP/iRTr5Wcsj21zwv7vi4ntuCR
jkJ3820EGx2kVdxeNuCfMGwZKnCVefqca3AsjAgoD9FskUzdi82JQ2Tdl8B4MxFQ
lDuySiQs+7kkJuXccnOppz+ZcQRj3Ff0I5GlS3tvlAn1Ld6JqhBVEQ6DY6R8XBFx
ICkpoPKCpjkeZliOejNU7syY0vFrUoSjMz9tMncFJ8DkuioYISHNlj4f5P+MpWRZ
g8dbavXfQi/41yRH9KIvQiEy5ko5uDJxCac+JL7bkF522UJG93rEGn4K66JjYRX/
/vZ5ktE8oA6GUidPSbz/ETqlAwUQgzMFtI4mZo/lYjnf4bJ0VDJA0PEZmQn4RSb1
0JOiKROK6x/OPlDZ5qgrmtyW9HGEwWBl3UnmE8nrOA6tlqVICs7eK6meZuON/bBI
0xZiw6LQ5/ceiV2Lgpl8+n8tW8Plz9eRwDHvYKiBIxIqkY0j4U2tB6uggIfBjO1a
zLVE82ukIWN2brv5kZmf0cR0eLRrITetCMsQJnCUOhZpqbOcRq5WaUtrWqAiPI17
PBNv4UxyRwC4QjcslLBNPdYuoSyrFBw6ByOovsSde7TK3J0tuNAHa4JJULyjFTw+
YOTJz5a+One/weflamNb+FSzSW+lzcMiXjsMMU3z70CfdOqAxXE8l1/4Peg0hD/f
OKyq8WL/agAlfr1zgaj2
=k9wQ
-----END PGP SIGNATURE-----
Merge tag 'stm32-dt-for-v5.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt
STM32 DT updates for v5.2, round 1
Highlights:
----------
MPU part:
- Add initial support of stm32mp157a-dk1 board:
This board embeds a STM32MP157a SOC with AC package (TFBGA361, 148 ios)
and 512MB of DDR3. Several connections are available on this boards:
4*USB2.0, 1*USB2.0 typeC, SDcard, RJ45, HDMI, Arduino connector, ...
- Add initial support of stm32mp157c-dk2 board:
This board is a "super-set" of stm32mp157a-dk1. It embeds a STM32MP157c SOC
with AC package (TFBGA361, 148 ios) and 512MB of DDR3. Same connections
than stm32mp157a-dk1 board are available. Display panel (otm8009a) and
Murata wifi/BT combo is added.
- Add and enable SD card support (MMCI variant) on stm32mp157c-ed1/ev1 and
on stm32mp157a-dk1/dk2 boards.
- Add and enable PMIC support (STPMIC1 chip) on stm32mp157c-ed1/ev1 and
on stm32mp157a-dk1/dk2 boards.
- Add and enable IPCC mailbox support on stm32mp157c-ed1/ev1 and
on stm32mp157a-dk1/dk2 boards.
- Add sysconfig clock support on stm32mp157c.
- Add romem and temperature calibration support on stm32mp157c.
- Add SPDIFRX support on stm32mp157c.
- Enable CEC on stm32mp157a-dk1/dk2.
MCU part:
- Add and enable SD card support (MMCI variant) on stm32h743 eval and disco
boards.
- Add romem and temperature calibration support on stm32f429
(and so stm32f469).
- Enable stm32f769 clock driver
* tag 'stm32-dt-for-v5.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (24 commits)
ARM: dts: stm32: enable cec on stm32mp157a-dk1 board
ARM: dts: stm32: add cec pins muxing on stm32mp157
ARM: dts: stm32: add ltdc pins muxing on stm32mp157
ARM: dts: stm32: add I2C sleep pins muxing on stm32mp157
ARM: dts: stm32: add power supply of otm8009a on stm32mp157c-dk2
ARM: dts: stm32: Enable STM32F769 clock driver
ARM: dts: stm32: add stpmic1 support on stm32mp157a dk1 board
ARM: dts: stm32: add stpmic1 support on stm32mp157c ed1 board
ARM: dts: stm32: add spdfirx pins to stm32mp157c
ARM: dts: stm32: add spdifrx support on stm32mp157c
ARM: dts: stm32: Add romem and temperature calibration on stm32f429
ARM: dts: stm32: Add romem and temperature calibration on stm32mp157c
ARM: dts: stm32: Add clock on stm32mp157c syscfg
ARM: dts: stm32: enable IPCC mailbox support on STM32MP157a-dk1
ARM: dts: stm32: enable IPCC mailbox support on STM32MP157c-ed1
ARM: dts: stm32: add IPCC mailbox support on STM32MP157c
ARM: dts: stm32: add sdmmc1 support on stm32mp157a dk1 board
ARM: dts: stm32: add sdmmc1 support on stm32mp157c ed1 board
ARM: dts: stm32: add sdmmc1 support on stm32mp157c
ARM: dts: stm32: add sdmmc1 support on stm32h743i disco board
...
Signed-off-by: Olof Johansson <olof@lixom.net>
of cleanups for rk3288 from that area, hdmi support for the old rk3066
a small rv1108-eglin-r1 cleanup and wifi+hdmi-cec for the tinker board.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAlyjIKkQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgagZB/0djmLiIppQmphU5xz0nu9la/6qPpX2Mglk
3XIi/pQXu+O/1i4aNJJwvk9k6cmX7nbVG2vQlLcsM/XNq0fy8Y4on9UThohkg23p
Cf34w2pFn5Tp5bBTCWxa1LTi20UMVZsYZivy+/LdBlTIekEMNFHf6veIn8dBtnPW
nFjDuvlhZqg6CaxVZ9Vn6xN1ClqleR0LuUcEt2X6wE8UocDs/01wZffcFbs3K0Uo
mgz1vUd4DlhHJo2YlTa+T88OF13d7WXboNR67xJTlm69d0wfm+k3MFeZYAhiI4kx
HdsqS+ZZxzsos7X3QCDiXMCbd070yGiDudD3UY4VCKymx9DzGWmp
=YSCV
-----END PGP SIGNATURE-----
Merge tag 'v5.2-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt
Quite a bit of love for the rk3288-veyron chromeos devices and a number
of cleanups for rk3288 from that area, hdmi support for the old rk3066
a small rv1108-eglin-r1 cleanup and wifi+hdmi-cec for the tinker board.
* tag 'v5.2-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: enable vop0 and hdmi nodes to rk3066a-mk808
ARM: dts: rockchip: add rk3066 hdmi nodes
ARM: dts: rockchip: Add device tree for rk3288-veyron-mighty
dt-bindings: ARM: dts: rockchip: Add bindings for rk3288-veyron-mighty
ARM: dts: rockchip: Add vdd_logic to rk3288-veyron
ARM: dts: rockchip: Add dvs-gpios to rk3288-veyron-jerry
ARM: dts: rockchip: Add rk3288-veyron-jerry rev 10-15
dt-bindings: ARM: dts: rockchip: Add rk3288-veyron-jerry rev 10-15
ARM: dts: rockchip: Fix gic/efuse sort ordering for rk3288
ARM: dts: rockchip: Enable WiFi on rk3288-tinker
ARM: dts: rockchip: add grf reference in rk3288 tsadc node
ARM: dts: rockchip: Enable HDMI CEC on rk3288-tinker-s
ARM: dts: rockchip: remove disable-wp from rv1108-elgin-r1 emmc node
Signed-off-by: Olof Johansson <olof@lixom.net>
- Fix function tracer and unwinder dependencies so that we don't
end up building kernels that will crash.
- Fix ARMv7M nommu initialisation (missing register initialisation)
- Fix EFI decompressor entry (ensuring barrier instructions are
enabled prior to use.)
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAXMWwyfTnkBvkraxkAQJRZg/+Pf90mhZrEZk54EvxD/asPC/s2B173tjt
GqV+m7uHhfQRx1GL6zrirmOwx+fNLGc0ktlM7SGwEdljbkZ7juu/+Qbp6xe+uXPE
4PeI+NdxlQQrZ5Bye/qpINWueW+awDoJyiLuofYgfTYZZbUnHL2kmITAObRgLmmQ
MM1SrVXAleVw+IZWzPfsNiTJ5ouaSpdXMtUrfxPHU4PkxNAiTT3XJr4Uo9z2aS25
vgpdq566wq6XneOjrRU9yVvh2g+KFuxv2bJplimcxnMj8C5asC6XuDqIKXp4sLyi
OYZn5CeWIGuSdWTCaztD6cu8G0gsYL9Nf7SLYCw1YdR7SMawexu9aPE7UmLu/c1i
+a2Sd1s5eUZpUqelmdxOEIiiFssbKB0c57ntwhAPQ6vj/Gnd5kIvMMJ/sx36Je4G
7tVRDSPiNm/uU8wTy1MKGe2IOnwBUoRsryHc82Z8qaYGK8FJp3Fg3BVtJRMvZUIr
toLAm+7l0D085W0DrPCDqYTkVYocBZ7366XQGRegoZ4z5a+oPfP0OBLzotiY3LpV
KsEkBZUvhzI0IseV5U/s6htMqkgRktCSu80aYSJdHO+HQ67essOddTTV/7mxigEN
Q/f8sgMMf7/we2bgDA0qZUGl1Q6/CT8HhHO3X2pwscvA+5SWHnDwbiHOpwhHbq9l
gtR0D2vtdsY=
=DnoV
-----END PGP SIGNATURE-----
Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm
Pull ARM fixes from Russell King:
"A small number of ARM fixes
- Fix function tracer and unwinder dependencies so that we don't end
up building kernels that will crash
- Fix ARMv7M nommu initialisation (missing register initialisation)
- Fix EFI decompressor entry (ensuring barrier instructions are
enabled prior to use)"
* tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm:
ARM: 8857/1: efi: enable CP15 DMB instructions before cleaning the cache
ARM: 8856/1: NOMMU: Fix CCR register faulty initialization when MPU is disabled
ARM: fix function graph tracer and unwinder dependencies
Add 'xo_board' as ref clock for the DSI PHY, it was previously
hardcoded in the PLL 'driver' for the 28nm 8960 PHY.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Andy Gross <agross@kernel.org>
Add the 4 Quadrature counters for this board.
Reviewed-by: Esben Haabendal <esben@haabendal.dk>
Signed-off-by: Patrick Havelange <patrick.havelange@essensium.com>
Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
RNG and TIMER12 are reserved for secure side usage only on HS devices,
so disable their clkctrl clocks on HS SoCs also.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
CLK_IS_BASIC flag is about to get deprecated, and as such, can't be used.
Instead, the API call for checking whether a clock is of type hw_omap shall
be used, so convert the code to use this.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
The flags field in 'struct shash_desc' never actually does anything.
The only ostensibly supported flag is CRYPTO_TFM_REQ_MAY_SLEEP.
However, no shash algorithm ever sleeps, making this flag a no-op.
With this being the case, inevitably some users who can't sleep wrongly
pass MAY_SLEEP. These would all need to be fixed if any shash algorithm
actually started sleeping. For example, the shash_ahash_*() functions,
which wrap a shash algorithm with the ahash API, pass through MAY_SLEEP
from the ahash API to the shash API. However, the shash functions are
called under kmap_atomic(), so actually they're assumed to never sleep.
Even if it turns out that some users do need preemption points while
hashing large buffers, we could easily provide a helper function
crypto_shash_update_large() which divides the data into smaller chunks
and calls crypto_shash_update() and cond_resched() for each chunk. It's
not necessary to have a flag in 'struct shash_desc', nor is it necessary
to make individual shash algorithms aware of this at all.
Therefore, remove shash_desc::flags, and document that the
crypto_shash_*() functions can be called from any context.
Signed-off-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
The camera driver (according also to bindings) registers a clock
provider if clock-output-names property is present and later the sensors
use registered clocks.
The DTS for S5Pv210 Goni board was incorrectly adding a child node with
clock output cells but without clock-output-names property. Although
the DTS was compiling (with "/soc/camera/clock-controller: missing or
empty reg/ranges property" warning), the clock provider was not
registered.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The Universal C210 (Exynos4210) uses the secure interface of MDMA0,
instead of regular one - non-secure MDMA1. DTS was overriding MDMA1
node address which caused DTC W=1 warning:
arch/arm/boot/dts/exynos4.dtsi:707.25-716.6:
Warning (simple_bus_reg): /soc/amba/mdma@12850000: simple-bus unit address format error, expected "12840000"
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The three fixed-clocks (xusbxti, xxti and xtcxo) are inputs to the
Exynos3250 therefore they should not be inside the soc node. This also
fixes DTC W=1 warning:
arch/arm/boot/dts/exynos3250.dtsi:112.21-139.5:
Warning (simple_bus_reg): /soc/fixed-rate-clocks: missing or empty reg/ranges property
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
xusbxti fixed-clock should not have address/size cells because it does
not have any children. This also fixes DTC W=1 warning:
arch/arm/boot/dts/exynos3250.dtsi:112.21-139.5:
Warning (simple_bus_reg): /soc/fixed-rate-clocks: missing or empty reg/ranges property
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Enable the LTC2497 driver to support the two LTC2497's that are on
the SoCFPGA Arria10 Devkit.
Signed-off-by: Alan Tull <atull@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
The ARM PMU and ARM architected timer nodes are part of ARM CPU design
therefore they should not be inside the soc node. This also fixes DTC
W=1 warnings like:
arch/arm/boot/dts/exynos3250.dtsi:106.21-135.5:
Warning (simple_bus_reg): /soc/fixed-rate-clocks: missing or empty reg/ranges property
arch/arm/boot/dts/exynos3250.dtsi:676.7-680.5:
Warning (simple_bus_reg): /soc/pmu: missing or empty reg/ranges property
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
With VHE different exception levels are used between the host (EL2) and
guest (EL1) with a shared exception level for userpace (EL0). We can take
advantage of this and use the PMU's exception level filtering to avoid
enabling/disabling counters in the world-switch code. Instead we just
modify the counter type to include or exclude EL0 at vcpu_{load,put} time.
We also ensure that trapped PMU system register writes do not re-enable
EL0 when reconfiguring the backing perf events.
This approach completely avoids blackout windows seen with !VHE.
Suggested-by: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Andrew Murray <andrew.murray@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
The virt/arm core allocates a kvm_cpu_context_t percpu, at present this is
a typedef to kvm_cpu_context and is used to store host cpu context. The
kvm_cpu_context structure is also used elsewhere to hold vcpu context.
In order to use the percpu to hold additional future host information we
encapsulate kvm_cpu_context in a new structure and rename the typedef and
percpu to match.
Signed-off-by: Andrew Murray <andrew.murray@arm.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
When pointer authentication is supported, a guest may wish to use it.
This patch adds the necessary KVM infrastructure for this to work, with
a semi-lazy context switch of the pointer auth state.
Pointer authentication feature is only enabled when VHE is built
in the kernel and present in the CPU implementation so only VHE code
paths are modified.
When we schedule a vcpu, we disable guest usage of pointer
authentication instructions and accesses to the keys. While these are
disabled, we avoid context-switching the keys. When we trap the guest
trying to use pointer authentication functionality, we change to eagerly
context-switching the keys, and enable the feature. The next time the
vcpu is scheduled out/in, we start again. However the host key save is
optimized and implemented inside ptrauth instruction/register access
trap.
Pointer authentication consists of address authentication and generic
authentication, and CPUs in a system might have varied support for
either. Where support for either feature is not uniform, it is hidden
from guests via ID register emulation, as a result of the cpufeature
framework in the host.
Unfortunately, address authentication and generic authentication cannot
be trapped separately, as the architecture provides a single EL2 trap
covering both. If we wish to expose one without the other, we cannot
prevent a (badly-written) guest from intermittently using a feature
which is not uniformly supported (when scheduled on a physical CPU which
supports the relevant feature). Hence, this patch expects both type of
authentication to be present in a cpu.
This switch of key is done from guest enter/exit assembly as preparation
for the upcoming in-kernel pointer authentication support. Hence, these
key switching routines are not implemented in C code as they may cause
pointer authentication key signing error in some situations.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
[Only VHE, key switch in full assembly, vcpu_has_ptrauth checks
, save host key in ptrauth exception trap]
Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
Reviewed-by: Julien Thierry <julien.thierry@arm.com>
Cc: Christoffer Dall <christoffer.dall@arm.com>
Cc: kvmarm@lists.cs.columbia.edu
[maz: various fixups]
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
This comes a bit late, but should be in 5.1 anyway: we want the newly
added system calls to be synchronized across all architectures in
the release.
I hope that in the future, any newly added system calls can be added
to all architectures at the same time, and tested there while they
are in linux-next, avoiding dependencies between the architecture
maintainer trees and the tree that contains the new system call.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJcv2aZAAoJEGCrR//JCVIncu4QALpTBqbjSu9u1/nXRGMLWo9J
uToSBohDvsKW7wMkHcr1dU75ERIX9gqIY5pJWDrwzBdGDt02/oiy6WofXZDv4WkR
Sp4YncdTeZENi0nNN+mrGDzNrcvBJd0FRc1MSLgPzfKXgf8P1oRzEsOaJVlGY5hS
A8rNNUYE37m6rhTS59tNxzGvQcq3J7Q9ZRc0xjbSqIFngYVfQQiVbQCqd8RI6s9W
+Hek+e5VF5HQnzhmTT9MQM4TsxMRMNfzrYpjhhayuLJ3CHROJPX7x9pZEGdyusQS
5rDZxKes9SKTFS9QqycSyJkoP0awxrVrjqD1zFkWOJht0c3UCQAmw6GD7rlJkGPB
vofuzmPzMq5XaZ8vpTucWNL+0ymzRXhhQ6esV39vRwxztRc4/DCy5MHDnrPK5yXb
olPbltMAlHMaY5KePI/3jwpkcmzZjz9SNOKQ9/9tFlB5+RVF2qQdUgRMPE+XYa4H
pRrZChrEAf6ZjINGeLlIVtpTlBFPl1LRF7UkOy7TYBvtRqukduXYpOFPb1XspQUl
flIdBLOY3iF33o0eQnz10BEMxlblFhTj0SQrt0684kili7TjsWDaT+hPZSd72hhi
Wey9l39kaexV2Sh7XZ6oUe205ay3R8sTn0Ic2+CnZaboeOuYlLYc8/w2HkTeTYmu
9f3HAlX4Qu6RuX8bxLO0
=Y7Kd
-----END PGP SIGNATURE-----
Merge tag 'syscalls-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic
Pull syscall numbering updates from Arnd Bergmann:
"arch: add pidfd and io_uring syscalls everywhere
This comes a bit late, but should be in 5.1 anyway: we want the newly
added system calls to be synchronized across all architectures in the
release.
I hope that in the future, any newly added system calls can be added
to all architectures at the same time, and tested there while they are
in linux-next, avoiding dependencies between the architecture
maintainer trees and the tree that contains the new system call"
* tag 'syscalls-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic:
arch: add pidfd and io_uring syscalls everywhere
A few architectures use <asm/segment.h> internally, but nothing in
common code does. Remove all the empty or almost empty versions of it,
including the asm-generic one.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Enable following drivers for merged devices:
- Batteries with BQ27XXX chips for Minnie boards.
- Elan eKTH I2C touchscreen for Minnie boards.
- GPIO charger for all Veyron boards.
- Rockchip SARADC driver for all rk3288 boards.
- Rockchip eFUSE driver for all rk3288 boards.
- TPM security chip for all Veyron boards.
- ChromeOS EC userspace interface for all chromebooks boards.
- ChromeOS EC light and proximity sensors for some chromebooks.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The call to of_get_next_child returns a node pointer with refcount
incremented thus it must be explicitly decremented after the last
usage.
Detected by coccinelle with the following warnings:
./arch/arm/mach-rockchip/platsmp.c:250:2-8: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 241, but without a corresponding object release within this function.
./arch/arm/mach-rockchip/platsmp.c:260:2-8: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 241, but without a corresponding object release within this function.
./arch/arm/mach-rockchip/platsmp.c:263:1-7: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 241, but without a corresponding object release within this function.
Signed-off-by: Wen Yang <wen.yang99@zte.com.cn>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-rockchip@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The EFI stub is entered with the caches and MMU enabled by the
firmware, and once the stub is ready to hand over to the decompressor,
we clean and disable the caches.
The cache clean routines use CP15 barrier instructions, which can be
disabled via SCTLR. Normally, when using the provided cache handling
routines to enable the caches and MMU, this bit is enabled as well.
However, but since we entered the stub with the caches already enabled,
this routine is not executed before we call the cache clean routines,
resulting in undefined instruction exceptions if the firmware never
enabled this bit.
So set the bit explicitly in the EFI entry code, but do so in a way that
guarantees that the resulting code can still run on v6 cores as well
(which are guaranteed to have CP15 barriers enabled)
Cc: <stable@vger.kernel.org> # v4.9+
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
When CONFIG_ARM_MPU is not defined, the base address of v7M SCB register
is not initialized with correct value. This prevents enabling I/D caches
when the L1 cache poilcy is applied in kernel.
Fixes: 3c24121039 ("ARM: 8756/1: NOMMU: Postpone MPU activation till __after_proc_init")
Signed-off-by: Tigran Tadevosyan <tigran.tadevosyan@arm.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Naresh Kamboju recently reported that the function-graph tracer crashes
on ARM. The function-graph tracer assumes that the kernel is built with
frame pointers.
We explicitly disabled the function-graph tracer when building Thumb2,
since the Thumb2 ABI doesn't have frame pointers.
We recently changed the way the unwinder method was selected, which
seems to have made it more likely that we can end up with the function-
graph tracer enabled but without the kernel built with frame pointers.
Fix up the function graph tracer dependencies so the option is not
available when we have no possibility of having frame pointers, and
adjust the dependencies on the unwinder option to hide the non-frame
pointer unwinder options if the function-graph tracer is enabled.
Reviewed-by: Masami Hiramatsu <mhiramat@kernel.org>
Tested-by: Masami Hiramatsu <mhiramat@kernel.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
We use $(LD) to link vmlinux, modules, decompressors, etc.
VDSO is the only exceptional case where $(CC) is used as the linker
driver, but I do not know why we need to do so. VDSO uses a special
linker script, and does not link standard libraries at all.
I changed the Makefile to use $(LD) rather than $(CC). I confirmed
the same vdso.so.raw was still produced.
Users will be able to use their favorite linker (e.g. lld instead of
of bfd) by passing LD= from the command line.
My plan is to rewrite all VDSO Makefiles to use $(LD), then delete
cc-ldoption.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
arm_memory_present is doing same thing as memblocks_present, so
let's use common code memblocks_present instead of platform
specific arm_memory_present.
Patchwork: https://patchwork.kernel.org/patch/10805693/
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
The assembler option -mauto-it is no longer a valid option. The last
remaining references have been removed from the documentation in
July 2009 [0].
The currently supported binutils version is 2.20 (released in
September 2009) or higher where gas supports -mimplicit-it=always.
Drop the fallback to -mauto-it and use -mimplicit-it=always only.
[0] https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=529707530657a333a304c651c808ea630c955223
Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Remove the -mno-warn-deprecated assembler flag to make sure the GNU
assembler warns in case non-unified syntax is used.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Acked-by: Nicolas Pitre <nico@linaro.org>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Currently LLVM's integrated assembler does not recognize .w form
of the pld instructions (LLVM Bug 40972 [0]):
./arch/arm/include/asm/processor.h:133:5: error: invalid instruction
"pldw.wt%a0 n"
^
<inline asm>:2:1: note: instantiated into assembly here
pldw.w [r0]
^
1 error generated.
The W macro for generating wide instructions when targeting Thumb-2
is not strictly required for the preload data instructions (pld, pldw)
since they are only available as wide instructions. The GNU assembler
works with or without the .w appended when compiling an Thumb-2 kernel.
Drop the macro to work around LLVM Bug 40972 issue.
[0] https://bugs.llvm.org/show_bug.cgi?id=40972
Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Convert the conditional infix to a postfix to make sure this inline
assembly is unified syntax. Since gcc assumes non-unified syntax
when emitting ARM instructions, make sure to define the syntax as
unified.
This allows to use LLVM's integrated assembler.
Additionally, for GCC ".syntax unified" for inline assembly.
When compiling non-Thumb2 GCC always emits a ".syntax divided"
at the beginning of the inline assembly which makes the
assembler fail. Since GCC 5 there is the -masm-syntax-unified
GCC option which make GCC assume unified syntax asm and hence
emits ".syntax unified" even in ARM mode. However, the option
is broken since GCC version 6 (see GCC PR88648 [1]). Work
around by adding ".syntax unified" as part of the inline
assembly.
[0] https://gcc.gnu.org/onlinedocs/gcc/ARM-Options.html#index-masm-syntax-unified
[1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88648
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Unified assembly syntax requires conditionals to be postfixes.
TUSER() currently only takes a single argument which then gets
appended t (with translation) on every instruction.
This fixes a build error when using LLVM's integrated assembler:
In file included from kernel/futex.c:72:
./arch/arm/include/asm/futex.h:116:3: error: invalid instruction, did you mean: strt?
"2: " TUSER(streq) " %3, [%4]n"
^
<inline asm>:5:4: note: instantiated into assembly here
2: streqt r2, [r4]
^~~~~~
Additionally, for GCC ".syntax unified" for inline assembly.
When compiling non-Thumb2 GCC always emits a ".syntax divided"
at the beginning of the inline assembly which makes the
assembler fail. Since GCC 5 there is the -masm-syntax-unified
GCC option which make GCC assume unified syntax asm and hence
emits ".syntax unified" even in ARM mode. However, the option
is broken since GCC version 6 (see GCC PR88648 [1]). Work
around by adding ".syntax unified" as part of the inline
assembly.
[0] https://gcc.gnu.org/onlinedocs/gcc/ARM-Options.html#index-masm-syntax-unified
[1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88648
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
The AHB queue manager and Network Processing Engines are
present on all IXP4xx SoCs, so we add them to the overarching
device tree include.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Instead of using hardcoded base address implicitly
obtained through <linux/io.h>, pass the physical base
for the QMGR block as a memory resource and remap
it in the driver.
Also pass the two IRQs as resources and obtain them
in the driver.
Use devm_* accessors and simplify the error path in the
process. Drop memory region request as this is done by
the devm_ioremap* functions.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Instead of using hardcoded base addresses implicitly
obtained through <linux/io.h>, pass the physical base
for the three NPE blocks as memory resources and remap
these in the driver.
Drop the memory request region business, this will
anyways be done by devm_* remapping functions.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Instead of registering everything related to the QMGR
unconditionally in the module_init() call (which will
never work with multiplatform) create a platform device
and probe the QMGR like any other device.
Put the device second in the list of devices added for
the platform so it is there when the dependent network
and crypto drivers probe later on.
This probe() path will not be taken unconditionally on
device tree boots, so remove the DT guard.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Instead of registering everything related to the NPE
unconditionally in the module_init() call (which will
never work with multiplatform) create a platform device
and probe the NPE like any other device.
Put the device first in the list of devices added for
the platform so it is there when the dependent network
and crypto drivers probe later on.
This probe() path will not be taken unconditionally on
device tree boots, so remove the DT guard.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This moves the IXP4xx Queue Manager and Network Processing
Engine headers out of the <mack/*> include path as that is
incompatible with multiplatform.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The Network Processing Engine and Queue Manager are
versatile firmware components used by several IXP4xx
drivers.
Drivers are relying on getting access to these components
using <mach/*> headers which does not work with
multiplatform. We need to find a better place for the
drivers to live.
Let's first move them to drivers/soc and the start to
refactor a bit by passing resources and moving headers.
This patch introduce static IRQ assignments but that
will be fixed by later patches in this series.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds a device tree for the IXP4xx-based Linksys
NSLU2 and Gateworks GW2358 which encompass the Gateworks
Cambria family.
These will be the first IXP4xx device tree platforms.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds a minimal support for booting IXP4xx systems
from device tree.
We have to add hacks to the QMGR, NPE and notably also
ethernet and watchdog drivers so that they don't crash
the platform: these drivers are unconditionally starting
to grab regions of statically remapped IO space with no
concern of the device model or other platforms.
We will go in and properly fix these drivers as we go
along but for now this hack gets us to a place where we
can start working on proper device tree support for these
platforms.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This augments the IXP4xx to select and use the new
timer driver in drivers/clocksource and removes the old
code in the machine.
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This deletes the old irq+gpiochip combo from the IXP4xx
machine and switches it over to use the new drivers merged
in respective subsystem.
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Specify #io-channel-cells in ADC nodes. Needed to be able to reference
them by phandle.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Rob Herring <robh@kernel.org>
Cc: linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-----BEGIN PGP SIGNATURE-----
iQFSBAABCAA8FiEEq68RxlopcLEwq+PEeb4+QwBBGIYFAly8rGYeHHRvcnZhbGRz
QGxpbnV4LWZvdW5kYXRpb24ub3JnAAoJEHm+PkMAQRiGmZMH/1IRB0E1Qmzz8yzw
wj79UuRGYPqxDDSWW+wNc8sU4Ic7iYirn9APHAztCdQqsjmzU/OVLfSa3JhdBe5w
THo7pbGKBqEDcWnKfNk/21jXFNLZ1vr9BoQv2DGU2MMhHAyo/NZbalo2YVtpQPmM
OCRth5n+LzvH7rGrX7RYgWu24G9l3NMfgtaDAXBNXesCGFAjVRrdkU5CBAaabvtU
4GWh/nnutndOOLdByL3x+VZ3H3fIBnbNjcIGCglvvqzk7h3hrfGEl4UCULldTxcM
IFsfMUhSw1ENy7F6DHGbKIG90cdCJcrQ8J/ziEzjj/KLGALluutfFhVvr6YCM2J6
2RgU8CY=
=CfY1
-----END PGP SIGNATURE-----
Merge tag 'v5.1-rc6' into for-5.2/block
Pull in v5.1-rc6 to resolve two conflicts. One is in BFQ, in just a
comment, and is trivial. The other one is a conflict due to a later fix
in the bio multi-page work, and needs a bit more care.
* tag 'v5.1-rc6': (770 commits)
Linux 5.1-rc6
block: make sure that bvec length can't be overflow
block: kill all_q_node in request_queue
x86/cpu/intel: Lower the "ENERGY_PERF_BIAS: Set to normal" message's log priority
coredump: fix race condition between mmget_not_zero()/get_task_mm() and core dumping
mm/kmemleak.c: fix unused-function warning
init: initialize jump labels before command line option parsing
kernel/watchdog_hld.c: hard lockup message should end with a newline
kcov: improve CONFIG_ARCH_HAS_KCOV help text
mm: fix inactive list balancing between NUMA nodes and cgroups
mm/hotplug: treat CMA pages as unmovable
proc: fixup proc-pid-vm test
proc: fix map_files test on F29
mm/vmstat.c: fix /proc/vmstat format for CONFIG_DEBUG_TLBFLUSH=y CONFIG_SMP=n
mm/memory_hotplug: do not unlock after failing to take the device_hotplug_lock
mm: swapoff: shmem_unuse() stop eviction without igrab()
mm: swapoff: take notice of completion sooner
mm: swapoff: remove too limiting SWAP_UNUSE_MAX_TRIES
mm: swapoff: shmem_find_swap_entries() filter out other types
slab: store tagged freelist for off-slab slabmgmt
...
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Specify CS as GPIO_ACTIVE_LOW in spi0 to fix the following warning:
m25p128@0 enforce active low on chipselect handle
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Mark i2c0 SCL as GPIO_OPEN_DRAIN to fix the following warning:
gpio-36 (scl): enforced open drain please flag it properly in DT/ACPI DSDT/board file
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Running reboot command on the TQMa7 board would just hang infinite
at the end of the system shutdown process.
Handling of i.MX7 errata e10574:
Watchdog: A watchdog timeout or software trigger will not reset the SOC.
Moved pinctrl from common mba7 to common tqma7 dtsi as it improves
readability of errata handling. Most integrators of this SoM will
likely use the development board as inspiration for handling this
SoC issue.
Signed-off-by: Bruno Thomsen <bruno.thomsen@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Kirkwood has always had the ability to retrieve the local-mac-address
from the hardware (usually this was configured by the bootloader). This
is particularly useful when dealing with a legacy non-DT aware
bootloader.
The "error" message just indicated that the board used an old bootloader
and in many cases users can't do anything about this. The message
probably should have been pr_info() to inform the user that the kernel
has been helpful but rather than than let's remove it entirely to make
the kernel less noisy.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
The first interrupt is for the regular watchdog timeout. Normally the
RSTOUT line will trigger a reset before this interrupt fires but on
systems with a non-standard reset it may still trigger.
The second interrupt is for a timer1 which is used as a pre-timeout for
the watchdog.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Add device tree for the Menlosystems board based on i.MX53 M53 SoM.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Rename the touchscreen node to match contemporary design.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Each eTSEC MAC has its own TBI (SGMII) PCS and private MDIO bus.
But due to a DTS oversight, both SGMII-compatible MACs of the LS1021 SoC
are pointing towards the same internal PCS. Therefore nobody is
controlling the internal PCS of eTSEC0.
Upon initial ndo_open, the SGMII link is ok by virtue of U-boot
initialization. But upon an ifdown/ifup sequence, the code path from
ndo_open -> init_phy -> gfar_configure_serdes does not get executed for
the PCS of eTSEC0 (and is executed twice for MAC eTSEC1). So the SGMII
link remains down for eTSEC0. On the LS1021A-TWR board, to signal this
failure condition, the PHY driver keeps printing
'803x_aneg_done: SGMII link is not ok'.
Also, it changes compatible of mdio0 to "fsl,etsec2-mdio" to match
mdio1 device.
Fixes: 055223d4d2 ("ARM: dts: ls1021a: Enable the eTSEC ports on QDS and TWR")
Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Reviewed-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
All 4 SPI controllers on NXP LPC32xx SoC support SPI slaves discerning them
by one cell address value, set it as default to avoid duplication in board
device tree files.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
NXP LPC3220 and LPC3230 SoCs do NOT contain a MAC controller, so,
since for now there is just one dtsi file for all variants of
NXP LPC32xx SoCs, it is reasonable to disable the controller
by default and enable it in device tree files of particular boards.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
The I2S controllers found on NXP LPC32xx SoCs are not yet in
use by any boards supported in upstream, disable the controllers
by default.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
This is a non-functional change, all inconsistent hexadecimal values
found in the file are now fixed.
Taking a chance to interfere into some non-functional change I add
my copyright notice for work done during the last few years.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Both controllers are described in lpc32xx.dtsi and there is no any
specific platform data added in the platform file.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
While the majority of platform data was moved to device tree description
the list of included header files remained untouched, the change cleans
it up to an irreducible and observable subset.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
While the UDA1380 is described in some lpc3250 device trees, there is
currently no real user of that codec. Anyway, if the codec needs a clock,
it should take it explicitly.
lpc3250_machine_init is called for all the lpc32xx machines and some are
using test1_clk (for example to strobe an HW watchdog). Overwriting
TEST_CLK_SEL prevents booting those platforms.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Tested-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
This localizes the <mach/irqs.h> header to the mach-ixp4xx
directory, removes NR_IRQS and switches IXP4xx over to using
SPARSE_IRQ.
This is a prerequisite for DT support.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
All IXP4xx devices except the beeper passes the IRQ as a
resource, augment the NSLU2 beeper to do the same.
This is a prerequisite for SPARSE_IRQ.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This rewrites the IXP4xx to use MULTI_IRQ_HANDLER and
create an irqdomain for the irqchip in the platform. We
convert the timer to request the interrupt like any other
driver in the process.
We bump all IRQs to 16+offset to avoid using IRQ 0 and
set NR_IRQS to 512 (the default for most systems).
This conveniently fits with the first 16 IRQs being
pre-allocated when using SPARSE_IRQ.
This is a prerequisite for SPARSE_IRQ and DT boot.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Make the anon_inodes facility unconditional so that it can be used by core
VFS code and pidfd code.
Signed-off-by: David Howells <dhowells@redhat.com>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
[christian@brauner.io: adapt commit message to mention pidfds]
Signed-off-by: Christian Brauner <christian@brauner.io>
The "event counter" was removed from rseq before it was merged upstream.
However, a few comments in the source code still refer to it. Adapt the
comments to match reality.
Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Ben Maurer <bmaurer@fb.com>
Cc: Boqun Feng <boqun.feng@gmail.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Chris Lameter <cl@linux.com>
Cc: Dave Watson <davejwatson@fb.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Joel Fernandes <joelaf@google.com>
Cc: Josh Triplett <josh@joshtriplett.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Michael Kerrisk <mtk.manpages@gmail.com>
Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Paul Turner <pjt@google.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-api@vger.kernel.org
Link: http://lkml.kernel.org/r/20190305194755.2602-2-mathieu.desnoyers@efficios.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Currently, the internal vcpu finalization functions use a different
name ("what") for the feature parameter than the name ("feature")
used in the documentation.
To avoid future confusion, this patch converts everything to use
the name "feature" consistently.
No functional change.
Suggested-by: Andrew Jones <drjones@redhat.com>
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Reviewed-by: Andrew Jones <drjones@redhat.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
The vcpu finalization stubs kvm_arm_vcpu_finalize() and
kvm_arm_vcpu_is_finalized() are currently #defines for ARM, which
limits the type-checking that the compiler can do at runtime.
The only reason for them to be #defines was to avoid reliance on
the definition of struct kvm_vcpu, which is not available here due
to circular #include problems. However, because these are stubs
containing no code, they don't need the definition of struct
kvm_vcpu after all; only a declaration is needed (which is
available already).
So in the interests of cleanliness, this patch converts them to
inline functions.
No functional change.
Suggested-by: Andrew Jones <drjones@redhat.com>
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Reviewed-by: Andrew Jones <drjones@redhat.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
The introduction of kvm_arm_init_arch_resources() looks like
premature factoring, since nothing else uses this hook yet and it
is not clear what will use it in the future.
For now, let's not pretend that this is a general thing:
This patch simply renames the function to kvm_arm_init_sve(),
retaining the arm stub version under the new name.
Suggested-by: Andrew Jones <drjones@redhat.com>
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Reviewed-by: Andrew Jones <drjones@redhat.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
The Bananapi M3 and Cubietruck Plus both have USB OTG ports wired to the
SoC and PMIC in the same way, with the N_VBUSEN pin on the PMIC
controlling VBUS output, the PMIC's VBUS input for sensing VBUS, and
PH11 on the SoC for sensing the ID pin.
Enable OTG on both boards.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The AXP813/818 has a VBUS power input. Add a device node for it, now
that we support it.
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
[wens@csie.org: Add commit message]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
If the user-provided IV needs to be aligned to the algorithm's
alignmask, then skcipher_walk_virt() copies the IV into a new aligned
buffer walk.iv. But skcipher_walk_virt() can fail afterwards, and then
if the caller unconditionally accesses walk.iv, it's a use-after-free.
arm32 xts-aes-neonbs doesn't set an alignmask, so currently it isn't
affected by this despite unconditionally accessing walk.iv. However
this is more subtle than desired, and it was actually broken prior to
the alignmask being removed by commit cc477bf645 ("crypto: arm/aes -
replace bit-sliced OpenSSL NEON code"). Thus, update xts-aes-neonbs to
start checking the return value of skcipher_walk_virt().
Fixes: e4e7f10bfc ("ARM: add support for bit sliced AES using NEON instructions")
Cc: <stable@vger.kernel.org> # v3.13+
Signed-off-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Add support for ACTMON on Tegra30. This is used to monitor activity from
different components. Based on the collected statistics, the rate at
which the external memory needs to be clocked can be derived.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Turned out that the actual bug was in the Memory Controller driver
that programmed shadowed registers without latching the new values
and then there was a bug on EMEM arbitration configuration calculation
that results in a wrong value being latched on resume from suspend.
The Memory Controller has been fixed properly now, hence the workaround
patch could be reverted safely.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tegra20/30 drivers do not handle the tick_broadcast_enter() error which
potentially could happen when CPU timer isn't permitted to be stopped.
Let's just move out the broadcasting to the CPUIDLE core by setting the
respective flag in the Tegra20/30 drivers. This patch doesn't fix any
problem because currently tick_broadcast_enter() could fail only on
ARM64, so consider this change as a minor cleanup.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
OV2640 is a detachable camera that we use to test the
Image Sensor Interface. Make it as a module, it will reduce
the kernel image size.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
MTD_NAND is large and encloses much more than what the symbol is
actually used for: raw NAND. Clarify the symbol by naming it
MTD_RAW_NAND instead.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
The software Hamming ECC correction implementation is referred as
MTD_NAND_ECC which is too generic. Rename it
MTD_NAND_ECC_SW_HAMMING. Also rename MTD_NAND_ECC_SMC which is an
SMC quirk in the Hamming implementation as
MTD_NAND_ECC_SW_HAMMING_SMC.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
There is no point in having two distinct entries, merge them and
rename the symbol for more clarity: MTD_NAND_ECC_SW_BCH
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
This adds and updates the device tree nodes for the MCDE
display controller and connects the Samsung display to
the TVK1281618 user interface board (UIB) so we get
nicely working graphics on this reference design.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds the Mali-400 block, also known as SGA500 or the
Smart Graphics Adapter, to the DBx500 DTS file. All
resources and bindings are already in place so this just
works.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reorder bootargs parameters to make the APE6EVM board bootargs match other
boards from Renesas. No need to be special.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add rw as bootargs parameter and change from ip=on to ip=dhcp to make the
Marzen board bootargs match other boards from Renesas. No need to be special.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reorder bootargs parameters to make the BockW board bootargs match other
boards from Renesas. No need to be special.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add rw as bootargs parameter to make the KZM9D board bootargs match other
boards from Renesas. No need to be special.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The cd-inverted property can also be expressed using the GPIO flags. Use
the active low GPIO flag to have the same semantic without the confusion.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
We try to keep the PIO nodes ordered alphabetically, but this doesn't
always work out. Let's fix it.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The I7 DTS uses an spdif-out property with an "okay" value. However, that
property isn't documented anywhere, and isn't used anywhere either.
Remove it.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
While the USB PHY Device Tree mandates that the name of the ID detect pin
should be usb0_id_det-gpios, a significant number of device tree use
usb0_id_det-gpio instead.
This was functional because the GPIO framework falls back to the gpio
suffix that is legacy, but we should fix this. Commit 2c515b0d05
("ARM: sunxi: Fix the USB PHY ID detect GPIO properties") was supposed to
fix this, but one fell through the cracks.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Some nodes still have pinctrl-names entry, yet they don't have any pinctrl
group anymore. Drop them.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Move the Trusted Foundations support out of arch/arm/firmware and into
drivers/firmware where most other firmware support implementations are
located.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Some 32-bit Tegra devices supported by the multiplatform ARM v7 default
configuration ship with the Trusted Foundations firmware. Enable support
for it by default.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Support for the Trusted Foundations firmware was recently moved outside
of arch/arm and now needs to be selected explicitly. Since some 32-bit
Tegra devices use this firmware, enable support for it in the default
configuration.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Most of the changes here are just symbols that are now enabled by
default, have been removed, or which have been moved around and now
appear in a different spot.
The only notable change here is that BACKLIGHT_CLASS_DEVICE is now
built-in. This is to allow BACKLIGHT_PWM to be built-in as well.
Signed-off-by: Thierry Reding <treding@nvidia.com>
The XUSB pad controller is responsible for supplying power to the PLLs
used to drive the various USB, PCI and SATA pads. Move the PLL power
supplies from the PCIe and XUSB controllers to the XUSB pad controller
to make sure they are available when needed.
Signed-off-by: Thierry Reding <treding@nvidia.com>
The XUSB pad controller is responsible for supplying power to the PLLs
used to drive the various USB, PCI and SATA pads. Move the PLL power
supplies from the XUSB controller to the XUSB pad controller to make
sure they are available when needed.
Signed-off-by: Thierry Reding <treding@nvidia.com>
The XUSB pad controller is responsible for supplying power to the PLLs
used to drive the various USB, PCI and SATA pads. Move the PLL power
supplies from the PCIe and XUSB controllers to the XUSB pad controller
to make sure they are available when needed.
Signed-off-by: Thierry Reding <treding@nvidia.com>
The XUSB pad controller is responsible for supplying power to the PLLs
used to drive the various USB, PCI and SATA pads. Move the PLL power
supplies from the PCIe and XUSB controllers to the XUSB pad controller
to make sure they are available when needed.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Parentheses in the SPDX license identifier are only used to group sub-
expressions. If there's no need for such grouping, the parentheses can
be omitted.
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Replace boiler plate licenses texts with the SPDX license identifiers in
Colibri/Apalis DTS files.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
[treding@nvidia.com: drop unneeded parentheses, keep license at X11]
Signed-off-by: Thierry Reding <treding@nvidia.com>
Neither the OHCI or EHCI bindings are using the phy-names property, so we
can just drop it.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Neither the OHCI or EHCI bindings are using the phy-names property, so we
can just drop it.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The Odroid-C1 has the 32.768 kHz oscillator (X3 in the schematics) which
is required for the RTC. A battery can be connected separately (to the
BT1 header) - then the "rtc" node can be enabled manually. By default
the RTC is disabled because the boards typically come without the RTC
battery.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The RTC is always enabled on this board since the battery is already
connected in the factory.
According to the schematics the VCC_RTC regulator (which is either
powered by the internal 3.3V or a battery) is connected to the 0.9V
RTC_VDD input of the SoCs.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The 32-bit Meson SoCs have an RTC block in the AO (always on) area. The
RTC requires an external 32.768 kHz oscillator to work properly. Whether
or not this crystal exists depends on the board, so it has to be added
for each board.dts (instead of adding it somewhere in a generic .dtsi).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
When we boot with the LED support (CONFIG_NEW_LEDS) disabled,
gpio_led_register_device() will return a NULL pointer and we try
to dereference it. Fix by checking also for a NULL pointer.
Fixes: 19a2668a8a ("ARM: OMAP1: ams-delta: Provide GPIO lookup table for LED device")
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Tony Lindgren <tony@atomide.com>
These options have just moved around, let's update with make
savedefconfig to make patching the file easier.
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Olof Johansson <olof@lixom.net>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Tony Lindgren <tony@atomide.com>
These are mostly automatically selected with make multi_v7_defconfig,
except for SH_DMAE which is selected only by sound/soc/sh/Kconfig.
Then CONFIG_SND_SIMPLE_SCU_CARD no longer exists at all.
And CONFIG_SOC_CAMERA and CONFIG_SOC_CAMERA_PLATFORM are tagged
to depend on BROKEN, so we can drop them.
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Olof Johansson <olof@lixom.net>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The defines are taken from dt-bindings/pinctrl/am33xx.h
Signed-off-by: Christina Quast <cquast@hanoverdisplays.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The defines are taken from dt-bindings/pinctrl/am33xx.h
Signed-off-by: Christina Quast <cquast@hanoverdisplays.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The defines are taken from dt-bindings/pinctrl/am33xx.h
Signed-off-by: Christina Quast <cquast@hanoverdisplays.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The defines are taken from dt-bindings/pinctrl/am33xx.h
Signed-off-by: Christina Quast <cquast@hanoverdisplays.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The defines are taken from dt-bindings/pinctrl/am33xx.h
Signed-off-by: Christina Quast <cquast@hanoverdisplays.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The defines are taken from dt-bindings/pinctrl/am33xx.h
Signed-off-by: Christina Quast <cquast@hanoverdisplays.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The defines are taken from dt-bindings/pinctrl/am33xx.h
Signed-off-by: Christina Quast <cquast@hanoverdisplays.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The defines are taken from dt-bindings/pinctrl/am33xx.h
Signed-off-by: Christina Quast <cquast@hanoverdisplays.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The defines are taken from dt-bindings/pinctrl/am33xx.h
Signed-off-by: Christina Quast <cquast@hanoverdisplays.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
