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ARM: dts: sun5i: Reorder pinctrl nodes

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We try to keep the PIO nodes ordered alphabetically, but this doesn't
always work out. Let's fix it.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
This commit is contained in:
Maxime Ripard 2019-04-16 10:57:44 +02:00
parent 4b03e16d30
commit 66dc4e4bfc
No known key found for this signature in database
GPG Key ID: E3EF0D6F671851C5
1 changed files with 10 additions and 10 deletions
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20
arch/arm/boot/dts/sun5i.dtsi
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@ -504,18 +504,18 @@ mmc0_pins: mmc0-pins {
bias-pull-up;
};
mmc2_8bit_pins: mmc2-8bit-pins {
mmc2_4bit_pc_pins: mmc2-4bit-pc-pins {
pins = "PC6", "PC7", "PC8", "PC9",
"PC10", "PC11", "PC12", "PC13",
"PC14", "PC15";
"PC10", "PC11";
function = "mmc2";
drive-strength = <30>;
bias-pull-up;
};
mmc2_4bit_pc_pins: mmc2-4bit-pc-pins {
mmc2_8bit_pins: mmc2-8bit-pins {
pins = "PC6", "PC7", "PC8", "PC9",
"PC10", "PC11";
"PC10", "PC11", "PC12", "PC13",
"PC14", "PC15";
function = "mmc2";
drive-strength = <30>;
bias-pull-up;
@ -539,6 +539,11 @@ nand_rb0_pin: nand-rb0-pin {
function = "nand0";
};
pwm0_pin: pwm0-pin {
pins = "PB2";
function = "pwm";
};
spi2_pe_pins: spi2-pe-pins {
pins = "PE1", "PE2", "PE3";
function = "spi2";
@ -578,11 +583,6 @@ uart3_cts_rts_pg_pins: uart3-cts-rts-pg-pins {
pins = "PG11", "PG12";
function = "uart3";
};
pwm0_pin: pwm0-pin {
pins = "PB2";
function = "pwm";
};
};
timer@1c20c00 {