mt76x0: remove eeprom dependency from mt76x0_get_power_info

In order to unify eeprom parsing between mt76x0 and mt76x2 drivers,
remove eeprom pointer dependency from mt76x0_get_power_info routine.
Remove mt76x0_eeprom_params since it is now an empty structure

Signed-off-by: Lorenzo Bianconi <lorenzo.bianconi@redhat.com>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
This commit is contained in:
Lorenzo Bianconi 2018-09-22 13:45:35 +02:00 committed by Felix Fietkau
parent b37bbc8c82
commit f2a2e819d6
5 changed files with 78 additions and 82 deletions

View File

@ -100,7 +100,6 @@ mt76x0_eeprom_param_read(struct seq_file *file, void *data)
{ {
struct mt76x0_dev *dev = file->private; struct mt76x0_dev *dev = file->private;
u16 val; u16 val;
int i;
seq_printf(file, "RF freq offset: %hhx\n", seq_printf(file, "RF freq offset: %hhx\n",
dev->caldata.freq_offset); dev->caldata.freq_offset);
@ -114,10 +113,6 @@ mt76x0_eeprom_param_read(struct seq_file *file, void *data)
seq_printf(file, "Power Amplifier type %lx\n", seq_printf(file, "Power Amplifier type %lx\n",
val & MT_EE_NIC_CONF_0_PA_TYPE); val & MT_EE_NIC_CONF_0_PA_TYPE);
seq_puts(file, "Per channel power:\n");
for (i = 0; i < 58; i++)
seq_printf(file, "\t%d chan:%d pwr:%d\n", i, i,
dev->ee->tx_pwr_per_chan[i]);
return 0; return 0;
} }

View File

@ -210,38 +210,71 @@ void mt76x0_get_tx_power_per_rate(struct mt76x0_dev *dev)
mt76x02_add_rate_power_offset(t, delta); mt76x02_add_rate_power_offset(t, delta);
} }
static void void mt76x0_get_power_info(struct mt76x0_dev *dev, u8 *info)
mt76x0_set_tx_power_per_chan(struct mt76x0_dev *dev, u8 *eeprom)
{ {
struct mt76x0_chan_map {
u8 chan;
u8 offset;
} chan_map[] = {
{ 2, 0 }, { 4, 1 }, { 6, 2 }, { 8, 3 },
{ 10, 4 }, { 12, 5 }, { 14, 6 }, { 38, 0 },
{ 44, 1 }, { 48, 2 }, { 54, 3 }, { 60, 4 },
{ 64, 5 }, { 102, 6 }, { 108, 7 }, { 112, 8 },
{ 118, 9 }, { 124, 10 }, { 128, 11 }, { 134, 12 },
{ 140, 13 }, { 151, 14 }, { 157, 15 }, { 161, 16 },
{ 167, 17 }, { 171, 18 }, { 173, 19 },
};
struct ieee80211_channel *chan = dev->mt76.chandef.chan;
u8 offset, addr;
u16 data;
int i; int i;
u8 tx_pwr;
for (i = 0; i < 14; i++) { for (i = 0; i < ARRAY_SIZE(chan_map); i++) {
tx_pwr = eeprom[MT_EE_TX_POWER_DELTA_BW80 + i]; if (chan_map[i].chan <= chan->hw_value) {
if (tx_pwr <= 0x3f && tx_pwr > 0) offset = chan_map[i].offset;
dev->ee->tx_pwr_per_chan[i] = tx_pwr; break;
else }
dev->ee->tx_pwr_per_chan[i] = 5; }
if (i == ARRAY_SIZE(chan_map))
offset = chan_map[0].offset;
if (chan->band == NL80211_BAND_2GHZ) {
addr = MT_EE_TX_POWER_DELTA_BW80 + offset;
} else {
switch (chan->hw_value) {
case 58:
offset = 8;
break;
case 106:
offset = 14;
break;
case 112:
offset = 20;
break;
case 155:
offset = 30;
break;
default:
break;
}
addr = MT_EE_TX_POWER_0_GRP4_TSSI_SLOPE + 2 + offset;
} }
for (i = 0; i < 40; i++) { data = mt76x02_eeprom_get(&dev->mt76, addr);
tx_pwr = eeprom[MT_EE_TX_POWER_0_GRP4_TSSI_SLOPE + 2 + i];
if (tx_pwr <= 0x3f && tx_pwr > 0)
dev->ee->tx_pwr_per_chan[14 + i] = tx_pwr;
else
dev->ee->tx_pwr_per_chan[14 + i] = 5;
}
dev->ee->tx_pwr_per_chan[54] = dev->ee->tx_pwr_per_chan[22]; info[0] = data;
dev->ee->tx_pwr_per_chan[55] = dev->ee->tx_pwr_per_chan[28]; if (!info[0] || info[0] > 0x3f)
dev->ee->tx_pwr_per_chan[56] = dev->ee->tx_pwr_per_chan[34]; info[0] = 5;
dev->ee->tx_pwr_per_chan[57] = dev->ee->tx_pwr_per_chan[44];
info[1] = data >> 8;
if (!info[1] || info[1] > 0x3f)
info[1] = 5;
} }
int int mt76x0_eeprom_init(struct mt76x0_dev *dev)
mt76x0_eeprom_init(struct mt76x0_dev *dev)
{ {
u8 *eeprom; u8 version, fae;
u16 data;
int ret; int ret;
ret = mt76x0_efuse_physical_size_check(dev); ret = mt76x0_efuse_physical_size_check(dev);
@ -252,37 +285,31 @@ mt76x0_eeprom_init(struct mt76x0_dev *dev)
if (ret < 0) if (ret < 0)
return ret; return ret;
dev->ee = devm_kzalloc(dev->mt76.dev, sizeof(*dev->ee), GFP_KERNEL); ret = mt76x02_get_efuse_data(&dev->mt76, 0, dev->mt76.eeprom.data,
if (!dev->ee)
return -ENOMEM;
eeprom = kmalloc(MT76X0_EEPROM_SIZE, GFP_KERNEL);
if (!eeprom)
return -ENOMEM;
ret = mt76x02_get_efuse_data(&dev->mt76, 0, eeprom,
MT76X0_EEPROM_SIZE, MT_EE_READ); MT76X0_EEPROM_SIZE, MT_EE_READ);
if (ret) if (ret)
goto out; return ret;
if (eeprom[MT_EE_VERSION + 1] > MT76X0U_EE_MAX_VER) data = mt76x02_eeprom_get(&dev->mt76, MT_EE_VERSION);
version = data >> 8;
fae = data;
if (version > MT76X0U_EE_MAX_VER)
dev_warn(dev->mt76.dev, dev_warn(dev->mt76.dev,
"Warning: unsupported EEPROM version %02hhx\n", "Warning: unsupported EEPROM version %02hhx\n",
eeprom[MT_EE_VERSION + 1]); version);
dev_info(dev->mt76.dev, "EEPROM ver:%02hhx fae:%02hhx\n", dev_info(dev->mt76.dev, "EEPROM ver:%02hhx fae:%02hhx\n",
eeprom[MT_EE_VERSION + 1], eeprom[MT_EE_VERSION]); version, fae);
mt76x02_mac_setaddr(&dev->mt76, eeprom + MT_EE_MAC_ADDR); mt76x02_mac_setaddr(&dev->mt76,
dev->mt76.eeprom.data + MT_EE_MAC_ADDR);
mt76x0_set_chip_cap(dev); mt76x0_set_chip_cap(dev);
mt76x0_set_freq_offset(dev); mt76x0_set_freq_offset(dev);
mt76x0_set_temp_offset(dev); mt76x0_set_temp_offset(dev);
dev->chainmask = 0x0101; dev->chainmask = 0x0101;
mt76x0_set_tx_power_per_chan(dev, eeprom); return 0;
out:
kfree(eeprom);
return ret;
} }
MODULE_LICENSE("Dual BSD/GPL"); MODULE_LICENSE("Dual BSD/GPL");

View File

@ -23,11 +23,6 @@ struct mt76x0_dev;
#define MT76X0U_EE_MAX_VER 0x0c #define MT76X0U_EE_MAX_VER 0x0c
#define MT76X0_EEPROM_SIZE 512 #define MT76X0_EEPROM_SIZE 512
struct reg_channel_bounds {
u8 start;
u8 num;
};
struct mt76x0_caldata { struct mt76x0_caldata {
s8 rssi_offset[2]; s8 rssi_offset[2];
s8 lna_gain; s8 lna_gain;
@ -36,14 +31,10 @@ struct mt76x0_caldata {
u8 freq_offset; u8 freq_offset;
}; };
struct mt76x0_eeprom_params {
u8 tx_pwr_per_chan[58];
};
int mt76x0_eeprom_init(struct mt76x0_dev *dev); int mt76x0_eeprom_init(struct mt76x0_dev *dev);
void mt76x0_read_rx_gain(struct mt76x0_dev *dev); void mt76x0_read_rx_gain(struct mt76x0_dev *dev);
void mt76x0_get_tx_power_per_rate(struct mt76x0_dev *dev); void mt76x0_get_tx_power_per_rate(struct mt76x0_dev *dev);
void mt76x0_get_power_info(struct mt76x0_dev *dev, u8 *info);
static inline s8 s6_to_s8(u32 val) static inline s8 s6_to_s8(u32 val)
{ {

View File

@ -89,7 +89,6 @@ struct mt76x0_dev {
const u16 *beacon_offsets; const u16 *beacon_offsets;
struct mt76x0_eeprom_params *ee;
struct mt76x0_caldata caldata; struct mt76x0_caldata caldata;
struct mutex reg_atomic_mutex; struct mutex reg_atomic_mutex;

View File

@ -578,31 +578,15 @@ mt76x0_bbp_set_bw(struct mt76x0_dev *dev, enum nl80211_chan_width width)
mt76x02_mcu_function_select(&dev->mt76, BW_SETTING, bw, false); mt76x02_mcu_function_select(&dev->mt76, BW_SETTING, bw, false);
} }
static void static void mt76x0_phy_set_chan_pwr(struct mt76x0_dev *dev)
mt76x0_phy_set_chan_pwr(struct mt76x0_dev *dev, u8 channel)
{ {
static const int mt76x0_tx_pwr_ch_list[] = { u8 info[2];
1,2,3,4,5,6,7,8,9,10,11,12,13,14,
36,38,40,44,46,48,52,54,56,60,62,64,
100,102,104,108,110,112,116,118,120,124,126,128,132,134,136,140,
149,151,153,157,159,161,165,167,169,171,173,
42,58,106,122,155
};
int i;
u32 val;
for (i = 0; i < ARRAY_SIZE(mt76x0_tx_pwr_ch_list); i++) mt76x0_get_power_info(dev, info);
if (mt76x0_tx_pwr_ch_list[i] == channel) mt76_rmw_field(dev, MT_TX_ALC_CFG_0, MT_TX_ALC_CFG_0_CH_INIT_0,
break; info[0]);
mt76_rmw_field(dev, MT_TX_ALC_CFG_0, MT_TX_ALC_CFG_0_CH_INIT_1,
if (WARN_ON(i == ARRAY_SIZE(mt76x0_tx_pwr_ch_list))) info[1]);
return;
val = mt76_rr(dev, MT_TX_ALC_CFG_0);
val &= ~0x3f3f;
val |= dev->ee->tx_pwr_per_chan[i];
val |= 0x2f2f << 16;
mt76_wr(dev, MT_TX_ALC_CFG_0, val);
} }
static int static int
@ -699,7 +683,7 @@ __mt76x0_phy_set_channel(struct mt76x0_dev *dev,
if (scan) if (scan)
mt76x02_mcu_calibrate(&dev->mt76, MCU_CAL_RXDCOC, 1, false); mt76x02_mcu_calibrate(&dev->mt76, MCU_CAL_RXDCOC, 1, false);
mt76x0_phy_set_chan_pwr(dev, channel); mt76x0_phy_set_chan_pwr(dev);
return 0; return 0;
} }