mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-24 03:07:29 +07:00
mvebu dt64 for 5.4 (part 1)
- Add mailbox support on Armada 37xx - Add cpu clock node needed for CPU freq on Armada 7K/8K - Enhance CP110 COMPHY support used by PCIe, USB3 and SATA -----BEGIN PGP SIGNATURE----- iF0EABECAB0WIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCXWZRawAKCRALBhiOFHI7 1a9pAKCbNBlpgHH5wTFrz9crOunl+zSe8gCgrCcCGiTwyKyPdPDEcZLd25eYQz4= =/vad -----END PGP SIGNATURE----- Merge tag 'mvebu-dt64-5.4-1' of git://git.infradead.org/linux-mvebu into arm/dt mvebu dt64 for 5.4 (part 1) - Add mailbox support on Armada 37xx - Add cpu clock node needed for CPU freq on Armada 7K/8K - Enhance CP110 COMPHY support used by PCIe, USB3 and SATA * tag 'mvebu-dt64-5.4-1' of git://git.infradead.org/linux-mvebu: arm64: dts: marvell: Add cpu clock node on Armada 7K/8K arm64: dts: marvell: Convert 7k/8k usb-phy properties to phy-supply arm64: dts: marvell: Add 7k/8k PHYs in PCIe nodes arm64: dts: marvell: Add 7k/8k PHYs in USB3 nodes arm64: dts: marvell: Add 7k/8k per-port PHYs in SATA nodes arm64: dts: marvell: Add CP110 COMPHY clocks arm64: dts: marvell: armada-37xx: add mailbox node Link: https://lore.kernel.org/r/875zmhzjml.fsf@FE-laptop Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
b1761ebea6
@ -419,6 +419,13 @@ crypto: crypto@90000 {
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clocks = <&nb_periph_clk 15>;
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};
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rwtm: mailbox@b0000 {
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compatible = "marvell,armada-3700-rwtm-mailbox";
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reg = <0xb0000 0x100>;
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interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
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#mbox-cells = <1>;
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};
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sdhci1: sdhci@d0000 {
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compatible = "marvell,armada-3700-sdhci",
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"marvell,sdhci-xenon";
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@ -73,16 +73,6 @@ cp0_reg_usb3_1_vbus: cp0-usb3-1-vbus {
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gpio = <&expander0 1 GPIO_ACTIVE_HIGH>;
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vin-supply = <&cp0_exp_usb3_1_current_regulator>;
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};
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cp0_usb3_0_phy: cp0-usb3-0-phy {
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compatible = "usb-nop-xceiv";
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vcc-supply = <&cp0_reg_usb3_0_vbus>;
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};
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cp0_usb3_1_phy: cp0-usb3-1-phy {
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compatible = "usb-nop-xceiv";
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vcc-supply = <&cp0_reg_usb3_1_vbus>;
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};
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};
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&i2c0 {
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@ -124,6 +114,8 @@ &uart0 {
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&cp0_pcie2 {
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status = "okay";
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phys = <&cp0_comphy5 2>;
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phy-names = "cp0-pcie2-x1-phy";
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};
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&cp0_i2c0 {
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@ -219,15 +211,36 @@ partition@400000 {
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&cp0_sata0 {
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status = "okay";
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sata-port@1 {
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phys = <&cp0_comphy3 1>;
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phy-names = "cp0-sata0-1-phy";
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};
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};
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&cp0_comphy1 {
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cp0_usbh0_con: connector {
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compatible = "usb-a-connector";
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phy-supply = <&cp0_reg_usb3_0_vbus>;
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};
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};
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&cp0_usb3_0 {
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usb-phy = <&cp0_usb3_0_phy>;
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phys = <&cp0_comphy1 0>;
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phy-names = "cp0-usb3h0-comphy";
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status = "okay";
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};
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&cp0_comphy4 {
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cp0_usbh1_con: connector {
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compatible = "usb-a-connector";
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phy-supply = <&cp0_reg_usb3_1_vbus>;
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};
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};
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&cp0_usb3_1 {
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usb-phy = <&cp0_usb3_1_phy>;
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phys = <&cp0_comphy4 1>;
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phy-names = "cp0-usb3h1-comphy";
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status = "okay";
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};
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@ -51,11 +51,6 @@ v_5v0_usb3_hst_vbus: regulator-usb3-vbus0 {
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status = "okay";
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};
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usb3h0_phy: usb3_phy0 {
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compatible = "usb-nop-xceiv";
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vcc-supply = <&v_5v0_usb3_hst_vbus>;
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};
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sfp_cp0_eth0: sfp-cp0-eth0 {
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compatible = "sff,sfp";
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i2c-bus = <&cp0_i2c1>;
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@ -243,6 +238,8 @@ &cp0_pcie0 {
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_pci0_reset_pins &cp0_wlan_disable_pins>;
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reset-gpios = <&cp0_gpio2 0 GPIO_ACTIVE_LOW>;
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phys = <&cp0_comphy0 0>;
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phy-names = "cp0-pcie0-x1-phy";
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status = "okay";
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};
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@ -348,6 +345,11 @@ cp1_wps_button_pins: wps-button-pins {
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&cp1_sata0 {
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pinctrl-0 = <&cp0_pci1_reset_pins>;
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status = "okay";
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sata-port@1 {
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phys = <&cp1_comphy0 1>;
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phy-names = "cp1-sata0-1-phy";
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};
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};
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&cp1_mdio {
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@ -467,7 +469,15 @@ spi-flash@0 {
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};
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};
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&cp1_comphy2 {
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cp1_usbh0_con: connector {
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compatible = "usb-a-connector";
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phy-supply = <&v_5v0_usb3_hst_vbus>;
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};
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};
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&cp1_usb3_0 {
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usb-phy = <&usb3h0_phy>;
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phys = <&cp1_comphy2 0>;
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phy-names = "cp1-usb3h0-comphy";
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status = "okay";
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};
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@ -54,11 +54,6 @@ cp0_usb3_0_phy: cp0-usb3-0-phy {
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vcc-supply = <&cp0_reg_usb3_0_vbus>;
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};
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cp0_usb3_1_phy: cp0-usb3-1-phy {
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compatible = "usb-nop-xceiv";
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vcc-supply = <&cp0_reg_usb3_1_vbus>;
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};
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cp1_reg_usb3_0_vbus: cp1-usb3-0-vbus {
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compatible = "regulator-fixed";
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regulator-name = "cp1-usb3h0-vbus";
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@ -108,11 +103,15 @@ &uart0 {
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/* CON6 on CP0 expansion */
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&cp0_pcie0 {
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phys = <&cp0_comphy0 0>;
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phy-names = "cp0-pcie0-x1-phy";
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status = "okay";
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};
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/* CON5 on CP0 expansion */
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&cp0_pcie2 {
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phys = <&cp0_comphy5 2>;
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phy-names = "cp0-pcie2-x1-phy";
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status = "okay";
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};
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@ -143,6 +142,15 @@ expander1: pca9555@25 {
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/* CON4 on CP0 expansion */
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&cp0_sata0 {
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status = "okay";
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sata-port@0 {
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phys = <&cp0_comphy1 0>;
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phy-names = "cp0-sata0-0-phy";
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};
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sata-port@1 {
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phys = <&cp0_comphy3 1>;
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phy-names = "cp0-sata0-1-phy";
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};
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};
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/* CON9 on CP0 expansion */
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@ -151,9 +159,17 @@ &cp0_usb3_0 {
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status = "okay";
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};
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&cp0_comphy4 {
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cp0_usbh1_con: connector {
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compatible = "usb-a-connector";
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phy-supply = <&cp0_reg_usb3_1_vbus>;
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};
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};
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/* CON10 on CP0 expansion */
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&cp0_usb3_1 {
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usb-phy = <&cp0_usb3_1_phy>;
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phys = <&cp0_comphy4 1>;
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phy-names = "cp0-usb3h1-comphy";
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status = "okay";
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};
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@ -187,16 +203,22 @@ &cp0_eth2 {
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/* CON6 on CP1 expansion */
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&cp1_pcie0 {
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phys = <&cp1_comphy0 0>;
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phy-names = "cp1-pcie0-x1-phy";
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status = "okay";
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};
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/* CON7 on CP1 expansion */
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&cp1_pcie1 {
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phys = <&cp1_comphy4 1>;
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phy-names = "cp1-pcie1-x1-phy";
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status = "okay";
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};
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/* CON5 on CP1 expansion */
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&cp1_pcie2 {
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phys = <&cp1_comphy5 2>;
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phy-names = "cp1-pcie2-x1-phy";
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status = "okay";
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};
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@ -273,6 +295,15 @@ partition@1000000 {
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/* CON4 on CP1 expansion */
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&cp1_sata0 {
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status = "okay";
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sata-port@0 {
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phys = <&cp1_comphy1 0>;
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phy-names = "cp1-sata0-0-phy";
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};
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sata-port@1 {
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phys = <&cp1_comphy3 1>;
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phy-names = "cp1-sata0-1-phy";
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};
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};
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/* CON9 on CP1 expansion */
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@ -61,11 +61,6 @@ v_5v0_usb3_hst_vbus: regulator-usb3-vbus0 {
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status = "okay";
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};
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usb3h0_phy: usb3_phy0 {
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compatible = "usb-nop-xceiv";
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vcc-supply = <&v_5v0_usb3_hst_vbus>;
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};
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sfp_eth0: sfp-eth0 {
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/* CON15,16 - CPM lane 4 */
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compatible = "sff,sfp";
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@ -186,6 +181,10 @@ &cp0_pcie0 {
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reset-gpios = <&cp0_gpio2 20 GPIO_ACTIVE_LOW>;
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ranges = <0x81000000 0x0 0xf9010000 0x0 0xf9010000 0x0 0x10000
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0x82000000 0x0 0xc0000000 0x0 0xc0000000 0x0 0x20000000>;
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phys = <&cp0_comphy0 0>, <&cp0_comphy1 0>,
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<&cp0_comphy2 0>, <&cp0_comphy3 0>;
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phy-names = "cp0-pcie0-x4-lane0-phy", "cp0-pcie0-x4-lane1-phy",
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"cp0-pcie0-x4-lane2-phy", "cp0-pcie0-x4-lane3-phy";
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status = "okay";
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};
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@ -239,8 +238,13 @@ &cp0_eth0 {
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};
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&cp0_sata0 {
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/* CPM Lane 0 - U29 */
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status = "okay";
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/* CPM Lane 5 - U29 */
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sata-port@1 {
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phys = <&cp0_comphy5 1>;
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phy-names = "cp0-sata0-1-phy";
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};
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};
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&cp0_sdhci0 {
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@ -324,9 +328,19 @@ &cp1_uart0 {
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};
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&cp1_sata0 {
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/* CPS Lane 1 - U32 */
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/* CPS Lane 3 - U31 */
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status = "okay";
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/* CPS Lane 1 - U32 */
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sata-port@0 {
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phys = <&cp1_comphy1 0>;
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phy-names = "cp1-sata0-0-phy";
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};
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/* CPS Lane 3 - U31 */
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sata-port@1 {
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phys = <&cp1_comphy3 1>;
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phy-names = "cp1-sata0-1-phy";
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};
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};
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&cp1_spi1 {
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@ -341,8 +355,16 @@ spi-flash@0 {
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};
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};
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&cp1_comphy2 {
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cp1_usbh0_con: connector {
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compatible = "usb-a-connector";
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phy-supply = <&v_5v0_usb3_hst_vbus>;
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};
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};
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&cp1_usb3_0 {
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/* CPS Lane 2 - CON7 */
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usb-phy = <&usb3h0_phy>;
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phys = <&cp1_comphy2 0>;
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phy-names = "cp1-usb3h0-comphy";
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status = "okay";
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};
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@ -21,6 +21,7 @@ cpu0: cpu@0 {
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reg = <0x000>;
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enable-method = "psci";
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#cooling-cells = <2>;
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clocks = <&cpu_clk 0>;
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};
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cpu1: cpu@1 {
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device_type = "cpu";
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@ -28,6 +29,7 @@ cpu1: cpu@1 {
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reg = <0x001>;
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enable-method = "psci";
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#cooling-cells = <2>;
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clocks = <&cpu_clk 0>;
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};
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cpu2: cpu@100 {
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device_type = "cpu";
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@ -35,6 +37,7 @@ cpu2: cpu@100 {
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reg = <0x100>;
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enable-method = "psci";
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#cooling-cells = <2>;
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clocks = <&cpu_clk 1>;
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};
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cpu3: cpu@101 {
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device_type = "cpu";
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@ -42,7 +45,7 @@ cpu3: cpu@101 {
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reg = <0x101>;
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enable-method = "psci";
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#cooling-cells = <2>;
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clocks = <&cpu_clk 1>;
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};
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};
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};
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@ -280,6 +280,13 @@ ap_syscon1: system-controller@6f8000 {
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#address-cells = <1>;
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#size-cells = <1>;
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cpu_clk: clock-cpu@278 {
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compatible = "marvell,ap806-cpu-clock";
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clocks = <&ap_clk 0>, <&ap_clk 1>;
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#clock-cells = <1>;
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reg = <0x278 0xa30>;
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};
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ap_thermal: thermal-sensor@80 {
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compatible = "marvell,armada-ap806-thermal";
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reg = <0x80 0x10>;
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@ -133,6 +133,9 @@ CP110_LABEL(comphy): phy@120000 {
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compatible = "marvell,comphy-cp110";
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reg = <0x120000 0x6000>;
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marvell,system-controller = <&CP110_LABEL(syscon0)>;
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clocks = <&CP110_LABEL(clk) 1 5>, <&CP110_LABEL(clk) 1 6>,
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<&CP110_LABEL(clk) 1 18>;
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clock-names = "mg_clk", "mg_core_clk", "axi_clk";
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#address-cells = <1>;
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#size-cells = <0>;
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@ -306,7 +309,17 @@ CP110_LABEL(sata0): sata@540000 {
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interrupts = <107 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&CP110_LABEL(clk) 1 15>,
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<&CP110_LABEL(clk) 1 16>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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sata-port@0 {
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reg = <0>;
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};
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sata-port@1 {
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reg = <1>;
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};
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};
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CP110_LABEL(xor0): xor@6a0000 {
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