ARM: dts: keystone-k2e-clocks: Add missing unit name to clock nodes that have regs

Add the control register as the base for the clock nodes which are
missing them. This squashes the following warnings of the effect when built
with W=1:
arch/arm/boot/dts/keystone-k2e-evm.dtb: Warning (unit_address_vs_reg): Node /soc@0/clocks/clkusb1 has a reg or ranges property, but no unit name
arch/arm/boot/dts/keystone-k2e-evm.dtb: Warning (unit_address_vs_reg): Node /soc@0/clocks/clkhyperlink0 has a reg or ranges property, but no unit name
arch/arm/boot/dts/keystone-k2e-evm.dtb: Warning (unit_address_vs_reg): Node /soc@0/clocks/clkpcie1 has a reg or ranges property, but no unit name
arch/arm/boot/dts/keystone-k2e-evm.dtb: Warning (unit_address_vs_reg): Node /soc@0/clocks/clkxge has a reg or ranges property, but no unit name

Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
This commit is contained in:
Nishanth Menon 2017-12-15 01:38:48 -06:00 committed by Santosh Shilimkar
parent bc683c7503
commit 95d8b41c76

View File

@ -32,7 +32,7 @@ ddr3apllclk: ddr3apllclk@2620360 {
reg-names = "control"; reg-names = "control";
}; };
clkusb1: clkusb1 { clkusb1: clkusb1@2350004 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk16>; clocks = <&chipclk16>;
@ -42,7 +42,7 @@ clkusb1: clkusb1 {
domain-id = <0>; domain-id = <0>;
}; };
clkhyperlink0: clkhyperlink0 { clkhyperlink0: clkhyperlink02350030 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk12>; clocks = <&chipclk12>;
@ -52,7 +52,7 @@ clkhyperlink0: clkhyperlink0 {
domain-id = <5>; domain-id = <5>;
}; };
clkpcie1: clkpcie1 { clkpcie1: clkpcie1@235006c {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk12>; clocks = <&chipclk12>;
@ -62,7 +62,7 @@ clkpcie1: clkpcie1 {
domain-id = <18>; domain-id = <18>;
}; };
clkxge: clkxge { clkxge: clkxge@23500c8 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;