From 95d8b41c765b8ec726fc9c7f7d42777e7c4af860 Mon Sep 17 00:00:00 2001 From: Nishanth Menon Date: Fri, 15 Dec 2017 01:38:48 -0600 Subject: [PATCH] ARM: dts: keystone-k2e-clocks: Add missing unit name to clock nodes that have regs Add the control register as the base for the clock nodes which are missing them. This squashes the following warnings of the effect when built with W=1: arch/arm/boot/dts/keystone-k2e-evm.dtb: Warning (unit_address_vs_reg): Node /soc@0/clocks/clkusb1 has a reg or ranges property, but no unit name arch/arm/boot/dts/keystone-k2e-evm.dtb: Warning (unit_address_vs_reg): Node /soc@0/clocks/clkhyperlink0 has a reg or ranges property, but no unit name arch/arm/boot/dts/keystone-k2e-evm.dtb: Warning (unit_address_vs_reg): Node /soc@0/clocks/clkpcie1 has a reg or ranges property, but no unit name arch/arm/boot/dts/keystone-k2e-evm.dtb: Warning (unit_address_vs_reg): Node /soc@0/clocks/clkxge has a reg or ranges property, but no unit name Reported-by: Rob Herring Signed-off-by: Nishanth Menon Signed-off-by: Santosh Shilimkar --- arch/arm/boot/dts/keystone-k2e-clocks.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/keystone-k2e-clocks.dtsi b/arch/arm/boot/dts/keystone-k2e-clocks.dtsi index 915a99d5bc5e..5e0e7d232161 100644 --- a/arch/arm/boot/dts/keystone-k2e-clocks.dtsi +++ b/arch/arm/boot/dts/keystone-k2e-clocks.dtsi @@ -32,7 +32,7 @@ ddr3apllclk: ddr3apllclk@2620360 { reg-names = "control"; }; - clkusb1: clkusb1 { + clkusb1: clkusb1@2350004 { #clock-cells = <0>; compatible = "ti,keystone,psc-clock"; clocks = <&chipclk16>; @@ -42,7 +42,7 @@ clkusb1: clkusb1 { domain-id = <0>; }; - clkhyperlink0: clkhyperlink0 { + clkhyperlink0: clkhyperlink02350030 { #clock-cells = <0>; compatible = "ti,keystone,psc-clock"; clocks = <&chipclk12>; @@ -52,7 +52,7 @@ clkhyperlink0: clkhyperlink0 { domain-id = <5>; }; - clkpcie1: clkpcie1 { + clkpcie1: clkpcie1@235006c { #clock-cells = <0>; compatible = "ti,keystone,psc-clock"; clocks = <&chipclk12>; @@ -62,7 +62,7 @@ clkpcie1: clkpcie1 { domain-id = <18>; }; - clkxge: clkxge { + clkxge: clkxge@23500c8 { #clock-cells = <0>; compatible = "ti,keystone,psc-clock"; clocks = <&chipclk13>;