Merge remote-tracking branch 'torvalds/master' into perf/urgent

To synchronize UAPI headers.

Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
This commit is contained in:
Arnaldo Carvalho de Melo 2020-07-03 08:05:59 -03:00
commit 9434628fce
725 changed files with 6032 additions and 3206 deletions

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@ -1,6 +1,6 @@
What: /sys/bus/platform/devices/ci_hdrc.0/inputs/a_bus_req
Date: Feb 2014
Contact: Li Jun <b47624@freescale.com>
Contact: Li Jun <jun.li@nxp.com>
Description:
Can be set and read.
Set a_bus_req(A-device bus request) input to be 1 if
@ -17,7 +17,7 @@ Description:
What: /sys/bus/platform/devices/ci_hdrc.0/inputs/a_bus_drop
Date: Feb 2014
Contact: Li Jun <b47624@freescale.com>
Contact: Li Jun <jun.li@nxp.com>
Description:
Can be set and read
The a_bus_drop(A-device bus drop) input is 1 when the
@ -32,7 +32,7 @@ Description:
What: /sys/bus/platform/devices/ci_hdrc.0/inputs/b_bus_req
Date: Feb 2014
Contact: Li Jun <b47624@freescale.com>
Contact: Li Jun <jun.li@nxp.com>
Description:
Can be set and read.
The b_bus_req(B-device bus request) input is 1 during the time
@ -47,7 +47,7 @@ Description:
What: /sys/bus/platform/devices/ci_hdrc.0/inputs/a_clr_err
Date: Feb 2014
Contact: Li Jun <b47624@freescale.com>
Contact: Li Jun <jun.li@nxp.com>
Description:
Only can be set.
The a_clr_err(A-device Vbus error clear) input is used to clear

View File

@ -1356,8 +1356,8 @@ PAGE_SIZE multiple when read back.
thp_fault_alloc
Number of transparent hugepages which were allocated to satisfy
a page fault, including COW faults. This counter is not present
when CONFIG_TRANSPARENT_HUGEPAGE is not set.
a page fault. This counter is not present when CONFIG_TRANSPARENT_HUGEPAGE
is not set.
thp_collapse_alloc
Number of transparent hugepages which were allocated to allow

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@ -11,6 +11,7 @@ Device Mapper
dm-clone
dm-crypt
dm-dust
dm-ebs
dm-flakey
dm-init
dm-integrity

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@ -305,8 +305,7 @@ monitor how successfully the system is providing huge pages for use.
thp_fault_alloc
is incremented every time a huge page is successfully
allocated to handle a page fault. This applies to both the
first time a page is faulted and for COW faults.
allocated to handle a page fault.
thp_collapse_alloc
is incremented by khugepaged when it has found

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@ -86,6 +86,20 @@ then the next program in the chain (A) will see those changes,
*not* the original input ``setsockopt`` arguments. The potentially
modified values will be then passed down to the kernel.
Large optval
============
When the ``optval`` is greater than the ``PAGE_SIZE``, the BPF program
can access only the first ``PAGE_SIZE`` of that data. So it has to options:
* Set ``optlen`` to zero, which indicates that the kernel should
use the original buffer from the userspace. Any modifications
done by the BPF program to the ``optval`` are ignored.
* Set ``optlen`` to the value less than ``PAGE_SIZE``, which
indicates that the kernel should use BPF's trimmed ``optval``.
When the BPF program returns with the ``optlen`` greater than
``PAGE_SIZE``, the userspace will receive ``EFAULT`` errno.
Example
=======

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@ -33,7 +33,7 @@ all combinations of get*(), pin*(), FOLL_LONGTERM, and more. Also, the
pin_user_pages*() APIs are clearly distinct from the get_user_pages*() APIs, so
that's a natural dividing line, and a good point to make separate wrapper calls.
In other words, use pin_user_pages*() for DMA-pinned pages, and
get_user_pages*() for other cases. There are four cases described later on in
get_user_pages*() for other cases. There are five cases described later on in
this document, to further clarify that concept.
FOLL_PIN and FOLL_GET are mutually exclusive for a given gup call. However,

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@ -114,12 +114,6 @@ the below options are available:
To dynamically limit for which functions to generate reports, see the
`DebugFS interface`_ blacklist/whitelist feature.
For ``__always_inline`` functions, replace ``__always_inline`` with
``__no_kcsan_or_inline`` (which implies ``__always_inline``)::
static __no_kcsan_or_inline void foo(void) {
...
* To disable data race detection for a particular compilation unit, add to the
``Makefile``::

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@ -61,3 +61,43 @@ test, or an end-to-end test.
kernel by installing a production configuration of the kernel on production
hardware with a production userspace and then trying to exercise some behavior
that depends on interactions between the hardware, the kernel, and userspace.
KUnit isn't working, what should I do?
======================================
Unfortunately, there are a number of things which can break, but here are some
things to try.
1. Try running ``./tools/testing/kunit/kunit.py run`` with the ``--raw_output``
parameter. This might show details or error messages hidden by the kunit_tool
parser.
2. Instead of running ``kunit.py run``, try running ``kunit.py config``,
``kunit.py build``, and ``kunit.py exec`` independently. This can help track
down where an issue is occurring. (If you think the parser is at fault, you
can run it manually against stdin or a file with ``kunit.py parse``.)
3. Running the UML kernel directly can often reveal issues or error messages
kunit_tool ignores. This should be as simple as running ``./vmlinux`` after
building the UML kernel (e.g., by using ``kunit.py build``). Note that UML
has some unusual requirements (such as the host having a tmpfs filesystem
mounted), and has had issues in the past when built statically and the host
has KASLR enabled. (On older host kernels, you may need to run ``setarch
`uname -m` -R ./vmlinux`` to disable KASLR.)
4. Make sure the kernel .config has ``CONFIG_KUNIT=y`` and at least one test
(e.g. ``CONFIG_KUNIT_EXAMPLE_TEST=y``). kunit_tool will keep its .config
around, so you can see what config was used after running ``kunit.py run``.
It also preserves any config changes you might make, so you can
enable/disable things with ``make ARCH=um menuconfig`` or similar, and then
re-run kunit_tool.
5. Try to run ``make ARCH=um defconfig`` before running ``kunit.py run``. This
may help clean up any residual config items which could be causing problems.
6. Finally, try running KUnit outside UML. KUnit and KUnit tests can run be
built into any kernel, or can be built as a module and loaded at runtime.
Doing so should allow you to determine if UML is causing the issue you're
seeing. When tests are built-in, they will execute when the kernel boots, and
modules will automatically execute associated tests when loaded. Test results
can be collected from ``/sys/kernel/debug/kunit/<test suite>/results``, and
can be parsed with ``kunit.py parse``. For more details, see "KUnit on
non-UML architectures" in :doc:`usage`.
If none of the above tricks help, you are always welcome to email any issues to
kunit-dev@googlegroups.com.

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@ -2,7 +2,6 @@
DT_DOC_CHECKER ?= dt-doc-validate
DT_EXTRACT_EX ?= dt-extract-example
DT_MK_SCHEMA ?= dt-mk-schema
DT_MK_SCHEMA_USERONLY_FLAG := $(if $(DT_SCHEMA_FILES), -u)
DT_SCHEMA_MIN_VERSION = 2020.5
@ -35,21 +34,40 @@ quiet_cmd_mk_schema = SCHEMA $@
DT_DOCS = $(shell $(find_cmd) | sed -e 's|^$(srctree)/||')
DT_SCHEMA_FILES ?= $(DT_DOCS)
extra-$(CHECK_DT_BINDING) += $(patsubst $(src)/%.yaml,%.example.dts, $(DT_SCHEMA_FILES))
extra-$(CHECK_DT_BINDING) += $(patsubst $(src)/%.yaml,%.example.dt.yaml, $(DT_SCHEMA_FILES))
extra-$(CHECK_DT_BINDING) += processed-schema-examples.yaml
override DTC_FLAGS := \
-Wno-avoid_unnecessary_addr_size \
-Wno-graph_child_address
-Wno-graph_child_address \
-Wno-interrupt_provider
$(obj)/processed-schema-examples.yaml: $(DT_DOCS) check_dtschema_version FORCE
$(call if_changed,mk_schema)
$(obj)/processed-schema.yaml: DT_MK_SCHEMA_FLAGS := $(DT_MK_SCHEMA_USERONLY_FLAG)
ifeq ($(DT_SCHEMA_FILES),)
# Unless DT_SCHEMA_FILES is specified, use the full schema for dtbs_check too.
# Just copy processed-schema-examples.yaml
$(obj)/processed-schema.yaml: $(obj)/processed-schema-examples.yaml FORCE
$(call if_changed,copy)
DT_SCHEMA_FILES = $(DT_DOCS)
else
# If DT_SCHEMA_FILES is specified, use it for processed-schema.yaml
$(obj)/processed-schema.yaml: DT_MK_SCHEMA_FLAGS := -u
$(obj)/processed-schema.yaml: $(DT_SCHEMA_FILES) check_dtschema_version FORCE
$(call if_changed,mk_schema)
extra-y += processed-schema.yaml
endif
extra-$(CHECK_DT_BINDING) += $(patsubst $(src)/%.yaml,%.example.dts, $(DT_SCHEMA_FILES))
extra-$(CHECK_DT_BINDING) += $(patsubst $(src)/%.yaml,%.example.dt.yaml, $(DT_SCHEMA_FILES))
extra-$(CHECK_DT_BINDING) += processed-schema-examples.yaml
extra-$(CHECK_DTBS) += processed-schema.yaml
# Hack: avoid 'Argument list too long' error for 'make clean'. Remove most of
# build artifacts here before they are processed by scripts/Makefile.clean
clean-files = $(shell find $(obj) \( -name '*.example.dts' -o \
-name '*.example.dt.yaml' \) -delete 2>/dev/null)

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@ -47,7 +47,7 @@ Required properties:
&lsio_mu1 1 2
&lsio_mu1 1 3
&lsio_mu1 3 3>;
See Documentation/devicetree/bindings/mailbox/fsl,mu.txt
See Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
for detailed mailbox binding.
Note: Each mu which supports general interrupt should have an alias correctly

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@ -80,14 +80,14 @@ examples:
ranges = <1 0x00000000 0x42000000 0x02000000>,
<5 0x00000000 0x46000000 0x01000000>;
ethernet@1,01f00000 {
ethernet@1,1f00000 {
compatible = "smsc,lan9115";
reg = <1 0x01f00000 0x1000>;
interrupts = <0 48 4>;
phy-mode = "mii";
};
uart@5,00200000 {
serial@5,200000 {
compatible = "ns16550a";
reg = <5 0x00200000 0x20>;
interrupts = <0 49 4>;

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@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Clock bindings for Freescale i.MX27
maintainers:
- Fabio Estevam <fabio.estevam@freescale.com>
- Fabio Estevam <fabio.estevam@nxp.com>
description: |
The clock consumer should specify the desired clock by having the clock

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@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Clock bindings for Freescale i.MX31
maintainers:
- Fabio Estevam <fabio.estevam@freescale.com>
- Fabio Estevam <fabio.estevam@nxp.com>
description: |
The clock consumer should specify the desired clock by having the clock

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@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Clock bindings for Freescale i.MX5
maintainers:
- Fabio Estevam <fabio.estevam@freescale.com>
- Fabio Estevam <fabio.estevam@nxp.com>
description: |
The clock consumer should specify the desired clock by having the clock

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@ -37,7 +37,7 @@ Optional properties:
simple-card or audio-graph-card binding. See their binding
documents on how to describe the way the sii902x device is
connected to the rest of the audio system:
Documentation/devicetree/bindings/sound/simple-card.txt
Documentation/devicetree/bindings/sound/simple-card.yaml
Documentation/devicetree/bindings/sound/audio-graph-card.txt
Note: In case of the audio-graph-card binding the used port
index should be 3.

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@ -68,7 +68,7 @@ Required properties:
datasheet
- clocks : phandle to the PRE axi clock input, as described
in Documentation/devicetree/bindings/clock/clock-bindings.txt and
Documentation/devicetree/bindings/clock/imx6q-clock.txt.
Documentation/devicetree/bindings/clock/imx6q-clock.yaml.
- clock-names: should be "axi"
- interrupts: should contain the PRE interrupt
- fsl,iram: phandle pointing to the mmio-sram device node, that should be
@ -94,7 +94,7 @@ Required properties:
datasheet
- clocks : phandles to the PRG ipg and axi clock inputs, as described
in Documentation/devicetree/bindings/clock/clock-bindings.txt and
Documentation/devicetree/bindings/clock/imx6q-clock.txt.
Documentation/devicetree/bindings/clock/imx6q-clock.yaml.
- clock-names: should be "ipg" and "axi"
- fsl,pres: phandles to the PRE units attached to this PRG, with the fixed
PRE as the first entry and the muxable PREs following.

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@ -30,8 +30,8 @@ Required properties:
"di2_sel" - IPU2 DI0 mux
"di3_sel" - IPU2 DI1 mux
The needed clock numbers for each are documented in
Documentation/devicetree/bindings/clock/imx5-clock.txt, and in
Documentation/devicetree/bindings/clock/imx6q-clock.txt.
Documentation/devicetree/bindings/clock/imx5-clock.yaml, and in
Documentation/devicetree/bindings/clock/imx6q-clock.yaml.
Optional properties:
- pinctrl-names : should be "default" on i.MX53, not used on i.MX6q

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@ -33,7 +33,7 @@ additionalProperties: false
examples:
- |
sysreg {
sysreg@0 {
compatible = "arm,versatile-sysreg", "syscon", "simple-mfd";
reg = <0x00000 0x1000>;

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@ -24,7 +24,7 @@ properties:
description: |
Should contain a list of phandles pointing to display interface port
of vop devices. vop definitions as defined in
Documentation/devicetree/bindings/display/rockchip/rockchip-vop.txt
Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml
required:
- compatible

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@ -12,7 +12,7 @@ Required properties for the top level node:
Only the GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported.
- #interrupt-cells : Specifies the number of cells needed to encode an
interrupt. Should be 2. The first cell defines the interrupt number,
the second encodes the triger flags encoded as described in
the second encodes the trigger flags encoded as described in
Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
- compatible:
- "mediatek,mt7621-gpio" for Mediatek controllers

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@ -10,7 +10,7 @@ Interrupt number definition:
16-31 : private irq, and we use 16 as the co-processor timer.
31-1024: common irq for soc ip.
Interrupt triger mode: (Defined in dt-bindings/interrupt-controller/irq.h)
Interrupt trigger mode: (Defined in dt-bindings/interrupt-controller/irq.h)
IRQ_TYPE_LEVEL_HIGH (default)
IRQ_TYPE_LEVEL_LOW
IRQ_TYPE_EDGE_RISING

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@ -87,7 +87,7 @@ Example:
ranges;
/* APU<->RPU0 IPI mailbox controller */
ipi_mailbox_rpu0: mailbox@ff90400 {
ipi_mailbox_rpu0: mailbox@ff990400 {
reg = <0xff990400 0x20>,
<0xff990420 0x20>,
<0xff990080 0x20>,

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@ -8,7 +8,7 @@ The embedded controller requires the SPI controller driver to signal readiness
to receive a transfer (that is, when TX FIFO contains the response data) by
strobing the ACK pin with the ready signal. See the "ready-gpios" property of the
SSP binding as documented in:
<Documentation/devicetree/bindings/spi/spi-pxa2xx.txt>.
<Documentation/devicetree/bindings/spi/marvell,mmp2-ssp.yaml>.
Example:
&ssp3 {

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@ -3,7 +3,7 @@ MediaTek SoC built-in Bluetooth Devices
This device is a serial attached device to BTIF device and thus it must be a
child node of the serial node with BTIF. The dt-bindings details for BTIF
device can be known via Documentation/devicetree/bindings/serial/8250.txt.
device can be known via Documentation/devicetree/bindings/serial/8250.yaml.
Required properties:

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@ -114,7 +114,7 @@ with values derived from the SoC user manual.
[flags]>
On other mach-shmobile platforms GPIO is handled by the gpio-rcar driver.
Please refer to Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
Please refer to Documentation/devicetree/bindings/gpio/renesas,rcar-gpio.yaml
for documentation of the GPIO device tree bindings on those platforms.

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@ -5,7 +5,7 @@ It is based on common bindings for device graphs.
see ${LINUX}/Documentation/devicetree/bindings/graph.txt
Basically, Audio Graph Card property is same as Simple Card.
see ${LINUX}/Documentation/devicetree/bindings/sound/simple-card.txt
see ${LINUX}/Documentation/devicetree/bindings/sound/simple-card.yaml
Below are same as Simple-Card.

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@ -5,7 +5,7 @@ codec or external codecs.
sti sound drivers allows to expose sti SoC audio interface through the
generic ASoC simple card. For details about sound card declaration please refer to
Documentation/devicetree/bindings/sound/simple-card.txt.
Documentation/devicetree/bindings/sound/simple-card.yaml.
1) sti-uniperiph-dai: audio dai device.
---------------------------------------

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@ -34,12 +34,15 @@ properties:
maxItems: 1
clocks:
maxItems: 1
minItems: 1
maxItems: 2
items:
- description: controller register bus clock
- description: baud rate generator and delay control clock
clock-names:
description: input clock for the baud rate generator
items:
- const: core
minItems: 1
maxItems: 2
if:
properties:
@ -51,17 +54,22 @@ if:
then:
properties:
clocks:
contains:
items:
- description: controller register bus clock
- description: baud rate generator and delay control clock
minItems: 2
clock-names:
minItems: 2
items:
- const: core
- const: pclk
else:
properties:
clocks:
maxItems: 1
clock-names:
items:
- const: core
required:
- compatible
- reg

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@ -19,7 +19,7 @@ Required properties:
SPI Controller nodes must be child of GENI based Qualcomm Universal
Peripharal. Please refer GENI based QUP wrapper controller node bindings
described in Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.txt.
described in Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml.
SPI slave nodes must be children of the SPI master node and conform to SPI bus
binding as described in Documentation/devicetree/bindings/spi/spi-bus.txt.

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@ -41,7 +41,7 @@ examples:
#include <dt-bindings/interrupt-controller/arm-gic.h>
// Example 1: SDM845 TSENS
soc: soc@0 {
soc: soc {
#address-cells = <2>;
#size-cells = <2>;

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@ -224,7 +224,7 @@ examples:
#include <dt-bindings/thermal/thermal.h>
// Example 1: SDM845 TSENS
soc: soc@0 {
soc {
#address-cells = <2>;
#size-cells = <2>;

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@ -35,7 +35,7 @@ examples:
#include <dt-bindings/soc/ti,sci_pm_domain.h>
vtm: thermal@42050000 {
compatible = "ti,am654-vtm";
reg = <0x0 0x42050000 0x0 0x25c>;
reg = <0x42050000 0x25c>;
power-domains = <&k3_pds 80 TI_SCI_PD_EXCLUSIVE>;
#thermal-sensor-cells = <1>;
};

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@ -8,7 +8,7 @@ regs is accessed by cpu co-processor 4 registers with mtcr/mfcr.
- PTIM_CTLR "cr<0, 14>" Control reg to start reset timer.
- PTIM_TSR "cr<1, 14>" Interrupt cleanup status reg.
- PTIM_CCVR "cr<3, 14>" Current counter value reg.
- PTIM_LVR "cr<6, 14>" Window value reg to triger next event.
- PTIM_LVR "cr<6, 14>" Window value reg to trigger next event.
==============================
timer node bindings definition

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@ -127,8 +127,8 @@ examples:
#address-cells = <1>;
#size-cells = <0>;
string@0409 {
reg = <0x0409>;
string@409 {
reg = <0x409>;
manufacturer = "ASPEED";
product = "USB Virtual Hub";
serial-number = "0000";

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@ -1,4 +1,4 @@
:orphan:
.. SPDX-License-Identifier: GPL-2.0
Writing DeviceTree Bindings in json-schema
==========================================
@ -124,9 +124,12 @@ dtc must also be built with YAML output support enabled. This requires that
libyaml and its headers be installed on the host system. For some distributions
that involves installing the development package, such as:
Debian:
Debian::
apt-get install libyaml-dev
Fedora:
Fedora::
dnf -y install libyaml-devel
Running checks

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@ -68,4 +68,4 @@ and frameworks can be controlled from the same registers, all of these
drivers access their registers through the same regmap.
For more information regarding the devicetree bindings of the TCU drivers,
have a look at Documentation/devicetree/bindings/timer/ingenic,tcu.txt.
have a look at Documentation/devicetree/bindings/timer/ingenic,tcu.yaml.

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@ -30,8 +30,8 @@ Socket API
The address family, socket addresses etc. are defined in the
include/net/af_ieee802154.h header or in the special header
in the userspace package (see either http://wpan.cakelab.org/ or the
git tree at https://github.com/linux-wpan/wpan-tools).
in the userspace package (see either https://linux-wpan.org/wpan-tools.html
or the git tree at https://github.com/linux-wpan/wpan-tools).
6LoWPAN Linux implementation
============================

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@ -3946,7 +3946,7 @@ L: linux-crypto@vger.kernel.org
S: Supported
F: drivers/char/hw_random/cctrng.c
F: drivers/char/hw_random/cctrng.h
F: Documentation/devicetree/bindings/rng/arm-cctrng.txt
F: Documentation/devicetree/bindings/rng/arm-cctrng.yaml
W: https://developer.arm.com/products/system-ip/trustzone-cryptocell/cryptocell-700-family
CEC FRAMEWORK
@ -5490,7 +5490,7 @@ F: include/uapi/drm/r128_drm.h
DRM DRIVER FOR RAYDIUM RM67191 PANELS
M: Robert Chiras <robert.chiras@nxp.com>
S: Maintained
F: Documentation/devicetree/bindings/display/panel/raydium,rm67191.txt
F: Documentation/devicetree/bindings/display/panel/raydium,rm67191.yaml
F: drivers/gpu/drm/panel/panel-raydium-rm67191.c
DRM DRIVER FOR ROCKTECH JH057N00900 PANELS
@ -8333,7 +8333,7 @@ M: Alexander Aring <alex.aring@gmail.com>
M: Stefan Schmidt <stefan@datenfreihafen.org>
L: linux-wpan@vger.kernel.org
S: Maintained
W: http://wpan.cakelab.org/
W: https://linux-wpan.org/
T: git git://git.kernel.org/pub/scm/linux/kernel/git/sschmidt/wpan.git
T: git git://git.kernel.org/pub/scm/linux/kernel/git/sschmidt/wpan-next.git
F: Documentation/networking/ieee802154.rst
@ -10808,7 +10808,7 @@ F: Documentation/devicetree/bindings/dma/mtk-*
F: drivers/dma/mediatek/
MEDIATEK ETHERNET DRIVER
M: Felix Fietkau <nbd@openwrt.org>
M: Felix Fietkau <nbd@nbd.name>
M: John Crispin <john@phrozen.org>
M: Sean Wang <sean.wang@mediatek.com>
M: Mark Lee <Mark-MC.Lee@mediatek.com>
@ -12695,13 +12695,13 @@ F: arch/mips/boot/dts/ralink/omega2p.dts
OP-TEE DRIVER
M: Jens Wiklander <jens.wiklander@linaro.org>
L: tee-dev@lists.linaro.org
L: op-tee@lists.trustedfirmware.org
S: Maintained
F: drivers/tee/optee/
OP-TEE RANDOM NUMBER GENERATOR (RNG) DRIVER
M: Sumit Garg <sumit.garg@linaro.org>
L: tee-dev@lists.linaro.org
L: op-tee@lists.trustedfirmware.org
S: Maintained
F: drivers/char/hw_random/optee-rng.c
@ -14574,8 +14574,8 @@ RENESAS R-CAR THERMAL DRIVERS
M: Niklas Söderlund <niklas.soderlund@ragnatech.se>
L: linux-renesas-soc@vger.kernel.org
S: Supported
F: Documentation/devicetree/bindings/thermal/rcar-gen3-thermal.txt
F: Documentation/devicetree/bindings/thermal/rcar-thermal.txt
F: Documentation/devicetree/bindings/thermal/rcar-gen3-thermal.yaml
F: Documentation/devicetree/bindings/thermal/rcar-thermal.yaml
F: drivers/thermal/rcar_gen3_thermal.c
F: drivers/thermal/rcar_thermal.c
@ -16058,8 +16058,10 @@ SPARSE CHECKER
M: "Luc Van Oostenryck" <luc.vanoostenryck@gmail.com>
L: linux-sparse@vger.kernel.org
S: Maintained
W: https://sparse.wiki.kernel.org/
W: https://sparse.docs.kernel.org/
T: git git://git.kernel.org/pub/scm/devel/sparse/sparse.git
Q: https://patchwork.kernel.org/project/linux-sparse/list/
B: https://bugzilla.kernel.org/enter_bug.cgi?component=Sparse&product=Tools
F: include/linux/compiler.h
SPEAR CLOCK FRAMEWORK SUPPORT
@ -16772,7 +16774,7 @@ F: include/media/i2c/tw9910.h
TEE SUBSYSTEM
M: Jens Wiklander <jens.wiklander@linaro.org>
L: tee-dev@lists.linaro.org
L: op-tee@lists.trustedfirmware.org
S: Maintained
F: Documentation/tee.txt
F: drivers/tee/

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@ -2,7 +2,7 @@
VERSION = 5
PATCHLEVEL = 8
SUBLEVEL = 0
EXTRAVERSION = -rc2
EXTRAVERSION = -rc3
NAME = Kleptomaniac Octopus
# *DOCUMENTATION*

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@ -369,7 +369,7 @@ &mmc1 {
&mmc2 {
status = "okay";
vmmc-supply = <&wl12xx_vmmc>;
ti,non-removable;
non-removable;
bus-width = <4>;
cap-power-off-card;
pinctrl-names = "default";

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@ -22,6 +22,7 @@ &mmc2 {
pinctrl-0 = <&emmc_pins>;
bus-width = <8>;
status = "okay";
non-removable;
};
&am33xx_pinmux {

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@ -75,7 +75,6 @@ &mmc3 {
bus-width = <4>;
non-removable;
cap-power-off-card;
ti,needs-special-hs-handling;
keep-power-in-suspend;
pinctrl-names = "default";
pinctrl-0 = <&mmc3_pins &wl18xx_pins>;

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@ -367,7 +367,6 @@ &mmc3 {
bus-width = <4>;
non-removable;
cap-power-off-card;
ti,needs-special-hs-handling;
keep-power-in-suspend;
pinctrl-names = "default";
pinctrl-0 = <&mmc3_pins &wl18xx_pins>;

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@ -75,7 +75,6 @@ &mmc3 {
bus-width = <4>;
non-removable;
cap-power-off-card;
ti,needs-special-hs-handling;
keep-power-in-suspend;
pinctrl-names = "default";
pinctrl-0 = <&mmc3_pins &wl18xx_pins>;

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@ -743,8 +743,7 @@ xbar-event-map element */
bus-width = <4>;
pinctrl-names = "default";
pinctrl-0 = <&mmc3_pins &wlan_pins>;
ti,non-removable;
ti,needs-special-hs-handling;
non-removable;
cap-power-off-card;
keep-power-in-suspend;

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@ -655,7 +655,7 @@ &gpio0 {
&mmc2 {
status = "okay";
vmmc-supply = <&wl12xx_vmmc>;
ti,non-removable;
non-removable;
bus-width = <4>;
cap-power-off-card;
keep-power-in-suspend;

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@ -339,7 +339,7 @@ &mmc2 {
pinctrl-0 = <&emmc_pins>;
vmmc-supply = <&vmmcsd_fixed>;
bus-width = <8>;
ti,non-removable;
non-removable;
status = "okay";
};

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@ -159,7 +159,7 @@ &mmc2 {
vmmc-supply = <&vmmcsd_fixed>;
bus-width = <8>;
pinctrl-0 = <&mmc1_pins_default>;
ti,non-removable;
non-removable;
status = "okay";
};

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@ -451,7 +451,7 @@ &mmc3 {
vmmc-supply = <&vmmcsd_fixed>;
bus-width = <8>;
pinctrl-0 = <&mmc2_pins_default>;
ti,non-removable;
non-removable;
status = "okay";
};

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@ -341,7 +341,7 @@ &mmc2 {
pinctrl-0 = <&emmc_pins>;
vmmc-supply = <&ldo3_reg>;
bus-width = <8>;
ti,non-removable;
non-removable;
};
&mmc3 {
@ -351,7 +351,7 @@ &mmc3 {
pinctrl-0 = <&wireless_pins>;
vmmmc-supply = <&v3v3c_reg>;
bus-width = <4>;
ti,non-removable;
non-removable;
dmas = <&edma_xbar 12 0 1
&edma_xbar 13 0 2>;
dma-names = "tx", "rx";

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@ -69,7 +69,7 @@ &mmc2 {
pinctrl-0 = <&emmc_pins>;
vmmc-supply = <&vmmc_reg>;
bus-width = <8>;
ti,non-removable;
non-removable;
status = "disabled";
};

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@ -88,7 +88,6 @@ AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_INPUT, MUX_MODE4) /* (B12) mcasp0_aclkr.mmc0_sdwp */
>;
};

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@ -1335,10 +1335,8 @@ SYSC_OMAP2_SOFTRESET |
ranges = <0x0 0x60000 0x1000>;
mmc1: mmc@0 {
compatible = "ti,omap4-hsmmc";
ti,dual-volt;
compatible = "ti,am335-sdhci";
ti,needs-special-reset;
ti,needs-special-hs-handling;
dmas = <&edma_xbar 24 0 0
&edma_xbar 25 0 0>;
dma-names = "tx", "rx";
@ -1816,7 +1814,7 @@ SYSC_OMAP2_SOFTRESET |
ranges = <0x0 0xd8000 0x1000>;
mmc2: mmc@0 {
compatible = "ti,omap4-hsmmc";
compatible = "ti,am335-sdhci";
ti,needs-special-reset;
dmas = <&edma 2 0
&edma 3 0>;

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@ -322,10 +322,11 @@ SYSC_OMAP2_SOFTRESET |
ranges = <0x0 0x47810000 0x1000>;
mmc3: mmc@0 {
compatible = "ti,omap4-hsmmc";
compatible = "ti,am335-sdhci";
ti,needs-special-reset;
interrupts = <29>;
reg = <0x0 0x1000>;
status = "disabled";
};
};
@ -335,7 +336,7 @@ usb: target-module@47400000 {
<0x47400010 0x4>;
reg-names = "rev", "sysc";
ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
SYSC_OMAP2_SOFTRESET)>;
SYSC_OMAP4_SOFTRESET)>;
ti,sysc-midle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>,
<SYSC_IDLE_SMART>;
@ -347,7 +348,7 @@ usb: target-module@47400000 {
clock-names = "fck";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x47400000 0x5000>;
ranges = <0x0 0x47400000 0x8000>;
usb0_phy: usb-phy@1300 {
compatible = "ti,am335x-usb-phy";

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@ -316,10 +316,11 @@ SYSC_OMAP2_SOFTRESET |
ranges = <0x0 0x47810000 0x1000>;
mmc3: mmc@0 {
compatible = "ti,omap4-hsmmc";
compatible = "ti,am437-sdhci";
ti,needs-special-reset;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x0 0x1000>;
status = "disabled";
};
};

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@ -291,7 +291,7 @@ &mmc2 {
pinctrl-0 = <&emmc_pins>;
vmmc-supply = <&vmmc_3v3>;
bus-width = <8>;
ti,non-removable;
non-removable;
};
&spi0 {

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@ -91,22 +91,6 @@ lcd0: display {
backlight = <&lcd_bl>;
panel-timing {
clock-frequency = <33000000>;
hactive = <800>;
vactive = <480>;
hfront-porch = <210>;
hback-porch = <16>;
hsync-len = <30>;
vback-porch = <10>;
vfront-porch = <22>;
vsync-len = <13>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <1>;
};
port {
lcd_in: endpoint {
remote-endpoint = <&dpi_out>;
@ -869,7 +853,7 @@ &mmc2 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&emmc_pins_default>;
pinctrl-1 = <&emmc_pins_sleep>;
ti,non-removable;
non-removable;
};
&mmc3 {
@ -886,7 +870,7 @@ xbar-event-map element */
pinctrl-1 = <&mmc3_pins_sleep>;
cap-power-off-card;
keep-power-in-suspend;
ti,non-removable;
non-removable;
#address-cells = <1>;
#size-cells = <0>;

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@ -1083,9 +1083,8 @@ SYSC_OMAP2_SOFTRESET |
ranges = <0x0 0x60000 0x1000>;
mmc1: mmc@0 {
compatible = "ti,omap4-hsmmc";
compatible = "ti,am437-sdhci";
reg = <0x0 0x1000>;
ti,dual-volt;
ti,needs-special-reset;
dmas = <&edma 24 0>,
<&edma 25 0>;
@ -1598,7 +1597,7 @@ SYSC_OMAP2_SOFTRESET |
ranges = <0x0 0xd8000 0x1000>;
mmc2: mmc@0 {
compatible = "ti,omap4-hsmmc";
compatible = "ti,am437-sdhci";
reg = <0x0 0x1000>;
ti,needs-special-reset;
dmas = <&edma 2 0>,

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@ -134,22 +134,6 @@ lcd0: display {
enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
panel-timing {
clock-frequency = <9000000>;
hactive = <480>;
vactive = <272>;
hfront-porch = <2>;
hback-porch = <2>;
hsync-len = <41>;
vfront-porch = <2>;
vback-porch = <2>;
vsync-len = <10>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <1>;
};
port {
lcd_in: endpoint {
remote-endpoint = <&dpi_out>;
@ -719,7 +703,7 @@ &mmc3 {
pinctrl-1 = <&mmc3_pins_sleep>;
cap-power-off-card;
keep-power-in-suspend;
ti,non-removable;
non-removable;
#address-cells = <1>;
#size-cells = <0>;

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@ -47,22 +47,6 @@ lcd0: display {
backlight = <&lcd_bl>;
panel-timing {
clock-frequency = <33000000>;
hactive = <800>;
vactive = <480>;
hfront-porch = <210>;
hback-porch = <16>;
hsync-len = <30>;
vback-porch = <10>;
vfront-porch = <22>;
vsync-len = <13>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <1>;
};
port {
lcd_in: endpoint {
remote-endpoint = <&dpi_out>;

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@ -505,7 +505,7 @@ &mac {
&cpsw_emac0 {
phy-handle = <&phy0>;
phy-mode = "rgmii";
phy-mode = "rgmii-rxid";
};
&ocp {

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@ -200,7 +200,7 @@ uart1: serial@400 {
status = "disabled";
};
dma@20000 {
dma: dma@20000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x20000 0x1000>;
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
@ -215,6 +215,8 @@ dma@20000 {
clocks = <&iprocslow>;
clock-names = "apb_pclk";
#dma-cells = <1>;
dma-coherent;
status = "disabled";
};
sdio: sdhci@21000 {
@ -257,10 +259,10 @@ amac2: ethernet@24000 {
status = "disabled";
};
mailbox: mailbox@25000 {
mailbox: mailbox@25c00 {
compatible = "brcm,iproc-fa2-mbox";
reg = <0x25000 0x445>;
interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x25c00 0x400>;
interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
#mbox-cells = <1>;
brcm,rx-status-len = <32>;
brcm,use-bcm-hdr;

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@ -17,6 +17,7 @@ chosen {
};
memory {
device_type = "memory";
reg = <0x00000000 0x08000000
0x88000000 0x18000000>;
};

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@ -58,6 +58,10 @@ gpio-restart {
/* USB 3 support needed to be complete */
&dma {
status = "okay";
};
&amac0 {
status = "okay";
};

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@ -58,6 +58,10 @@ gpio-restart {
/* USB 3 support needed to be complete */
&dma {
status = "okay";
};
&amac0 {
status = "okay";
};

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@ -58,6 +58,10 @@ gpio-restart {
/* XHCI support needed to be complete */
&dma {
status = "okay";
};
&amac0 {
status = "okay";
};

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@ -58,6 +58,10 @@ gpio-restart {
/* USB 3 and SLIC support needed to be complete */
&dma {
status = "okay";
};
&amac0 {
status = "okay";
};

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@ -58,6 +58,10 @@ gpio-restart {
/* USB 3 and SLIC support needed to be complete */
&dma {
status = "okay";
};
&amac0 {
status = "okay";
};

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@ -69,6 +69,10 @@ &i2c0 {
status = "okay";
};
&dma {
status = "okay";
};
&amac0 {
status = "okay";
};

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@ -48,6 +48,10 @@ memory@60000000 {
};
};
&dma {
status = "okay";
};
&amac0 {
status = "okay";
};

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@ -245,26 +245,6 @@ &mcasp3 {
rx-num-evt = <32>;
};
&mailbox5 {
status = "okay";
mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
status = "okay";
};
mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
status = "okay";
};
};
&mailbox6 {
status = "okay";
mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
status = "okay";
};
mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
status = "okay";
};
};
&pcie1_rc {
status = "okay";
};

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@ -1207,9 +1207,8 @@ target-module@36000 { /* 0x48036000, ap 9 4e.0 */
<SYSC_IDLE_SMART>,
<SYSC_IDLE_SMART_WKUP>;
/* Domains (P, C): l4per_pwrdm, l4per_clkdm */
clocks = <&l4per_clkctrl DRA7_L4PER_TIMER4_CLKCTRL 0>,
<&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
clocks = <&l4per_clkctrl DRA7_L4PER_TIMER4_CLKCTRL 0>;
clock-names = "fck";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x36000 0x1000>;
@ -3352,8 +3351,8 @@ target-module@20000 { /* 0x48820000, ap 5 08.0 */
<SYSC_IDLE_SMART>,
<SYSC_IDLE_SMART_WKUP>;
/* Domains (P, C): ipu_pwrdm, ipu_clkdm */
clocks = <&ipu_clkctrl DRA7_IPU_TIMER5_CLKCTRL 0>, <&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
clocks = <&ipu_clkctrl DRA7_IPU_TIMER5_CLKCTRL 0>;
clock-names = "fck";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x20000 0x1000>;
@ -3361,8 +3360,8 @@ target-module@20000 { /* 0x48820000, ap 5 08.0 */
timer5: timer@0 {
compatible = "ti,omap5430-timer";
reg = <0x0 0x80>;
clocks = <&ipu_clkctrl DRA7_IPU_TIMER5_CLKCTRL 24>;
clock-names = "fck";
clocks = <&ipu_clkctrl DRA7_IPU_TIMER5_CLKCTRL 24>, <&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
};
};
@ -3379,9 +3378,8 @@ target-module@22000 { /* 0x48822000, ap 7 24.0 */
<SYSC_IDLE_SMART>,
<SYSC_IDLE_SMART_WKUP>;
/* Domains (P, C): ipu_pwrdm, ipu_clkdm */
clocks = <&ipu_clkctrl DRA7_IPU_TIMER6_CLKCTRL 0>,
<&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
clocks = <&ipu_clkctrl DRA7_IPU_TIMER6_CLKCTRL 0>;
clock-names = "fck";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x22000 0x1000>;
@ -3389,8 +3387,8 @@ target-module@22000 { /* 0x48822000, ap 7 24.0 */
timer6: timer@0 {
compatible = "ti,omap5430-timer";
reg = <0x0 0x80>;
clocks = <&ipu_clkctrl DRA7_IPU_TIMER6_CLKCTRL 24>;
clock-names = "fck";
clocks = <&ipu_clkctrl DRA7_IPU_TIMER6_CLKCTRL 24>, <&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
};
};
@ -3498,8 +3496,8 @@ target-module@2a000 { /* 0x4882a000, ap 15 10.0 */
timer14: timer@0 {
compatible = "ti,omap5430-timer";
reg = <0x0 0x80>;
clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER14_CLKCTRL 24>;
clock-names = "fck";
clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER14_CLKCTRL 24>, <&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
interrupts = <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>;
ti,timer-pwm;
};
@ -3526,8 +3524,8 @@ target-module@2c000 { /* 0x4882c000, ap 17 02.0 */
timer15: timer@0 {
compatible = "ti,omap5430-timer";
reg = <0x0 0x80>;
clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER15_CLKCTRL 24>;
clock-names = "fck";
clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER15_CLKCTRL 24>, <&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>;
ti,timer-pwm;
};
@ -3554,8 +3552,8 @@ target-module@2e000 { /* 0x4882e000, ap 19 14.0 */
timer16: timer@0 {
compatible = "ti,omap5430-timer";
reg = <0x0 0x80>;
clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER16_CLKCTRL 24>;
clock-names = "fck";
clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER16_CLKCTRL 24>, <&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
interrupts = <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>;
ti,timer-pwm;
};

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@ -232,13 +232,6 @@ &usdhc2 {
status = "okay";
};
&wdog1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wdog>;
fsl,ext-reset-output;
status = "okay";
};
&iomuxc {
pinctrl-0 = <&pinctrl_reset_out &pinctrl_gpio>;
@ -409,10 +402,4 @@ MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170f9
MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170f9
>;
};
pinctrl_wdog: wdoggrp {
fsl,pins = <
MX6UL_PAD_GPIO1_IO09__WDOG1_WDOG_ANY 0x30b0
>;
};
};

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@ -57,6 +57,13 @@ &qspi {
status = "okay";
};
&wdog1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wdog>;
fsl,ext-reset-output;
status = "okay";
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_reset_out>;
@ -106,4 +113,10 @@ pinctrl_reset_out: rstoutgrp {
MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x1b0b0
>;
};
pinctrl_wdog: wdoggrp {
fsl,pins = <
MX6UL_PAD_GPIO1_IO09__WDOG1_WDOG_ANY 0x18b0
>;
};
};

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@ -13,8 +13,10 @@ cpcap: pmic@0 {
#interrupt-cells = <2>;
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <3000000>;
spi-max-frequency = <9600000>;
spi-cs-high;
spi-cpol;
spi-cpha;
cpcap_adc: adc {
compatible = "motorola,mapphone-cpcap-adc";

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@ -139,7 +139,7 @@ &gpmc {
ethernet@gpmc {
reg = <5 0 0xff>;
interrupt-parent = <&gpio2>;
interrupts = <12 IRQ_TYPE_EDGE_FALLING>; /* gpio_44 */
interrupts = <12 IRQ_TYPE_LEVEL_LOW>; /* gpio_44 */
phy-mode = "mii";

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@ -662,6 +662,6 @@ &timer1_target {
ti,no-idle;
timer@0 {
assigned-clocks = <&l4_wkup_clkctrl OMAP4_TIMER1_CLKCTRL 24>;
assigned-clock-parents = <&sys_clkin_ck>;
assigned-clock-parents = <&sys_32k_ck>;
};
};

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@ -100,79 +100,6 @@ led-8 {
};
};
mcc {
compatible = "arm,vexpress,config-bus";
arm,vexpress,config-bridge = <&v2m_sysreg>;
oscclk0 {
/* MCC static memory clock */
compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 0>;
freq-range = <25000000 60000000>;
#clock-cells = <0>;
clock-output-names = "v2m:oscclk0";
};
v2m_oscclk1: oscclk1 {
/* CLCD clock */
compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 1>;
freq-range = <23750000 65000000>;
#clock-cells = <0>;
clock-output-names = "v2m:oscclk1";
};
v2m_oscclk2: oscclk2 {
/* IO FPGA peripheral clock */
compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 2>;
freq-range = <24000000 24000000>;
#clock-cells = <0>;
clock-output-names = "v2m:oscclk2";
};
volt-vio {
/* Logic level voltage */
compatible = "arm,vexpress-volt";
arm,vexpress-sysreg,func = <2 0>;
regulator-name = "VIO";
regulator-always-on;
label = "VIO";
};
temp-mcc {
/* MCC internal operating temperature */
compatible = "arm,vexpress-temp";
arm,vexpress-sysreg,func = <4 0>;
label = "MCC";
};
reset {
compatible = "arm,vexpress-reset";
arm,vexpress-sysreg,func = <5 0>;
};
muxfpga {
compatible = "arm,vexpress-muxfpga";
arm,vexpress-sysreg,func = <7 0>;
};
shutdown {
compatible = "arm,vexpress-shutdown";
arm,vexpress-sysreg,func = <8 0>;
};
reboot {
compatible = "arm,vexpress-reboot";
arm,vexpress-sysreg,func = <9 0>;
};
dvimode {
compatible = "arm,vexpress-dvimode";
arm,vexpress-sysreg,func = <11 0>;
};
};
bus@8000000 {
motherboard-bus {
model = "V2M-P1";
@ -435,6 +362,79 @@ clcd_pads: endpoint {
};
};
};
mcc {
compatible = "arm,vexpress,config-bus";
arm,vexpress,config-bridge = <&v2m_sysreg>;
oscclk0 {
/* MCC static memory clock */
compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 0>;
freq-range = <25000000 60000000>;
#clock-cells = <0>;
clock-output-names = "v2m:oscclk0";
};
v2m_oscclk1: oscclk1 {
/* CLCD clock */
compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 1>;
freq-range = <23750000 65000000>;
#clock-cells = <0>;
clock-output-names = "v2m:oscclk1";
};
v2m_oscclk2: oscclk2 {
/* IO FPGA peripheral clock */
compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 2>;
freq-range = <24000000 24000000>;
#clock-cells = <0>;
clock-output-names = "v2m:oscclk2";
};
volt-vio {
/* Logic level voltage */
compatible = "arm,vexpress-volt";
arm,vexpress-sysreg,func = <2 0>;
regulator-name = "VIO";
regulator-always-on;
label = "VIO";
};
temp-mcc {
/* MCC internal operating temperature */
compatible = "arm,vexpress-temp";
arm,vexpress-sysreg,func = <4 0>;
label = "MCC";
};
reset {
compatible = "arm,vexpress-reset";
arm,vexpress-sysreg,func = <5 0>;
};
muxfpga {
compatible = "arm,vexpress-muxfpga";
arm,vexpress-sysreg,func = <7 0>;
};
shutdown {
compatible = "arm,vexpress-shutdown";
arm,vexpress-sysreg,func = <8 0>;
};
reboot {
compatible = "arm,vexpress-reboot";
arm,vexpress-sysreg,func = <9 0>;
};
dvimode {
compatible = "arm,vexpress-dvimode";
arm,vexpress-sysreg,func = <11 0>;
};
};
};
};
};

View File

@ -87,4 +87,11 @@ static inline unsigned long efi_get_max_initrd_addr(unsigned long dram_base,
return dram_base + SZ_512M;
}
struct efi_arm_entry_state {
u32 cpsr_before_ebs;
u32 sctlr_before_ebs;
u32 cpsr_after_ebs;
u32 sctlr_after_ebs;
};
#endif /* _ASM_ARM_EFI_H */

View File

@ -53,6 +53,7 @@ config ARCH_BCM_NSP
select ARM_ERRATA_754322
select ARM_ERRATA_775420
select ARM_ERRATA_764369 if SMP
select ARM_TIMER_SP804
select THERMAL
select THERMAL_OF
help

View File

@ -295,14 +295,14 @@ static int __init imx_suspend_alloc_ocram(
if (!ocram_pool) {
pr_warn("%s: ocram pool unavailable!\n", __func__);
ret = -ENODEV;
goto put_node;
goto put_device;
}
ocram_base = gen_pool_alloc(ocram_pool, size);
if (!ocram_base) {
pr_warn("%s: unable to alloc ocram!\n", __func__);
ret = -ENOMEM;
goto put_node;
goto put_device;
}
phys = gen_pool_virt_to_phys(ocram_pool, ocram_base);
@ -312,6 +312,8 @@ static int __init imx_suspend_alloc_ocram(
if (virt_out)
*virt_out = virt;
put_device:
put_device(&pdev->dev);
put_node:
of_node_put(node);

View File

@ -493,14 +493,14 @@ static int __init imx6q_suspend_init(const struct imx6_pm_socdata *socdata)
if (!ocram_pool) {
pr_warn("%s: ocram pool unavailable!\n", __func__);
ret = -ENODEV;
goto put_node;
goto put_device;
}
ocram_base = gen_pool_alloc(ocram_pool, MX6Q_SUSPEND_OCRAM_SIZE);
if (!ocram_base) {
pr_warn("%s: unable to alloc ocram!\n", __func__);
ret = -ENOMEM;
goto put_node;
goto put_device;
}
ocram_pbase = gen_pool_virt_to_phys(ocram_pool, ocram_base);
@ -523,7 +523,7 @@ static int __init imx6q_suspend_init(const struct imx6_pm_socdata *socdata)
ret = imx6_pm_get_base(&pm_info->mmdc_base, socdata->mmdc_compat);
if (ret) {
pr_warn("%s: failed to get mmdc base %d!\n", __func__, ret);
goto put_node;
goto put_device;
}
ret = imx6_pm_get_base(&pm_info->src_base, socdata->src_compat);
@ -570,7 +570,7 @@ static int __init imx6q_suspend_init(const struct imx6_pm_socdata *socdata)
&imx6_suspend,
MX6Q_SUSPEND_OCRAM_SIZE - sizeof(*pm_info));
goto put_node;
goto put_device;
pl310_cache_map_failed:
iounmap(pm_info->gpc_base.vbase);
@ -580,6 +580,8 @@ static int __init imx6q_suspend_init(const struct imx6_pm_socdata *socdata)
iounmap(pm_info->src_base.vbase);
src_map_failed:
iounmap(pm_info->mmdc_base.vbase);
put_device:
put_device(&pdev->dev);
put_node:
of_node_put(node);

View File

@ -3489,7 +3489,7 @@ static const struct omap_hwmod_reset dra7_reset_quirks[] = {
};
static const struct omap_hwmod_reset omap_reset_quirks[] = {
{ .match = "dss", .len = 3, .reset = omap_dss_reset, },
{ .match = "dss_core", .len = 8, .reset = omap_dss_reset, },
{ .match = "hdq1w", .len = 5, .reset = omap_hdq1w_reset, },
{ .match = "i2c", .len = 3, .reset = omap_i2c_reset, },
{ .match = "wd_timer", .len = 8, .reset = omap2_wd_timer_reset, },

View File

@ -20,14 +20,6 @@ static const char *const stih41x_dt_match[] __initconst = {
NULL
};
static void sti_l2_write_sec(unsigned long val, unsigned reg)
{
/*
* We can't write to secure registers as we are in non-secure
* mode, until we have some SMI service available.
*/
}
DT_MACHINE_START(STM, "STi SoC with Flattened Device Tree")
.dt_compat = stih41x_dt_match,
.l2c_aux_val = L2C_AUX_CTRL_SHARED_OVERRIDE |
@ -36,5 +28,4 @@ DT_MACHINE_START(STM, "STi SoC with Flattened Device Tree")
L2C_AUX_CTRL_WAY_SIZE(4),
.l2c_aux_mask = 0xc0000fff,
.smp = smp_ops(sti_smp_ops),
.l2c_write_sec = sti_l2_write_sec,
MACHINE_END

View File

@ -1518,9 +1518,9 @@ config ARM64_PTR_AUTH
default y
depends on !KVM || ARM64_VHE
depends on (CC_HAS_SIGN_RETURN_ADDRESS || CC_HAS_BRANCH_PROT_PAC_RET) && AS_HAS_PAC
# GCC 9.1 and later inserts a .note.gnu.property section note for PAC
# Modern compilers insert a .note.gnu.property section note for PAC
# which is only understood by binutils starting with version 2.33.1.
depends on !CC_IS_GCC || GCC_VERSION < 90100 || LD_VERSION >= 233010000
depends on LD_IS_LLD || LD_VERSION >= 233010000 || (CC_IS_GCC && GCC_VERSION < 90100)
depends on !CC_IS_CLANG || AS_HAS_CFI_NEGATE_RA_STATE
depends on (!FUNCTION_GRAPH_TRACER || DYNAMIC_FTRACE_WITH_REGS)
help

View File

@ -136,7 +136,7 @@ buck6_reg: BUCK6 {
ldo1_reg: LDO1 {
regulator-name = "LDO1";
regulator-min-microvolt = <3000000>;
regulator-min-microvolt = <1600000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
@ -144,7 +144,7 @@ ldo1_reg: LDO1 {
ldo2_reg: LDO2 {
regulator-name = "LDO2";
regulator-min-microvolt = <900000>;
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <900000>;
regulator-boot-on;
regulator-always-on;

View File

@ -208,7 +208,7 @@ buck6_reg: BUCK6 {
ldo1_reg: LDO1 {
regulator-name = "LDO1";
regulator-min-microvolt = <3000000>;
regulator-min-microvolt = <1600000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
@ -216,7 +216,7 @@ ldo1_reg: LDO1 {
ldo2_reg: LDO2 {
regulator-name = "LDO2";
regulator-min-microvolt = <900000>;
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <900000>;
regulator-boot-on;
regulator-always-on;

View File

@ -113,7 +113,7 @@ buck6_reg: BUCK6 {
ldo1_reg: LDO1 {
regulator-name = "LDO1";
regulator-min-microvolt = <3000000>;
regulator-min-microvolt = <1600000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
@ -121,7 +121,7 @@ ldo1_reg: LDO1 {
ldo2_reg: LDO2 {
regulator-name = "LDO2";
regulator-min-microvolt = <900000>;
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <900000>;
regulator-boot-on;
regulator-always-on;

View File

@ -12,7 +12,6 @@
* instead.
*/
#define BTI_C hint 34 ;
#define BTI_J hint 36 ;
/*
* When using in-kernel BTI we need to ensure that PCS-conformant assembly
@ -43,11 +42,6 @@
SYM_START(name, SYM_L_WEAK, SYM_A_NONE) \
BTI_C
#define SYM_INNER_LABEL(name, linkage) \
.type name SYM_T_NONE ASM_NL \
SYM_ENTRY(name, linkage, SYM_A_NONE) \
BTI_J
#endif
/*

View File

@ -19,6 +19,9 @@
typedef struct {
atomic64_t id;
#ifdef CONFIG_COMPAT
void *sigpage;
#endif
void *vdso;
unsigned long flags;
} mm_context_t;

View File

@ -29,9 +29,7 @@ $(obj)/%.stub.o: $(obj)/%.o FORCE
obj-$(CONFIG_COMPAT) += sys32.o signal32.o \
sys_compat.o
ifneq ($(CONFIG_COMPAT_VDSO), y)
obj-$(CONFIG_COMPAT) += sigreturn32.o
endif
obj-$(CONFIG_KUSER_HELPERS) += kuser32.o
obj-$(CONFIG_FUNCTION_TRACER) += ftrace.o entry-ftrace.o
obj-$(CONFIG_MODULES) += module.o

View File

@ -460,6 +460,8 @@ static const struct midr_range arm64_ssb_cpus[] = {
MIDR_ALL_VERSIONS(MIDR_CORTEX_A53),
MIDR_ALL_VERSIONS(MIDR_CORTEX_A55),
MIDR_ALL_VERSIONS(MIDR_BRAHMA_B53),
MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_3XX_SILVER),
MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_4XX_SILVER),
{},
};

View File

@ -1290,6 +1290,8 @@ static bool unmap_kernel_at_el0(const struct arm64_cpu_capabilities *entry,
MIDR_ALL_VERSIONS(MIDR_CORTEX_A73),
MIDR_ALL_VERSIONS(MIDR_HISI_TSV110),
MIDR_ALL_VERSIONS(MIDR_NVIDIA_CARMEL),
MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_3XX_SILVER),
MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_4XX_SILVER),
{ /* sentinel */ }
};
char const *str = "kpti command line option";

View File

@ -15,15 +15,34 @@ u64 perf_reg_value(struct pt_regs *regs, int idx)
return 0;
/*
* Compat (i.e. 32 bit) mode:
* - PC has been set in the pt_regs struct in kernel_entry,
* - Handle SP and LR here.
* Our handling of compat tasks (PERF_SAMPLE_REGS_ABI_32) is weird, but
* we're stuck with it for ABI compatability reasons.
*
* For a 32-bit consumer inspecting a 32-bit task, then it will look at
* the first 16 registers (see arch/arm/include/uapi/asm/perf_regs.h).
* These correspond directly to a prefix of the registers saved in our
* 'struct pt_regs', with the exception of the PC, so we copy that down
* (x15 corresponds to SP_hyp in the architecture).
*
* So far, so good.
*
* The oddity arises when a 64-bit consumer looks at a 32-bit task and
* asks for registers beyond PERF_REG_ARM_MAX. In this case, we return
* SP_usr, LR_usr and PC in the positions where the AArch64 SP, LR and
* PC registers would normally live. The initial idea was to allow a
* 64-bit unwinder to unwind a 32-bit task and, although it's not clear
* how well that works in practice, somebody might be relying on it.
*
* At the time we make a sample, we don't know whether the consumer is
* 32-bit or 64-bit, so we have to cater for both possibilities.
*/
if (compat_user_mode(regs)) {
if ((u32)idx == PERF_REG_ARM64_SP)
return regs->compat_sp;
if ((u32)idx == PERF_REG_ARM64_LR)
return regs->compat_lr;
if (idx == 15)
return regs->pc;
}
if ((u32)idx == PERF_REG_ARM64_SP)

View File

@ -120,15 +120,9 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p)
void *alloc_insn_page(void)
{
void *page;
page = vmalloc_exec(PAGE_SIZE);
if (page) {
set_memory_ro((unsigned long)page, 1);
set_vm_flush_reset_perms(page);
}
return page;
return __vmalloc_node_range(PAGE_SIZE, 1, VMALLOC_START, VMALLOC_END,
GFP_KERNEL, PAGE_KERNEL_ROX, VM_FLUSH_RESET_PERMS,
NUMA_NO_NODE, __func__);
}
/* arm kprobe: install breakpoint in text */

View File

@ -342,38 +342,13 @@ static void compat_setup_return(struct pt_regs *regs, struct k_sigaction *ka,
retcode = ptr_to_compat(ka->sa.sa_restorer);
} else {
/* Set up sigreturn pointer */
#ifdef CONFIG_COMPAT_VDSO
void *vdso_base = current->mm->context.vdso;
void *vdso_trampoline;
if (ka->sa.sa_flags & SA_SIGINFO) {
if (thumb) {
vdso_trampoline = VDSO_SYMBOL(vdso_base,
compat_rt_sigreturn_thumb);
} else {
vdso_trampoline = VDSO_SYMBOL(vdso_base,
compat_rt_sigreturn_arm);
}
} else {
if (thumb) {
vdso_trampoline = VDSO_SYMBOL(vdso_base,
compat_sigreturn_thumb);
} else {
vdso_trampoline = VDSO_SYMBOL(vdso_base,
compat_sigreturn_arm);
}
}
retcode = ptr_to_compat(vdso_trampoline) + thumb;
#else
unsigned int idx = thumb << 1;
if (ka->sa.sa_flags & SA_SIGINFO)
idx += 3;
retcode = (unsigned long)current->mm->context.vdso +
retcode = (unsigned long)current->mm->context.sigpage +
(idx << 2) + thumb;
#endif
}
regs->regs[0] = usig;

View File

@ -191,15 +191,12 @@ enum aarch32_map {
#ifdef CONFIG_COMPAT_VDSO
AA32_MAP_VVAR,
AA32_MAP_VDSO,
#else
AA32_MAP_SIGPAGE
#endif
AA32_MAP_SIGPAGE
};
static struct page *aarch32_vectors_page __ro_after_init;
#ifndef CONFIG_COMPAT_VDSO
static struct page *aarch32_sig_page __ro_after_init;
#endif
static struct vm_special_mapping aarch32_vdso_maps[] = {
[AA32_MAP_VECTORS] = {
@ -214,12 +211,11 @@ static struct vm_special_mapping aarch32_vdso_maps[] = {
.name = "[vdso]",
.mremap = aarch32_vdso_mremap,
},
#else
#endif /* CONFIG_COMPAT_VDSO */
[AA32_MAP_SIGPAGE] = {
.name = "[sigpage]", /* ABI */
.pages = &aarch32_sig_page,
},
#endif /* CONFIG_COMPAT_VDSO */
};
static int aarch32_alloc_kuser_vdso_page(void)
@ -242,27 +238,11 @@ static int aarch32_alloc_kuser_vdso_page(void)
return 0;
}
#ifdef CONFIG_COMPAT_VDSO
static int __aarch32_alloc_vdso_pages(void)
{
int ret;
vdso_info[VDSO_ABI_AA32].dm = &aarch32_vdso_maps[AA32_MAP_VVAR];
vdso_info[VDSO_ABI_AA32].cm = &aarch32_vdso_maps[AA32_MAP_VDSO];
ret = __vdso_init(VDSO_ABI_AA32);
if (ret)
return ret;
return aarch32_alloc_kuser_vdso_page();
}
#else
static int __aarch32_alloc_vdso_pages(void)
static int aarch32_alloc_sigpage(void)
{
extern char __aarch32_sigret_code_start[], __aarch32_sigret_code_end[];
int sigret_sz = __aarch32_sigret_code_end - __aarch32_sigret_code_start;
unsigned long sigpage;
int ret;
sigpage = get_zeroed_page(GFP_ATOMIC);
if (!sigpage)
@ -271,18 +251,34 @@ static int __aarch32_alloc_vdso_pages(void)
memcpy((void *)sigpage, __aarch32_sigret_code_start, sigret_sz);
aarch32_sig_page = virt_to_page(sigpage);
flush_dcache_page(aarch32_sig_page);
return 0;
}
ret = aarch32_alloc_kuser_vdso_page();
if (ret)
free_page(sigpage);
#ifdef CONFIG_COMPAT_VDSO
static int __aarch32_alloc_vdso_pages(void)
{
vdso_info[VDSO_ABI_AA32].dm = &aarch32_vdso_maps[AA32_MAP_VVAR];
vdso_info[VDSO_ABI_AA32].cm = &aarch32_vdso_maps[AA32_MAP_VDSO];
return ret;
return __vdso_init(VDSO_ABI_AA32);
}
#endif /* CONFIG_COMPAT_VDSO */
static int __init aarch32_alloc_vdso_pages(void)
{
return __aarch32_alloc_vdso_pages();
int ret;
#ifdef CONFIG_COMPAT_VDSO
ret = __aarch32_alloc_vdso_pages();
if (ret)
return ret;
#endif
ret = aarch32_alloc_sigpage();
if (ret)
return ret;
return aarch32_alloc_kuser_vdso_page();
}
arch_initcall(aarch32_alloc_vdso_pages);
@ -305,7 +301,6 @@ static int aarch32_kuser_helpers_setup(struct mm_struct *mm)
return PTR_ERR_OR_ZERO(ret);
}
#ifndef CONFIG_COMPAT_VDSO
static int aarch32_sigreturn_setup(struct mm_struct *mm)
{
unsigned long addr;
@ -328,12 +323,11 @@ static int aarch32_sigreturn_setup(struct mm_struct *mm)
if (IS_ERR(ret))
goto out;
mm->context.vdso = (void *)addr;
mm->context.sigpage = (void *)addr;
out:
return PTR_ERR_OR_ZERO(ret);
}
#endif /* !CONFIG_COMPAT_VDSO */
int aarch32_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
{
@ -352,10 +346,11 @@ int aarch32_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
mm,
bprm,
uses_interp);
#else
ret = aarch32_sigreturn_setup(mm);
if (ret)
goto out;
#endif /* CONFIG_COMPAT_VDSO */
ret = aarch32_sigreturn_setup(mm);
out:
mmap_write_unlock(mm);
return ret;

View File

@ -23,13 +23,14 @@ btildflags-$(CONFIG_ARM64_BTI_KERNEL) += -z force-bti
# potential future proofing if we end up with internal calls to the exported
# routines, as x86 does (see 6f121e548f83 ("x86, vdso: Reimplement vdso.so
# preparation in build-time C")).
ldflags-y := -shared -nostdlib -soname=linux-vdso.so.1 --hash-style=sysv \
-Bsymbolic --eh-frame-hdr --build-id -n $(btildflags-y) -T
ldflags-y := -shared -nostdlib -soname=linux-vdso.so.1 --hash-style=sysv \
-Bsymbolic $(call ld-option, --no-eh-frame-hdr) --build-id -n \
$(btildflags-y) -T
ccflags-y := -fno-common -fno-builtin -fno-stack-protector -ffixed-x18
ccflags-y += -DDISABLE_BRANCH_PROFILING
CFLAGS_REMOVE_vgettimeofday.o = $(CC_FLAGS_FTRACE) -Os $(CC_FLAGS_SCS)
CFLAGS_REMOVE_vgettimeofday.o = $(CC_FLAGS_FTRACE) -Os $(CC_FLAGS_SCS) $(GCC_PLUGINS_CFLAGS)
KBUILD_CFLAGS += $(DISABLE_LTO)
KASAN_SANITIZE := n
UBSAN_SANITIZE := n

View File

@ -18,29 +18,40 @@
.text
/*
* NOTE!!! You may notice that all of the .cfi directives in this file have
* been commented out. This is because they have been shown to trigger segfaults
* in libgcc when unwinding out of a SIGCANCEL handler to invoke pthread
* cleanup handlers during the thread cancellation dance. By omitting the
* directives, we trigger an arm64-specific fallback path in the unwinder which
* recognises the signal frame and restores many of the registers directly from
* the sigcontext. Re-enabling the cfi directives here therefore needs to be
* much more comprehensive to reduce the risk of further regressions.
*/
/* Ensure that the mysterious NOP can be associated with a function. */
.cfi_startproc
// .cfi_startproc
/*
* .cfi_signal_frame causes the corresponding Frame Description Entry in the
* .eh_frame section to be annotated as a signal frame. This allows DWARF
* unwinders (e.g. libstdc++) to implement _Unwind_GetIPInfo(), which permits
* unwinding out of the signal trampoline without the need for the mysterious
* NOP.
* .cfi_signal_frame causes the corresponding Frame Description Entry (FDE) in
* the .eh_frame section to be annotated as a signal frame. This allows DWARF
* unwinders (e.g. libstdc++) to implement _Unwind_GetIPInfo() and identify
* the next frame using the unmodified return address instead of subtracting 1,
* which may yield the wrong FDE.
*/
.cfi_signal_frame
// .cfi_signal_frame
/*
* Tell the unwinder where to locate the frame record linking back to the
* interrupted context. We don't provide unwind info for registers other
* than the frame pointer and the link register here; in practice, this
* is sufficient for unwinding in C/C++ based runtimes and the values in
* the sigcontext may have been modified by this point anyway. Debuggers
* interrupted context. We don't provide unwind info for registers other than
* the frame pointer and the link register here; in practice, this is likely to
* be insufficient for unwinding in C/C++ based runtimes, especially without a
* means to restore the stack pointer. Thankfully, unwinders and debuggers
* already have baked-in strategies for attempting to unwind out of signals.
*/
.cfi_def_cfa x29, 0
.cfi_offset x29, 0 * 8
.cfi_offset x30, 1 * 8
// .cfi_def_cfa x29, 0
// .cfi_offset x29, 0 * 8
// .cfi_offset x30, 1 * 8
/*
* This mysterious NOP is required for some unwinders (e.g. libc++) that
@ -51,16 +62,19 @@
nop // Mysterious NOP
/*
* GDB relies on being able to identify the sigreturn instruction sequence to
* unwind from signal handlers. We cannot, therefore, use SYM_FUNC_START()
* here, as it will emit a BTI C instruction and break the unwinder. Thankfully,
* this function is only ever called from a RET and so omitting the landing pad
* is perfectly fine.
* GDB, libgcc and libunwind rely on being able to identify the sigreturn
* instruction sequence to unwind from signal handlers. We cannot, therefore,
* use SYM_FUNC_START() here, as it will emit a BTI C instruction and break the
* unwinder. Thankfully, this function is only ever called from a RET and so
* omitting the landing pad is perfectly fine.
*/
SYM_CODE_START(__kernel_rt_sigreturn)
// PLEASE DO NOT MODIFY
mov x8, #__NR_rt_sigreturn
// PLEASE DO NOT MODIFY
svc #0
.cfi_endproc
// PLEASE DO NOT MODIFY
// .cfi_endproc
SYM_CODE_END(__kernel_rt_sigreturn)
emit_aarch64_feature_1_and

View File

@ -140,7 +140,6 @@ hostprogs := $(munge)
c-obj-vdso := note.o
c-obj-vdso-gettimeofday := vgettimeofday.o
asm-obj-vdso := sigreturn.o
ifneq ($(c-gettimeofday-y),)
VDSO_CFLAGS_gettimeofday_o += -include $(c-gettimeofday-y)

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