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ARM: dts: k2g-evm: Add DCAN dt nodes
The 66AK2G evm has support for dcan. Add nodes and pinmuxes for dcan0 and dcan1. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
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@ -114,6 +114,20 @@ K2G_CORE_IOPAD(0x11ec) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* uart2
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K2G_CORE_IOPAD(0x11f0) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE0) /* uart2_txd.uart2_txd */
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>;
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};
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dcan0_pins: pinmux_dcan0_pins {
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pinctrl-single,pins = <
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K2G_CORE_IOPAD(0x11fc) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dcan0tx.dcan0tx */
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K2G_CORE_IOPAD(0x1200) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE0) /* dcan0rx.dcan0rx */
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>;
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};
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dcan1_pins: pinmux_dcan1_pins {
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pinctrl-single,pins = <
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K2G_CORE_IOPAD(0x1224) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE1) /* qspicsn2.dcan1tx */
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K2G_CORE_IOPAD(0x1228) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE1) /* qspicsn3.dcan1rx */
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>;
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};
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};
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&uart0 {
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@ -268,3 +282,15 @@ &uart2 {
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pinctrl-0 = <&uart2_pins>;
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status = "okay";
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};
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&dcan0 {
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pinctrl-names = "default";
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pinctrl-0 = <&dcan0_pins>;
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status = "okay";
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};
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&dcan1 {
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pinctrl-names = "default";
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pinctrl-0 = <&dcan1_pins>;
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status = "okay";
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};
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