mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-20 11:28:15 +07:00
Linux 5.6-rc5
-----BEGIN PGP SIGNATURE----- iQFSBAABCAA8FiEEq68RxlopcLEwq+PEeb4+QwBBGIYFAl5lkYceHHRvcnZhbGRz QGxpbnV4LWZvdW5kYXRpb24ub3JnAAoJEHm+PkMAQRiGpHQH/RJrzcaZHo4lw88m Jf7vBZ9DYUlRgqE0pxTHWmodNObKRqpwOUGflUcWbb/7GD2LQUfeqhSECVQyTID9 N9y7FcPvx321Qhc3EkZ24DBYk0+DQ0K2FVUrSa/PxO0n7czxxXWaLRDmlSULEd3R D4pVs3zEWOBXJHUAvUQ5R+lKfkeWKNeeepeh+rezuhpdWFBRNz4Jjr5QUJ8od5xI sIwobYmESJqTRVBHqW8g2T2/yIsFJ78GCXs8DZLe1wxh40UbxdYDTA0NDDTHKzK6 lxzBgcmKzuge+1OVmzxLouNWMnPcjFlVgXWVerpSy3/SIFFkzzUWeMbqm6hKuhOn wAlcIgI= =VQUc -----END PGP SIGNATURE----- Merge tag 'v5.6-rc5' into rdma.git for-next Required due to dependencies in following patches. Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
This commit is contained in:
Jason Gunthorpe
commit
6f00a54c2c
4
.gitignore
vendored
4
.gitignore
vendored
@ -100,10 +100,6 @@ modules.order
|
||||
/include/ksym/
|
||||
/arch/*/include/generated/
|
||||
|
||||
# Generated lkdtm tests
|
||||
/tools/testing/selftests/lkdtm/*.sh
|
||||
!/tools/testing/selftests/lkdtm/run.sh
|
||||
|
||||
# stgit generated dirs
|
||||
patches-*
|
||||
|
||||
|
||||
@ -18,7 +18,7 @@ may look as follows::
|
||||
|
||||
$ ls -l /sys/bus/acpi/devices/INT3404:00/
|
||||
total 0
|
||||
...
|
||||
...
|
||||
-r--r--r-- 1 root root 4096 Dec 13 20:38 state0
|
||||
-r--r--r-- 1 root root 4096 Dec 13 20:38 state1
|
||||
-r--r--r-- 1 root root 4096 Dec 13 20:38 state10
|
||||
@ -38,7 +38,7 @@ where each of the "state*" files represents one performance state of the fan
|
||||
and contains a colon-separated list of 5 integer numbers (fields) with the
|
||||
following interpretation::
|
||||
|
||||
control_percent:trip_point_index:speed_rpm:noise_level_mdb:power_mw
|
||||
control_percent:trip_point_index:speed_rpm:noise_level_mdb:power_mw
|
||||
|
||||
* ``control_percent``: The percent value to be used to set the fan speed to a
|
||||
specific level using the _FSL object (0-100).
|
||||
|
||||
@ -102,7 +102,7 @@ Required sub-node properties:
|
||||
[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
|
||||
[2] Documentation/devicetree/bindings/power/power-domain.yaml
|
||||
[3] Documentation/devicetree/bindings/thermal/thermal.txt
|
||||
[4] Documentation/devicetree/bindings/sram/sram.txt
|
||||
[4] Documentation/devicetree/bindings/sram/sram.yaml
|
||||
[5] Documentation/devicetree/bindings/reset/reset.txt
|
||||
|
||||
Example:
|
||||
|
||||
@ -109,7 +109,7 @@ Required properties:
|
||||
[0] http://infocenter.arm.com/help/topic/com.arm.doc.dui0922b/index.html
|
||||
[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
|
||||
[2] Documentation/devicetree/bindings/thermal/thermal.txt
|
||||
[3] Documentation/devicetree/bindings/sram/sram.txt
|
||||
[3] Documentation/devicetree/bindings/sram/sram.yaml
|
||||
[4] Documentation/devicetree/bindings/power/power-domain.yaml
|
||||
|
||||
Example:
|
||||
|
||||
@ -62,7 +62,7 @@ Timer node:
|
||||
|
||||
Syscon reboot node:
|
||||
|
||||
See Documentation/devicetree/bindings/power/reset/syscon-reboot.txt for the
|
||||
See Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml for the
|
||||
detailed list of properties, the two values defined below are specific to the
|
||||
BCM6328-style timer:
|
||||
|
||||
|
||||
@ -216,7 +216,7 @@ properties:
|
||||
$ref: '/schemas/types.yaml#/definitions/phandle-array'
|
||||
description: |
|
||||
List of phandles to idle state nodes supported
|
||||
by this cpu (see ./idle-states.txt).
|
||||
by this cpu (see ./idle-states.yaml).
|
||||
|
||||
capacity-dmips-mhz:
|
||||
$ref: '/schemas/types.yaml#/definitions/uint32'
|
||||
|
||||
@ -160,7 +160,7 @@ properties:
|
||||
items:
|
||||
- enum:
|
||||
- armadeus,imx6dl-apf6 # APF6 (Solo) SoM
|
||||
- armadeus,imx6dl-apf6dldev # APF6 (Solo) SoM on APF6Dev board
|
||||
- armadeus,imx6dl-apf6dev # APF6 (Solo) SoM on APF6Dev board
|
||||
- eckelmann,imx6dl-ci4x10
|
||||
- emtrion,emcon-mx6 # emCON-MX6S or emCON-MX6DL SoM
|
||||
- emtrion,emcon-mx6-avari # emCON-MX6S or emCON-MX6DL SoM on Avari Base
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
* Hisilicon Hi3519 System Controller Block
|
||||
|
||||
This bindings use the following binding:
|
||||
Documentation/devicetree/bindings/mfd/syscon.txt
|
||||
Documentation/devicetree/bindings/mfd/syscon.yaml
|
||||
|
||||
Required properties:
|
||||
- compatible: "hisilicon,hi3519-sysctrl".
|
||||
|
||||
@ -81,4 +81,4 @@ Example:
|
||||
};
|
||||
};
|
||||
|
||||
[1]. Documentation/devicetree/bindings/arm/idle-states.txt
|
||||
[1]. Documentation/devicetree/bindings/arm/idle-states.yaml
|
||||
|
||||
@ -17,7 +17,7 @@ am335x and am437x only:
|
||||
- pm-sram: Phandles to ocmcram nodes to be used for power management.
|
||||
First should be type 'protect-exec' for the driver to use to copy
|
||||
and run PM functions, second should be regular pool to be used for
|
||||
data region for code. See Documentation/devicetree/bindings/sram/sram.txt
|
||||
data region for code. See Documentation/devicetree/bindings/sram/sram.yaml
|
||||
for more details.
|
||||
|
||||
Examples:
|
||||
|
||||
@ -100,13 +100,14 @@ properties:
|
||||
bindings in [1]) must specify this property.
|
||||
|
||||
[1] Kernel documentation - ARM idle states bindings
|
||||
Documentation/devicetree/bindings/arm/idle-states.txt
|
||||
|
||||
"#power-domain-cells":
|
||||
description:
|
||||
The number of cells in a PM domain specifier as per binding in [3].
|
||||
Must be 0 as to represent a single PM domain.
|
||||
Documentation/devicetree/bindings/arm/idle-states.yaml
|
||||
|
||||
patternProperties:
|
||||
"^power-domain-":
|
||||
allOf:
|
||||
- $ref: "../power/power-domain.yaml#"
|
||||
type: object
|
||||
description: |
|
||||
ARM systems can have multiple cores, sometimes in an hierarchical
|
||||
arrangement. This often, but not always, maps directly to the processor
|
||||
power topology of the system. Individual nodes in a topology have their
|
||||
@ -122,14 +123,8 @@ properties:
|
||||
helps to implement support for OSI mode and OS implementations may choose
|
||||
to mandate it.
|
||||
|
||||
[3] Documentation/devicetree/bindings/power/power_domain.txt
|
||||
[4] Documentation/devicetree/bindings/power/domain-idle-state.txt
|
||||
|
||||
power-domains:
|
||||
$ref: '/schemas/types.yaml#/definitions/phandle-array'
|
||||
description:
|
||||
List of phandles and PM domain specifiers, as defined by bindings of the
|
||||
PM domain provider.
|
||||
[3] Documentation/devicetree/bindings/power/power-domain.yaml
|
||||
[4] Documentation/devicetree/bindings/power/domain-idle-state.yaml
|
||||
|
||||
required:
|
||||
- compatible
|
||||
@ -199,7 +194,7 @@ examples:
|
||||
|
||||
CPU0: cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a53", "arm,armv8";
|
||||
compatible = "arm,cortex-a53";
|
||||
reg = <0x0>;
|
||||
enable-method = "psci";
|
||||
power-domains = <&CPU_PD0>;
|
||||
@ -208,7 +203,7 @@ examples:
|
||||
|
||||
CPU1: cpu@1 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57", "arm,armv8";
|
||||
compatible = "arm,cortex-a53";
|
||||
reg = <0x100>;
|
||||
enable-method = "psci";
|
||||
power-domains = <&CPU_PD1>;
|
||||
@ -224,6 +219,9 @@ examples:
|
||||
exit-latency-us = <10>;
|
||||
min-residency-us = <100>;
|
||||
};
|
||||
};
|
||||
|
||||
domain-idle-states {
|
||||
|
||||
CLUSTER_RET: cluster-retention {
|
||||
compatible = "domain-idle-state";
|
||||
@ -247,19 +245,19 @@ examples:
|
||||
compatible = "arm,psci-1.0";
|
||||
method = "smc";
|
||||
|
||||
CPU_PD0: cpu-pd0 {
|
||||
CPU_PD0: power-domain-cpu0 {
|
||||
#power-domain-cells = <0>;
|
||||
domain-idle-states = <&CPU_PWRDN>;
|
||||
power-domains = <&CLUSTER_PD>;
|
||||
};
|
||||
|
||||
CPU_PD1: cpu-pd1 {
|
||||
CPU_PD1: power-domain-cpu1 {
|
||||
#power-domain-cells = <0>;
|
||||
domain-idle-states = <&CPU_PWRDN>;
|
||||
power-domains = <&CLUSTER_PD>;
|
||||
};
|
||||
|
||||
CLUSTER_PD: cluster-pd {
|
||||
CLUSTER_PD: power-domain-cluster {
|
||||
#power-domain-cells = <0>;
|
||||
domain-idle-states = <&CLUSTER_RET>, <&CLUSTER_PWRDN>;
|
||||
};
|
||||
|
||||
@ -52,7 +52,7 @@ required:
|
||||
|
||||
examples:
|
||||
- |
|
||||
mlahb: ahb {
|
||||
mlahb: ahb@38000000 {
|
||||
compatible = "st,mlahb", "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
@ -70,7 +70,6 @@ examples:
|
||||
#size-cells = <0>;
|
||||
|
||||
pmic@3e3 {
|
||||
compatible = "...";
|
||||
reg = <0x3e3>;
|
||||
|
||||
/* ... */
|
||||
|
||||
@ -40,7 +40,7 @@ additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
osc24M: clk@01c20050 {
|
||||
osc24M: clk@1c20050 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "allwinner,sun4i-a10-osc-clk";
|
||||
reg = <0x01c20050 0x4>;
|
||||
|
||||
@ -41,7 +41,7 @@ additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
clk@0600005c {
|
||||
clk@600005c {
|
||||
#clock-cells = <0>;
|
||||
compatible = "allwinner,sun9i-a80-gt-clk";
|
||||
reg = <0x0600005c 0x4>;
|
||||
|
||||
@ -42,7 +42,7 @@ properties:
|
||||
be part of GCC and hence the TSENS properties can also be part
|
||||
of the GCC/clock-controller node.
|
||||
For more details on the TSENS properties please refer
|
||||
Documentation/devicetree/bindings/thermal/qcom-tsens.txt
|
||||
Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
|
||||
|
||||
nvmem-cell-names:
|
||||
minItems: 1
|
||||
|
||||
@ -49,11 +49,7 @@ examples:
|
||||
resets = <&tcon_ch0_clk 0>;
|
||||
|
||||
port {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
tve0_in_tcon0: endpoint@0 {
|
||||
reg = <0>;
|
||||
tve0_in_tcon0: endpoint {
|
||||
remote-endpoint = <&tcon0_out_tve0>;
|
||||
};
|
||||
};
|
||||
|
||||
@ -79,21 +79,15 @@ examples:
|
||||
#size-cells = <0>;
|
||||
|
||||
anx6345_in: port@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
anx6345_in_tcon0: endpoint@0 {
|
||||
reg = <0>;
|
||||
anx6345_in_tcon0: endpoint {
|
||||
remote-endpoint = <&tcon0_out_anx6345>;
|
||||
};
|
||||
};
|
||||
|
||||
anx6345_out: port@1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <1>;
|
||||
anx6345_out_panel: endpoint@0 {
|
||||
reg = <0>;
|
||||
anx6345_out_panel: endpoint {
|
||||
remote-endpoint = <&panel_in_edp>;
|
||||
};
|
||||
};
|
||||
|
||||
@ -37,6 +37,8 @@ examples:
|
||||
dsi@ff450000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0xff450000 0x1000>;
|
||||
|
||||
panel@0 {
|
||||
compatible = "leadtek,ltk500hd1829";
|
||||
reg = <0>;
|
||||
|
||||
@ -37,6 +37,8 @@ examples:
|
||||
dsi@ff450000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0xff450000 0x1000>;
|
||||
|
||||
panel@0 {
|
||||
compatible = "xinpeng,xpp055c272";
|
||||
reg = <0>;
|
||||
|
||||
@ -174,10 +174,6 @@ examples:
|
||||
};
|
||||
};
|
||||
|
||||
soc@1c00000 {
|
||||
lcdc0: lcdc@1c0c000 {
|
||||
compatible = "allwinner,sun4i-a10-lcdc";
|
||||
};
|
||||
};
|
||||
lcdc0: lcdc { };
|
||||
|
||||
...
|
||||
|
||||
@ -37,7 +37,7 @@ Optional nodes:
|
||||
supports a single port with a single endpoint.
|
||||
|
||||
- See also Documentation/devicetree/bindings/display/tilcdc/panel.txt and
|
||||
Documentation/devicetree/bindings/display/tilcdc/tfp410.txt for connecting
|
||||
Documentation/devicetree/bindings/display/bridge/ti,tfp410.txt for connecting
|
||||
tfp410 DVI encoder or lcd panel to lcdc
|
||||
|
||||
[1] There is an errata about AM335x color wiring. For 16-bit color mode
|
||||
|
||||
@ -143,7 +143,7 @@ examples:
|
||||
#size-cells = <2>;
|
||||
dma-coherent;
|
||||
dma-ranges;
|
||||
ranges;
|
||||
ranges = <0x0 0x30800000 0x0 0x30800000 0x0 0x05000000>;
|
||||
|
||||
ti,sci-dev-id = <118>;
|
||||
|
||||
@ -169,16 +169,4 @@ examples:
|
||||
ti,sci-rm-range-rflow = <0x6>; /* GP RFLOW */
|
||||
};
|
||||
};
|
||||
|
||||
mcasp0: mcasp@02B00000 {
|
||||
dmas = <&main_udmap 0xc400>, <&main_udmap 0x4400>;
|
||||
dma-names = "tx", "rx";
|
||||
};
|
||||
|
||||
crypto: crypto@4E00000 {
|
||||
compatible = "ti,sa2ul-crypto";
|
||||
|
||||
dmas = <&main_udmap 0xc000>, <&main_udmap 0x4000>, <&main_udmap 0x4001>;
|
||||
dma-names = "tx", "rx1", "rx2";
|
||||
};
|
||||
};
|
||||
|
||||
@ -84,31 +84,31 @@ examples:
|
||||
gpu_opp_table: opp_table0 {
|
||||
compatible = "operating-points-v2";
|
||||
|
||||
opp@533000000 {
|
||||
opp-533000000 {
|
||||
opp-hz = /bits/ 64 <533000000>;
|
||||
opp-microvolt = <1250000>;
|
||||
};
|
||||
opp@450000000 {
|
||||
opp-450000000 {
|
||||
opp-hz = /bits/ 64 <450000000>;
|
||||
opp-microvolt = <1150000>;
|
||||
};
|
||||
opp@400000000 {
|
||||
opp-400000000 {
|
||||
opp-hz = /bits/ 64 <400000000>;
|
||||
opp-microvolt = <1125000>;
|
||||
};
|
||||
opp@350000000 {
|
||||
opp-350000000 {
|
||||
opp-hz = /bits/ 64 <350000000>;
|
||||
opp-microvolt = <1075000>;
|
||||
};
|
||||
opp@266000000 {
|
||||
opp-266000000 {
|
||||
opp-hz = /bits/ 64 <266000000>;
|
||||
opp-microvolt = <1025000>;
|
||||
};
|
||||
opp@160000000 {
|
||||
opp-160000000 {
|
||||
opp-hz = /bits/ 64 <160000000>;
|
||||
opp-microvolt = <925000>;
|
||||
};
|
||||
opp@100000000 {
|
||||
opp-100000000 {
|
||||
opp-hz = /bits/ 64 <100000000>;
|
||||
opp-microvolt = <912500>;
|
||||
};
|
||||
|
||||
@ -138,31 +138,31 @@ examples:
|
||||
gpu_opp_table: opp_table0 {
|
||||
compatible = "operating-points-v2";
|
||||
|
||||
opp@533000000 {
|
||||
opp-533000000 {
|
||||
opp-hz = /bits/ 64 <533000000>;
|
||||
opp-microvolt = <1250000>;
|
||||
};
|
||||
opp@450000000 {
|
||||
opp-450000000 {
|
||||
opp-hz = /bits/ 64 <450000000>;
|
||||
opp-microvolt = <1150000>;
|
||||
};
|
||||
opp@400000000 {
|
||||
opp-400000000 {
|
||||
opp-hz = /bits/ 64 <400000000>;
|
||||
opp-microvolt = <1125000>;
|
||||
};
|
||||
opp@350000000 {
|
||||
opp-350000000 {
|
||||
opp-hz = /bits/ 64 <350000000>;
|
||||
opp-microvolt = <1075000>;
|
||||
};
|
||||
opp@266000000 {
|
||||
opp-266000000 {
|
||||
opp-hz = /bits/ 64 <266000000>;
|
||||
opp-microvolt = <1025000>;
|
||||
};
|
||||
opp@160000000 {
|
||||
opp-160000000 {
|
||||
opp-hz = /bits/ 64 <160000000>;
|
||||
opp-microvolt = <925000>;
|
||||
};
|
||||
opp@100000000 {
|
||||
opp-100000000 {
|
||||
opp-hz = /bits/ 64 <100000000>;
|
||||
opp-microvolt = <912500>;
|
||||
};
|
||||
|
||||
@ -123,7 +123,7 @@ examples:
|
||||
samsung,syscon-phandle = <&pmu_system_controller>;
|
||||
|
||||
/* NTC thermistor is a hwmon device */
|
||||
ncp15wb473@0 {
|
||||
ncp15wb473 {
|
||||
compatible = "murata,ncp15wb473";
|
||||
pullup-uv = <1800000>;
|
||||
pullup-ohm = <47000>;
|
||||
|
||||
@ -62,7 +62,7 @@ required:
|
||||
|
||||
examples:
|
||||
- |
|
||||
i2c@00000000 {
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
gt928@5d {
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
Texas Instruments TWL family (twl4030) pwrbutton module
|
||||
|
||||
This module is part of the TWL4030. For more details about the whole
|
||||
chip see Documentation/devicetree/bindings/mfd/twl-familly.txt.
|
||||
chip see Documentation/devicetree/bindings/mfd/twl-family.txt.
|
||||
|
||||
This module provides a simple power button event via an Interrupt.
|
||||
|
||||
|
||||
@ -85,7 +85,7 @@ properties:
|
||||
# LED will act as a back-light, controlled by the framebuffer system
|
||||
- backlight
|
||||
# LED will turn on (but for leds-gpio see "default-state" property in
|
||||
# Documentation/devicetree/bindings/leds/leds-gpio.txt)
|
||||
# Documentation/devicetree/bindings/leds/leds-gpio.yaml)
|
||||
- default-on
|
||||
# LED "double" flashes at a load average based rate
|
||||
- heartbeat
|
||||
|
||||
@ -5,7 +5,7 @@ where single bits in a certain register can turn on/off a
|
||||
single LED. The register bit LEDs appear as children to the
|
||||
syscon device, with the proper compatible string. For the
|
||||
syscon bindings see:
|
||||
Documentation/devicetree/bindings/mfd/syscon.txt
|
||||
Documentation/devicetree/bindings/mfd/syscon.yaml
|
||||
|
||||
Each LED is represented as a sub-node of the syscon device. Each
|
||||
node's name represents the name of the corresponding LED.
|
||||
|
||||
@ -177,7 +177,7 @@ examples:
|
||||
};
|
||||
};
|
||||
|
||||
i2c5: i2c@4807c000 {
|
||||
i2c {
|
||||
clock-frequency = <400000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
@ -32,7 +32,7 @@ Required only for "ti,emif-am3352" and "ti,emif-am4372":
|
||||
- sram : Phandles for generic sram driver nodes,
|
||||
first should be type 'protect-exec' for the driver to use to copy
|
||||
and run PM functions, second should be regular pool to be used for
|
||||
data region for code. See Documentation/devicetree/bindings/sram/sram.txt
|
||||
data region for code. See Documentation/devicetree/bindings/sram/sram.yaml
|
||||
for more details.
|
||||
|
||||
Optional properties:
|
||||
|
||||
@ -97,14 +97,14 @@ examples:
|
||||
regulators {
|
||||
compatible = "maxim,max77650-regulator";
|
||||
|
||||
max77650_ldo: regulator@0 {
|
||||
max77650_ldo: regulator-ldo {
|
||||
regulator-compatible = "ldo";
|
||||
regulator-name = "max77650-ldo";
|
||||
regulator-min-microvolt = <1350000>;
|
||||
regulator-max-microvolt = <2937500>;
|
||||
};
|
||||
|
||||
max77650_sbb0: regulator@1 {
|
||||
max77650_sbb0: regulator-sbb0 {
|
||||
regulator-compatible = "sbb0";
|
||||
regulator-name = "max77650-sbb0";
|
||||
regulator-min-microvolt = <800000>;
|
||||
|
||||
@ -26,8 +26,8 @@ Required properties:
|
||||
ldo6, ldo7, ldo8
|
||||
|
||||
- xxx-supply: Input voltage supply regulator.
|
||||
These entries are require if regulators are enabled for a device. Missing of these
|
||||
properties can cause the regulator registration fails.
|
||||
These entries are required if regulators are enabled for a device. Missing these
|
||||
properties can cause the regulator registration to fail.
|
||||
If some of input supply is powered through battery or always-on supply then
|
||||
also it is require to have these parameters with proper node handle of always
|
||||
on power supply.
|
||||
|
||||
@ -20,7 +20,7 @@ RAVE SP consists of the following sub-devices:
|
||||
Device Description
|
||||
------ -----------
|
||||
rave-sp-wdt : Watchdog
|
||||
rave-sp-nvmem : Interface to onborad EEPROM
|
||||
rave-sp-nvmem : Interface to onboard EEPROM
|
||||
rave-sp-backlight : Display backlight
|
||||
rave-sp-hwmon : Interface to onboard hardware sensors
|
||||
rave-sp-leds : Interface to onboard LEDs
|
||||
|
||||
@ -26,7 +26,7 @@ For generic IOMMU bindings, see
|
||||
Documentation/devicetree/bindings/iommu/iommu.txt.
|
||||
|
||||
For arm-smmu binding, see:
|
||||
Documentation/devicetree/bindings/iommu/arm,smmu.txt.
|
||||
Documentation/devicetree/bindings/iommu/arm,smmu.yaml.
|
||||
|
||||
Required properties:
|
||||
|
||||
|
||||
@ -370,6 +370,7 @@ examples:
|
||||
mmc3: mmc@1c12000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x1c12000 0x200>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc3_pins_a>;
|
||||
vmmc-supply = <®_vmmc3>;
|
||||
|
||||
@ -27,7 +27,7 @@ Required properties of NAND chips:
|
||||
- reg: shall contain the native Chip Select ids from 0 to max supported by
|
||||
the cadence nand flash controller
|
||||
|
||||
See Documentation/devicetree/bindings/mtd/nand.txt for more details on
|
||||
See Documentation/devicetree/bindings/mtd/nand-controller.yaml for more details on
|
||||
generic bindings.
|
||||
|
||||
Example:
|
||||
|
||||
@ -45,7 +45,7 @@ Optional properties:
|
||||
switch queue
|
||||
|
||||
- resets: a single phandle and reset identifier pair. See
|
||||
Documentation/devicetree/binding/reset/reset.txt for details.
|
||||
Documentation/devicetree/bindings/reset/reset.txt for details.
|
||||
|
||||
- reset-names: If the "reset" property is specified, this property should have
|
||||
the value "switch" to denote the switch reset line.
|
||||
|
||||
@ -76,6 +76,8 @@ examples:
|
||||
qfprom: eeprom@700000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x00700000 0x100000>;
|
||||
|
||||
wp-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
/* ... */
|
||||
|
||||
@ -86,7 +86,7 @@ examples:
|
||||
#include <dt-bindings/clock/sun4i-a10-ccu.h>
|
||||
#include <dt-bindings/reset/sun4i-a10-ccu.h>
|
||||
|
||||
usbphy: phy@01c13400 {
|
||||
usbphy: phy@1c13400 {
|
||||
#phy-cells = <1>;
|
||||
compatible = "allwinner,sun4i-a10-usb-phy";
|
||||
reg = <0x01c13400 0x10>, <0x01c14800 0x4>, <0x01c1c800 0x4>;
|
||||
|
||||
@ -17,7 +17,7 @@ description: |+
|
||||
"aspeed,ast2400-scu", "syscon", "simple-mfd"
|
||||
|
||||
Refer to the the bindings described in
|
||||
Documentation/devicetree/bindings/mfd/syscon.txt
|
||||
Documentation/devicetree/bindings/mfd/syscon.yaml
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
|
||||
@ -18,7 +18,7 @@ description: |+
|
||||
"aspeed,g5-scu", "syscon", "simple-mfd"
|
||||
|
||||
Refer to the the bindings described in
|
||||
Documentation/devicetree/bindings/mfd/syscon.txt
|
||||
Documentation/devicetree/bindings/mfd/syscon.yaml
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
|
||||
@ -17,7 +17,7 @@ description: |+
|
||||
"aspeed,ast2600-scu", "syscon", "simple-mfd"
|
||||
|
||||
Refer to the the bindings described in
|
||||
Documentation/devicetree/bindings/mfd/syscon.txt
|
||||
Documentation/devicetree/bindings/mfd/syscon.yaml
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
|
||||
@ -248,7 +248,7 @@ examples:
|
||||
};
|
||||
|
||||
//Example 3 pin groups
|
||||
pinctrl@60020000 {
|
||||
pinctrl {
|
||||
usart1_pins_a: usart1-0 {
|
||||
pins1 {
|
||||
pinmux = <STM32_PINMUX('A', 9, AF7)>;
|
||||
|
||||
@ -18,7 +18,7 @@ description: |+
|
||||
"amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon"
|
||||
|
||||
Refer to the the bindings described in
|
||||
Documentation/devicetree/bindings/mfd/syscon.txt
|
||||
Documentation/devicetree/bindings/mfd/syscon.yaml
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
|
||||
@ -1,33 +0,0 @@
|
||||
PM Domain Idle State Node:
|
||||
|
||||
A domain idle state node represents the state parameters that will be used to
|
||||
select the state when there are no active components in the domain.
|
||||
|
||||
The state node has the following parameters -
|
||||
|
||||
- compatible:
|
||||
Usage: Required
|
||||
Value type: <string>
|
||||
Definition: Must be "domain-idle-state".
|
||||
|
||||
- entry-latency-us
|
||||
Usage: Required
|
||||
Value type: <prop-encoded-array>
|
||||
Definition: u32 value representing worst case latency in
|
||||
microseconds required to enter the idle state.
|
||||
The exit-latency-us duration may be guaranteed
|
||||
only after entry-latency-us has passed.
|
||||
|
||||
- exit-latency-us
|
||||
Usage: Required
|
||||
Value type: <prop-encoded-array>
|
||||
Definition: u32 value representing worst case latency
|
||||
in microseconds required to exit the idle state.
|
||||
|
||||
- min-residency-us
|
||||
Usage: Required
|
||||
Value type: <prop-encoded-array>
|
||||
Definition: u32 value representing minimum residency duration
|
||||
in microseconds after which the idle state will yield
|
||||
power benefits after overcoming the overhead in entering
|
||||
i the idle state.
|
||||
@ -0,0 +1,64 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/power/domain-idle-state.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: PM Domain Idle States binding description
|
||||
|
||||
maintainers:
|
||||
- Ulf Hansson <ulf.hansson@linaro.org>
|
||||
|
||||
description:
|
||||
A domain idle state node represents the state parameters that will be used to
|
||||
select the state when there are no active components in the PM domain.
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
const: domain-idle-states
|
||||
|
||||
patternProperties:
|
||||
"^(cpu|cluster|domain)-":
|
||||
type: object
|
||||
description:
|
||||
Each state node represents a domain idle state description.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: domain-idle-state
|
||||
|
||||
entry-latency-us:
|
||||
description:
|
||||
The worst case latency in microseconds required to enter the idle
|
||||
state. Note that, the exit-latency-us duration may be guaranteed only
|
||||
after the entry-latency-us has passed.
|
||||
|
||||
exit-latency-us:
|
||||
description:
|
||||
The worst case latency in microseconds required to exit the idle
|
||||
state.
|
||||
|
||||
min-residency-us:
|
||||
description:
|
||||
The minimum residency duration in microseconds after which the idle
|
||||
state will yield power benefits, after overcoming the overhead while
|
||||
entering the idle state.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- entry-latency-us
|
||||
- exit-latency-us
|
||||
- min-residency-us
|
||||
|
||||
examples:
|
||||
- |
|
||||
|
||||
domain-idle-states {
|
||||
domain_retention: domain-retention {
|
||||
compatible = "domain-idle-state";
|
||||
entry-latency-us = <20>;
|
||||
exit-latency-us = <40>;
|
||||
min-residency-us = <80>;
|
||||
};
|
||||
};
|
||||
...
|
||||
@ -25,22 +25,20 @@ description: |+
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
pattern: "^(power-controller|power-domain)(@.*)?$"
|
||||
pattern: "^(power-controller|power-domain)([@-].*)?$"
|
||||
|
||||
domain-idle-states:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||
description:
|
||||
A phandle of an idle-state that shall be soaked into a generic domain
|
||||
power state. The idle state definitions are compatible with
|
||||
domain-idle-state specified in
|
||||
Documentation/devicetree/bindings/power/domain-idle-state.txt
|
||||
phandles that are not compatible with domain-idle-state will be ignored.
|
||||
The domain-idle-state property reflects the idle state of this PM domain
|
||||
and not the idle states of the devices or sub-domains in the PM domain.
|
||||
Devices and sub-domains have their own idle-states independent
|
||||
of the parent domain's idle states. In the absence of this property,
|
||||
the domain would be considered as capable of being powered-on
|
||||
or powered-off.
|
||||
description: |
|
||||
Phandles of idle states that defines the available states for the
|
||||
power-domain provider. The idle state definitions are compatible with the
|
||||
domain-idle-state bindings, specified in ./domain-idle-state.yaml.
|
||||
|
||||
Note that, the domain-idle-state property reflects the idle states of this
|
||||
PM domain and not the idle states of the devices or sub-domains in the PM
|
||||
domain. Devices and sub-domains have their own idle states independent of
|
||||
the parent domain's idle states. In the absence of this property, the
|
||||
domain would be considered as capable of being powered-on or powered-off.
|
||||
|
||||
operating-points-v2:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||
|
||||
@ -109,4 +109,4 @@ Example:
|
||||
required-opps = <&domain1_opp_1>;
|
||||
};
|
||||
|
||||
[1]. Documentation/devicetree/bindings/power/domain-idle-state.txt
|
||||
[1]. Documentation/devicetree/bindings/power/domain-idle-state.yaml
|
||||
|
||||
@ -161,7 +161,7 @@ The regulator node houses sub-nodes for each regulator within the device. Each
|
||||
sub-node is identified using the node's name, with valid values listed for each
|
||||
of the PMICs below.
|
||||
|
||||
pm8005:
|
||||
pm8004:
|
||||
s2, s5
|
||||
|
||||
pm8005:
|
||||
|
||||
@ -191,7 +191,7 @@ patternProperties:
|
||||
|
||||
examples:
|
||||
- |
|
||||
xyzreg: regulator@0 {
|
||||
xyzreg: regulator {
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <2500000>;
|
||||
regulator-always-on;
|
||||
|
||||
@ -23,7 +23,11 @@ properties:
|
||||
description: Global reset register offset and bit offset.
|
||||
allOf:
|
||||
- $ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
- maxItems: 2
|
||||
items:
|
||||
- description: Register offset
|
||||
- description: Register bit offset
|
||||
minimum: 0
|
||||
maximum: 31
|
||||
|
||||
"#reset-cells":
|
||||
minimum: 2
|
||||
|
||||
@ -3,4 +3,4 @@ STMicroelectronics STM32MP1 Peripheral Reset Controller
|
||||
|
||||
The RCC IP is both a reset and a clock controller.
|
||||
|
||||
Please see Documentation/devicetree/bindings/clock/st,stm32mp1-rcc.txt
|
||||
Please see Documentation/devicetree/bindings/clock/st,stm32mp1-rcc.yaml
|
||||
|
||||
@ -36,7 +36,7 @@ SAI subnodes required properties:
|
||||
- clock-names: Must contain "sai_ck".
|
||||
Must also contain "MCLK", if SAI shares a master clock,
|
||||
with a SAI set as MCLK clock provider.
|
||||
- dmas: see Documentation/devicetree/bindings/dma/stm32-dma.txt
|
||||
- dmas: see Documentation/devicetree/bindings/dma/st,stm32-dma.yaml
|
||||
- dma-names: identifier string for each DMA request line
|
||||
"tx": if sai sub-block is configured as playback DAI
|
||||
"rx": if sai sub-block is configured as capture DAI
|
||||
|
||||
@ -10,7 +10,7 @@ Required properties:
|
||||
- clock-names: must contain "kclk"
|
||||
- interrupts: cpu DAI interrupt line
|
||||
- dmas: DMA specifiers for audio data DMA and iec control flow DMA
|
||||
See STM32 DMA bindings, Documentation/devicetree/bindings/dma/stm32-dma.txt
|
||||
See STM32 DMA bindings, Documentation/devicetree/bindings/dma/st,stm32-dma.yaml
|
||||
- dma-names: two dmas have to be defined, "rx" and "rx-ctrl"
|
||||
|
||||
Optional properties:
|
||||
|
||||
@ -49,7 +49,7 @@ properties:
|
||||
dmas:
|
||||
description: |
|
||||
DMA specifiers for tx and rx dma. DMA fifo mode must be used. See
|
||||
the STM32 DMA bindings Documentation/devicetree/bindings/dma/stm32-dma.txt.
|
||||
the STM32 DMA bindings Documentation/devicetree/bindings/dma/st,stm32-dma.yaml.
|
||||
items:
|
||||
- description: rx DMA channel
|
||||
- description: tx DMA channel
|
||||
|
||||
@ -125,7 +125,7 @@ examples:
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
sram_a: sram@00000000 {
|
||||
sram_a: sram@0 {
|
||||
compatible = "mmio-sram";
|
||||
reg = <0x00000000 0xc000>;
|
||||
#address-cells = <1>;
|
||||
|
||||
@ -17,7 +17,7 @@ description: |+
|
||||
"brcm,bcm2711-avs-monitor", "syscon", "simple-mfd"
|
||||
|
||||
Refer to the the bindings described in
|
||||
Documentation/devicetree/bindings/mfd/syscon.txt
|
||||
Documentation/devicetree/bindings/mfd/syscon.yaml
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
|
||||
@ -87,7 +87,7 @@ additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
timer {
|
||||
timer@1c20c00 {
|
||||
compatible = "allwinner,sun4i-a10-timer";
|
||||
reg = <0x01c20c00 0x400>;
|
||||
interrupts = <22>,
|
||||
|
||||
@ -151,8 +151,8 @@ The details of these operations are:
|
||||
Note that callbacks will always be invoked from the DMA
|
||||
engines tasklet, never from interrupt context.
|
||||
|
||||
Optional: per descriptor metadata
|
||||
---------------------------------
|
||||
**Optional: per descriptor metadata**
|
||||
|
||||
DMAengine provides two ways for metadata support.
|
||||
|
||||
DESC_METADATA_CLIENT
|
||||
@ -199,12 +199,15 @@ Optional: per descriptor metadata
|
||||
DESC_METADATA_CLIENT
|
||||
|
||||
- DMA_MEM_TO_DEV / DEV_MEM_TO_MEM:
|
||||
|
||||
1. prepare the descriptor (dmaengine_prep_*)
|
||||
construct the metadata in the client's buffer
|
||||
2. use dmaengine_desc_attach_metadata() to attach the buffer to the
|
||||
descriptor
|
||||
3. submit the transfer
|
||||
|
||||
- DMA_DEV_TO_MEM:
|
||||
|
||||
1. prepare the descriptor (dmaengine_prep_*)
|
||||
2. use dmaengine_desc_attach_metadata() to attach the buffer to the
|
||||
descriptor
|
||||
@ -215,6 +218,7 @@ Optional: per descriptor metadata
|
||||
DESC_METADATA_ENGINE
|
||||
|
||||
- DMA_MEM_TO_DEV / DEV_MEM_TO_MEM:
|
||||
|
||||
1. prepare the descriptor (dmaengine_prep_*)
|
||||
2. use dmaengine_desc_get_metadata_ptr() to get the pointer to the
|
||||
engine's metadata area
|
||||
@ -222,7 +226,9 @@ Optional: per descriptor metadata
|
||||
4. use dmaengine_desc_set_metadata_len() to tell the DMA engine the
|
||||
amount of data the client has placed into the metadata buffer
|
||||
5. submit the transfer
|
||||
|
||||
- DMA_DEV_TO_MEM:
|
||||
|
||||
1. prepare the descriptor (dmaengine_prep_*)
|
||||
2. submit the transfer
|
||||
3. on transfer completion, use dmaengine_desc_get_metadata_ptr() to get
|
||||
@ -278,8 +284,8 @@ Optional: per descriptor metadata
|
||||
|
||||
void dma_async_issue_pending(struct dma_chan *chan);
|
||||
|
||||
Further APIs:
|
||||
-------------
|
||||
Further APIs
|
||||
------------
|
||||
|
||||
1. Terminate APIs
|
||||
|
||||
|
||||
@ -164,9 +164,9 @@ file.
|
||||
void __iomem *base;
|
||||
};
|
||||
|
||||
struct dentry *debugfs_create_regset32(const char *name, umode_t mode,
|
||||
struct dentry *parent,
|
||||
struct debugfs_regset32 *regset);
|
||||
debugfs_create_regset32(const char *name, umode_t mode,
|
||||
struct dentry *parent,
|
||||
struct debugfs_regset32 *regset);
|
||||
|
||||
void debugfs_print_regs32(struct seq_file *s, struct debugfs_reg32 *regs,
|
||||
int nregs, void __iomem *base, char *prefix);
|
||||
|
||||
@ -20,8 +20,7 @@ Usage Notes
|
||||
-----------
|
||||
|
||||
This driver does not auto-detect devices. You will have to instantiate the
|
||||
devices explicitly. Please see Documentation/i2c/instantiating-devices for
|
||||
details.
|
||||
devices explicitly. Please see :doc:`/i2c/instantiating-devices` for details.
|
||||
|
||||
|
||||
Sysfs entries
|
||||
|
||||
21
MAINTAINERS
21
MAINTAINERS
@ -693,7 +693,7 @@ ALLWINNER CPUFREQ DRIVER
|
||||
M: Yangtao Li <tiny.windzz@gmail.com>
|
||||
L: linux-pm@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/opp/sun50i-nvmem-cpufreq.txt
|
||||
F: Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml
|
||||
F: drivers/cpufreq/sun50i-cpufreq-nvmem.c
|
||||
|
||||
ALLWINNER CRYPTO DRIVERS
|
||||
@ -4017,7 +4017,7 @@ M: Cheng-Yi Chiang <cychiang@chromium.org>
|
||||
S: Maintained
|
||||
R: Enric Balletbo i Serra <enric.balletbo@collabora.com>
|
||||
R: Guenter Roeck <groeck@chromium.org>
|
||||
F: Documentation/devicetree/bindings/sound/google,cros-ec-codec.txt
|
||||
F: Documentation/devicetree/bindings/sound/google,cros-ec-codec.yaml
|
||||
F: sound/soc/codecs/cros_ec_codec.*
|
||||
|
||||
CIRRUS LOGIC AUDIO CODEC DRIVERS
|
||||
@ -4475,7 +4475,7 @@ L: linux-media@vger.kernel.org
|
||||
T: git git://linuxtv.org/media_tree.git
|
||||
S: Maintained
|
||||
F: drivers/media/platform/sunxi/sun6i-csi/
|
||||
F: Documentation/devicetree/bindings/media/sun6i-csi.txt
|
||||
F: Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml
|
||||
|
||||
CW1200 WLAN driver
|
||||
M: Solomon Peachy <pizza@shaftnet.org>
|
||||
@ -5668,7 +5668,7 @@ L: dri-devel@lists.freedesktop.org
|
||||
T: git git://anongit.freedesktop.org/drm/drm-misc
|
||||
S: Maintained
|
||||
F: drivers/gpu/drm/stm
|
||||
F: Documentation/devicetree/bindings/display/st,stm32-ltdc.txt
|
||||
F: Documentation/devicetree/bindings/display/st,stm32-ltdc.yaml
|
||||
|
||||
DRM DRIVERS FOR TI LCDC
|
||||
M: Jyri Sarha <jsarha@ti.com>
|
||||
@ -7738,7 +7738,7 @@ Hyper-V CORE AND DRIVERS
|
||||
M: "K. Y. Srinivasan" <kys@microsoft.com>
|
||||
M: Haiyang Zhang <haiyangz@microsoft.com>
|
||||
M: Stephen Hemminger <sthemmin@microsoft.com>
|
||||
M: Sasha Levin <sashal@kernel.org>
|
||||
M: Wei Liu <wei.liu@kernel.org>
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/hyperv/linux.git
|
||||
L: linux-hyperv@vger.kernel.org
|
||||
S: Supported
|
||||
@ -10164,7 +10164,7 @@ MAXBOTIX ULTRASONIC RANGER IIO DRIVER
|
||||
M: Andreas Klinger <ak@it-klinger.de>
|
||||
L: linux-iio@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/iio/proximity/maxbotix,mb1232.txt
|
||||
F: Documentation/devicetree/bindings/iio/proximity/maxbotix,mb1232.yaml
|
||||
F: drivers/iio/proximity/mb1232.c
|
||||
|
||||
MAXIM MAX77650 PMIC MFD DRIVER
|
||||
@ -10467,7 +10467,7 @@ M: Hugues Fruchet <hugues.fruchet@st.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
T: git git://linuxtv.org/media_tree.git
|
||||
S: Supported
|
||||
F: Documentation/devicetree/bindings/media/st,stm32-dcmi.txt
|
||||
F: Documentation/devicetree/bindings/media/st,stm32-dcmi.yaml
|
||||
F: drivers/media/platform/stm32/stm32-dcmi.c
|
||||
|
||||
MEDIA DRIVERS FOR NVIDIA TEGRA - VDE
|
||||
@ -12952,7 +12952,6 @@ M: Robert Richter <rrichter@marvell.com>
|
||||
L: linux-pci@vger.kernel.org
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Supported
|
||||
F: Documentation/devicetree/bindings/pci/pci-thunder-*
|
||||
F: drivers/pci/controller/pci-thunder-*
|
||||
|
||||
PCIE DRIVER FOR HISILICON
|
||||
@ -14227,7 +14226,7 @@ F: include/dt-bindings/reset/
|
||||
F: include/linux/reset.h
|
||||
F: include/linux/reset/
|
||||
F: include/linux/reset-controller.h
|
||||
K: \b(?:devm_|of_)?reset_control(?:ler_[a-z]+|_[a-z_]+)?\b
|
||||
K: \b(?:devm_|of_)?reset_control(?:ler_[a-z]+|_[a-z_]+)?\b
|
||||
|
||||
RESTARTABLE SEQUENCES SUPPORT
|
||||
M: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
|
||||
@ -15922,7 +15921,7 @@ F: drivers/*/stm32-*timer*
|
||||
F: drivers/pwm/pwm-stm32*
|
||||
F: include/linux/*/stm32-*tim*
|
||||
F: Documentation/ABI/testing/*timer-stm32
|
||||
F: Documentation/devicetree/bindings/*/stm32-*timer*
|
||||
F: Documentation/devicetree/bindings/*/*stm32-*timer*
|
||||
F: Documentation/devicetree/bindings/pwm/pwm-stm32*
|
||||
|
||||
STMMAC ETHERNET DRIVER
|
||||
@ -16081,6 +16080,8 @@ SYNOPSYS DESIGNWARE 8250 UART DRIVER
|
||||
R: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
|
||||
S: Maintained
|
||||
F: drivers/tty/serial/8250/8250_dw.c
|
||||
F: drivers/tty/serial/8250/8250_dwlib.*
|
||||
F: drivers/tty/serial/8250/8250_lpss.c
|
||||
|
||||
SYNOPSYS DESIGNWARE APB GPIO DRIVER
|
||||
M: Hoan Tran <hoan@os.amperecomputing.com>
|
||||
|
||||
2
Makefile
2
Makefile
@ -2,7 +2,7 @@
|
||||
VERSION = 5
|
||||
PATCHLEVEL = 6
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc4
|
||||
EXTRAVERSION = -rc5
|
||||
NAME = Kleptomaniac Octopus
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
||||
@ -738,8 +738,9 @@ config HAVE_STACK_VALIDATION
|
||||
config HAVE_RELIABLE_STACKTRACE
|
||||
bool
|
||||
help
|
||||
Architecture has a save_stack_trace_tsk_reliable() function which
|
||||
only returns a stack trace if it can guarantee the trace is reliable.
|
||||
Architecture has either save_stack_trace_tsk_reliable() or
|
||||
arch_stack_walk_reliable() function which only returns a stack trace
|
||||
if it can guarantee the trace is reliable.
|
||||
|
||||
config HAVE_ARCH_HASH
|
||||
bool
|
||||
|
||||
@ -526,11 +526,11 @@ &cpu0_opp_table {
|
||||
* Supply voltage supervisor on board will not allow opp50 so
|
||||
* disable it and set opp100 as suspend OPP.
|
||||
*/
|
||||
opp50@300000000 {
|
||||
opp50-300000000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
opp100@600000000 {
|
||||
opp100-600000000 {
|
||||
opp-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
@ -21,6 +21,7 @@ memory@0 {
|
||||
|
||||
aliases {
|
||||
ethernet0 = &genet;
|
||||
pcie0 = &pcie0;
|
||||
};
|
||||
|
||||
leds {
|
||||
@ -31,6 +32,8 @@ act {
|
||||
pwr {
|
||||
label = "PWR";
|
||||
gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
|
||||
default-state = "keep";
|
||||
linux,default-trigger = "default-on";
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@ -26,6 +26,8 @@ act {
|
||||
pwr {
|
||||
label = "PWR";
|
||||
gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
|
||||
default-state = "keep";
|
||||
linux,default-trigger = "default-on";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -27,6 +27,8 @@ act {
|
||||
pwr {
|
||||
label = "PWR";
|
||||
gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
|
||||
default-state = "keep";
|
||||
linux,default-trigger = "default-on";
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@ -61,10 +61,10 @@ aic_dvdd: fixedregulator-aic_dvdd {
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
evm_3v3: fixedregulator-evm3v3 {
|
||||
vsys_3v3: fixedregulator-vsys3v3 {
|
||||
/* Output of Cntlr A of TPS43351-Q1 on dra7-evm */
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "evm_3v3";
|
||||
regulator-name = "vsys_3v3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
vin-supply = <&evm_12v0>;
|
||||
|
||||
@ -3474,6 +3474,7 @@ timer13: timer@0 {
|
||||
clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER13_CLKCTRL 24>;
|
||||
clock-names = "fck";
|
||||
interrupts = <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>;
|
||||
ti,timer-pwm;
|
||||
};
|
||||
};
|
||||
|
||||
@ -3501,6 +3502,7 @@ timer14: timer@0 {
|
||||
clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER14_CLKCTRL 24>;
|
||||
clock-names = "fck";
|
||||
interrupts = <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>;
|
||||
ti,timer-pwm;
|
||||
};
|
||||
};
|
||||
|
||||
@ -3528,6 +3530,7 @@ timer15: timer@0 {
|
||||
clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER15_CLKCTRL 24>;
|
||||
clock-names = "fck";
|
||||
interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>;
|
||||
ti,timer-pwm;
|
||||
};
|
||||
};
|
||||
|
||||
@ -3555,6 +3558,7 @@ timer16: timer@0 {
|
||||
clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER16_CLKCTRL 24>;
|
||||
clock-names = "fck";
|
||||
interrupts = <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>;
|
||||
ti,timer-pwm;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@ -184,6 +184,7 @@ pcie1_rc: pcie@51000000 {
|
||||
device_type = "pci";
|
||||
ranges = <0x81000000 0 0 0x03000 0 0x00010000
|
||||
0x82000000 0 0x20013000 0x13000 0 0xffed000>;
|
||||
dma-ranges = <0x02000000 0x0 0x00000000 0x00000000 0x1 0x00000000>;
|
||||
bus-range = <0x00 0xff>;
|
||||
#interrupt-cells = <1>;
|
||||
num-lanes = <1>;
|
||||
@ -238,6 +239,7 @@ pcie2_rc: pcie@51800000 {
|
||||
device_type = "pci";
|
||||
ranges = <0x81000000 0 0 0x03000 0 0x00010000
|
||||
0x82000000 0 0x30013000 0x13000 0 0xffed000>;
|
||||
dma-ranges = <0x02000000 0x0 0x00000000 0x00000000 0x1 0x00000000>;
|
||||
bus-range = <0x00 0xff>;
|
||||
#interrupt-cells = <1>;
|
||||
num-lanes = <1>;
|
||||
|
||||
@ -128,3 +128,8 @@ &rtctarget {
|
||||
&usb4_tm {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&mmc3 {
|
||||
/* dra76x is not affected by i887 */
|
||||
max-frequency = <96000000>;
|
||||
};
|
||||
|
||||
@ -796,16 +796,6 @@ video2_div_clk: video2_div_clk {
|
||||
clock-div = <1>;
|
||||
};
|
||||
|
||||
ipu1_gfclk_mux: ipu1_gfclk_mux@520 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,mux-clock";
|
||||
clocks = <&dpll_abe_m2x2_ck>, <&dpll_core_h22x2_ck>;
|
||||
ti,bit-shift = <24>;
|
||||
reg = <0x0520>;
|
||||
assigned-clocks = <&ipu1_gfclk_mux>;
|
||||
assigned-clock-parents = <&dpll_core_h22x2_ck>;
|
||||
};
|
||||
|
||||
dummy_ck: dummy_ck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
@ -1564,6 +1554,8 @@ ipu1_clkctrl: ipu1-clkctrl@20 {
|
||||
compatible = "ti,clkctrl";
|
||||
reg = <0x20 0x4>;
|
||||
#clock-cells = <2>;
|
||||
assigned-clocks = <&ipu1_clkctrl DRA7_IPU1_MMU_IPU1_CLKCTRL 24>;
|
||||
assigned-clock-parents = <&dpll_core_h22x2_ck>;
|
||||
};
|
||||
|
||||
ipu_clkctrl: ipu-clkctrl@50 {
|
||||
|
||||
@ -275,7 +275,7 @@ &weim {
|
||||
|
||||
/* SRAM on Colibri nEXT_CS0 */
|
||||
sram@0,0 {
|
||||
compatible = "cypress,cy7c1019dv33-10zsxi, mtd-ram";
|
||||
compatible = "cypress,cy7c1019dv33-10zsxi", "mtd-ram";
|
||||
reg = <0 0 0x00010000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
@ -286,7 +286,7 @@ sram@0,0 {
|
||||
|
||||
/* SRAM on Colibri nEXT_CS1 */
|
||||
sram@1,0 {
|
||||
compatible = "cypress,cy7c1019dv33-10zsxi, mtd-ram";
|
||||
compatible = "cypress,cy7c1019dv33-10zsxi", "mtd-ram";
|
||||
reg = <1 0 0x00010000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
@ -192,7 +192,6 @@ &usdhc4 {
|
||||
pinctrl-0 = <&pinctrl_usdhc4>;
|
||||
bus-width = <8>;
|
||||
non-removable;
|
||||
vmmc-supply = <&vdd_emmc_1p8>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
||||
@ -336,7 +336,6 @@ &usdhc3 {
|
||||
assigned-clock-rates = <400000000>;
|
||||
bus-width = <8>;
|
||||
fsl,tuning-step = <2>;
|
||||
max-frequency = <100000000>;
|
||||
vmmc-supply = <®_module_3v3>;
|
||||
vqmmc-supply = <®_DCDC3>;
|
||||
non-removable;
|
||||
|
||||
@ -44,7 +44,7 @@ opp-792000000 {
|
||||
opp-hz = /bits/ 64 <792000000>;
|
||||
opp-microvolt = <1000000>;
|
||||
clock-latency-ns = <150000>;
|
||||
opp-supported-hw = <0xd>, <0xf>;
|
||||
opp-supported-hw = <0xd>, <0x7>;
|
||||
opp-suspend;
|
||||
};
|
||||
|
||||
@ -52,7 +52,7 @@ opp-996000000 {
|
||||
opp-hz = /bits/ 64 <996000000>;
|
||||
opp-microvolt = <1100000>;
|
||||
clock-latency-ns = <150000>;
|
||||
opp-supported-hw = <0xc>, <0xf>;
|
||||
opp-supported-hw = <0xc>, <0x7>;
|
||||
opp-suspend;
|
||||
};
|
||||
|
||||
@ -60,7 +60,7 @@ opp-1200000000 {
|
||||
opp-hz = /bits/ 64 <1200000000>;
|
||||
opp-microvolt = <1225000>;
|
||||
clock-latency-ns = <150000>;
|
||||
opp-supported-hw = <0x8>, <0xf>;
|
||||
opp-supported-hw = <0x8>, <0x3>;
|
||||
opp-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
@ -747,7 +747,7 @@ dcu: dcu@2ce0000 {
|
||||
};
|
||||
|
||||
mdio0: mdio@2d24000 {
|
||||
compatible = "fsl,etsec2-mdio";
|
||||
compatible = "gianfar";
|
||||
device_type = "mdio";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
@ -756,7 +756,7 @@ mdio0: mdio@2d24000 {
|
||||
};
|
||||
|
||||
mdio1: mdio@2d64000 {
|
||||
compatible = "fsl,etsec2-mdio";
|
||||
compatible = "gianfar";
|
||||
device_type = "mdio";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
@ -182,6 +182,14 @@ vibrator {
|
||||
pwm-names = "enable", "direction";
|
||||
direction-duty-cycle-ns = <10000000>;
|
||||
};
|
||||
|
||||
backlight: backlight {
|
||||
compatible = "led-backlight";
|
||||
|
||||
leds = <&backlight_led>;
|
||||
brightness-levels = <31 63 95 127 159 191 223 255>;
|
||||
default-brightness-level = <6>;
|
||||
};
|
||||
};
|
||||
|
||||
&dss {
|
||||
@ -205,6 +213,8 @@ lcd0: display {
|
||||
vddi-supply = <&lcd_regulator>;
|
||||
reset-gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; /* gpio101 */
|
||||
|
||||
backlight = <&backlight>;
|
||||
|
||||
width-mm = <50>;
|
||||
height-mm = <89>;
|
||||
|
||||
@ -393,12 +403,11 @@ led-controller@38 {
|
||||
ramp-up-us = <1024>;
|
||||
ramp-down-us = <8193>;
|
||||
|
||||
led@0 {
|
||||
backlight_led: led@0 {
|
||||
reg = <0>;
|
||||
led-sources = <2>;
|
||||
ti,led-mode = <0>;
|
||||
label = ":backlight";
|
||||
linux,default-trigger = "backlight";
|
||||
};
|
||||
|
||||
led@1 {
|
||||
|
||||
@ -377,7 +377,7 @@ tmu2: timer@ffd82000 {
|
||||
};
|
||||
|
||||
sata: sata@fc600000 {
|
||||
compatible = "renesas,sata-r8a7779", "renesas,rcar-sata";
|
||||
compatible = "renesas,sata-r8a7779";
|
||||
reg = <0xfc600000 0x200000>;
|
||||
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp1_clks R8A7779_CLK_SATA>;
|
||||
|
||||
@ -178,6 +178,7 @@ CONFIG_SCHED_TRACER=y
|
||||
CONFIG_STACK_TRACER=y
|
||||
CONFIG_FUNCTION_PROFILER=y
|
||||
CONFIG_TEST_KSTRTOX=y
|
||||
CONFIG_DEBUG_FS=y
|
||||
CONFIG_KGDB=y
|
||||
CONFIG_KGDB_KDB=y
|
||||
CONFIG_STRICT_DEVMEM=y
|
||||
|
||||
@ -375,6 +375,7 @@ CONFIG_BACKLIGHT_GENERIC=m
|
||||
CONFIG_BACKLIGHT_PWM=m
|
||||
CONFIG_BACKLIGHT_PANDORA=m
|
||||
CONFIG_BACKLIGHT_GPIO=m
|
||||
CONFIG_BACKLIGHT_LED=m
|
||||
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
|
||||
CONFIG_LOGO=y
|
||||
|
||||
@ -157,6 +157,7 @@ CONFIG_NLS_ISO8859_1=y
|
||||
CONFIG_PRINTK_TIME=y
|
||||
CONFIG_DEBUG_INFO=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_DEBUG_FS=y
|
||||
CONFIG_DETECT_HUNG_TASK=y
|
||||
# CONFIG_SCHED_DEBUG is not set
|
||||
CONFIG_FUNCTION_TRACER=y
|
||||
|
||||
@ -91,6 +91,8 @@ AFLAGS_suspend-imx6.o :=-Wa,-march=armv7-a
|
||||
obj-$(CONFIG_SOC_IMX6) += suspend-imx6.o
|
||||
obj-$(CONFIG_SOC_IMX53) += suspend-imx53.o
|
||||
endif
|
||||
AFLAGS_resume-imx6.o :=-Wa,-march=armv7-a
|
||||
obj-$(CONFIG_SOC_IMX6) += resume-imx6.o
|
||||
obj-$(CONFIG_SOC_IMX6) += pm-imx6.o
|
||||
|
||||
obj-$(CONFIG_SOC_IMX1) += mach-imx1.o
|
||||
|
||||
@ -109,17 +109,17 @@ void imx_cpu_die(unsigned int cpu);
|
||||
int imx_cpu_kill(unsigned int cpu);
|
||||
|
||||
#ifdef CONFIG_SUSPEND
|
||||
void v7_cpu_resume(void);
|
||||
void imx53_suspend(void __iomem *ocram_vbase);
|
||||
extern const u32 imx53_suspend_sz;
|
||||
void imx6_suspend(void __iomem *ocram_vbase);
|
||||
#else
|
||||
static inline void v7_cpu_resume(void) {}
|
||||
static inline void imx53_suspend(void __iomem *ocram_vbase) {}
|
||||
static const u32 imx53_suspend_sz;
|
||||
static inline void imx6_suspend(void __iomem *ocram_vbase) {}
|
||||
#endif
|
||||
|
||||
void v7_cpu_resume(void);
|
||||
|
||||
void imx6_pm_ccm_init(const char *ccm_compat);
|
||||
void imx6q_pm_init(void);
|
||||
void imx6dl_pm_init(void);
|
||||
|
||||
24
arch/arm/mach-imx/resume-imx6.S
Normal file
24
arch/arm/mach-imx/resume-imx6.S
Normal file
@ -0,0 +1,24 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-or-later */
|
||||
/*
|
||||
* Copyright 2014 Freescale Semiconductor, Inc.
|
||||
*/
|
||||
|
||||
#include <linux/linkage.h>
|
||||
#include <asm/assembler.h>
|
||||
#include <asm/asm-offsets.h>
|
||||
#include <asm/hardware/cache-l2x0.h>
|
||||
#include "hardware.h"
|
||||
|
||||
/*
|
||||
* The following code must assume it is running from physical address
|
||||
* where absolute virtual addresses to the data section have to be
|
||||
* turned into relative ones.
|
||||
*/
|
||||
|
||||
ENTRY(v7_cpu_resume)
|
||||
bl v7_invalidate_l1
|
||||
#ifdef CONFIG_CACHE_L2X0
|
||||
bl l2c310_early_resume
|
||||
#endif
|
||||
b cpu_resume
|
||||
ENDPROC(v7_cpu_resume)
|
||||
@ -327,17 +327,3 @@ resume:
|
||||
|
||||
ret lr
|
||||
ENDPROC(imx6_suspend)
|
||||
|
||||
/*
|
||||
* The following code must assume it is running from physical address
|
||||
* where absolute virtual addresses to the data section have to be
|
||||
* turned into relative ones.
|
||||
*/
|
||||
|
||||
ENTRY(v7_cpu_resume)
|
||||
bl v7_invalidate_l1
|
||||
#ifdef CONFIG_CACHE_L2X0
|
||||
bl l2c310_early_resume
|
||||
#endif
|
||||
b cpu_resume
|
||||
ENDPROC(v7_cpu_resume)
|
||||
|
||||
@ -9,7 +9,6 @@ menuconfig ARCH_MESON
|
||||
select CACHE_L2X0
|
||||
select PINCTRL
|
||||
select PINCTRL_MESON
|
||||
select COMMON_CLK
|
||||
select HAVE_ARM_SCU if SMP
|
||||
select HAVE_ARM_TWD if SMP
|
||||
|
||||
|
||||
@ -16,7 +16,7 @@ hwmod-common = omap_hwmod.o omap_hwmod_reset.o \
|
||||
clock-common = clock.o
|
||||
secure-common = omap-smc.o omap-secure.o
|
||||
|
||||
obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common) $(secure-common)
|
||||
obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common)
|
||||
obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common)
|
||||
obj-$(CONFIG_ARCH_OMAP4) += $(hwmod-common) $(secure-common)
|
||||
obj-$(CONFIG_SOC_AM33XX) += $(hwmod-common) $(secure-common)
|
||||
|
||||
@ -431,7 +431,6 @@ void __init omap2420_init_early(void)
|
||||
omap_hwmod_init_postsetup();
|
||||
omap_clk_soc_init = omap2420_dt_clk_init;
|
||||
rate_table = omap2420_rate_table;
|
||||
omap_secure_init();
|
||||
}
|
||||
|
||||
void __init omap2420_init_late(void)
|
||||
@ -456,7 +455,6 @@ void __init omap2430_init_early(void)
|
||||
omap_hwmod_init_postsetup();
|
||||
omap_clk_soc_init = omap2430_dt_clk_init;
|
||||
rate_table = omap2430_rate_table;
|
||||
omap_secure_init();
|
||||
}
|
||||
|
||||
void __init omap2430_init_late(void)
|
||||
|
||||
@ -327,7 +327,7 @@ &sd_emmc_a {
|
||||
#size-cells = <0>;
|
||||
|
||||
bus-width = <4>;
|
||||
max-frequency = <50000000>;
|
||||
max-frequency = <60000000>;
|
||||
|
||||
non-removable;
|
||||
disable-wp;
|
||||
|
||||
@ -593,6 +593,7 @@ bluetooth {
|
||||
compatible = "brcm,bcm43438-bt";
|
||||
interrupt-parent = <&gpio_intc>;
|
||||
interrupts = <95 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "host-wakeup";
|
||||
shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
|
||||
max-speed = <2000000>;
|
||||
clocks = <&wifi32k>;
|
||||
|
||||
@ -52,11 +52,6 @@ ethphy0: ethernet-phy@0 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
ethphy1: ethernet-phy@1 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@ -102,7 +102,7 @@ base_fpga_region {
|
||||
};
|
||||
|
||||
gmac0: ethernet@ff800000 {
|
||||
compatible = "altr,socfpga-stmmac", "snps,dwmac-3.74a", "snps,dwmac";
|
||||
compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac";
|
||||
reg = <0xff800000 0x2000>;
|
||||
interrupts = <0 90 4>;
|
||||
interrupt-names = "macirq";
|
||||
@ -118,7 +118,7 @@ gmac0: ethernet@ff800000 {
|
||||
};
|
||||
|
||||
gmac1: ethernet@ff802000 {
|
||||
compatible = "altr,socfpga-stmmac", "snps,dwmac-3.74a", "snps,dwmac";
|
||||
compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac";
|
||||
reg = <0xff802000 0x2000>;
|
||||
interrupts = <0 91 4>;
|
||||
interrupt-names = "macirq";
|
||||
@ -134,7 +134,7 @@ gmac1: ethernet@ff802000 {
|
||||
};
|
||||
|
||||
gmac2: ethernet@ff804000 {
|
||||
compatible = "altr,socfpga-stmmac", "snps,dwmac-3.74a", "snps,dwmac";
|
||||
compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac";
|
||||
reg = <0xff804000 0x2000>;
|
||||
interrupts = <0 92 4>;
|
||||
interrupt-names = "macirq";
|
||||
|
||||
@ -773,7 +773,7 @@ CONFIG_ARCH_R8A774A1=y
|
||||
CONFIG_ARCH_R8A774B1=y
|
||||
CONFIG_ARCH_R8A774C0=y
|
||||
CONFIG_ARCH_R8A7795=y
|
||||
CONFIG_ARCH_R8A7796=y
|
||||
CONFIG_ARCH_R8A77960=y
|
||||
CONFIG_ARCH_R8A77961=y
|
||||
CONFIG_ARCH_R8A77965=y
|
||||
CONFIG_ARCH_R8A77970=y
|
||||
|
||||
@ -260,14 +260,26 @@ asmlinkage void post_ttbr_update_workaround(void)
|
||||
CONFIG_CAVIUM_ERRATUM_27456));
|
||||
}
|
||||
|
||||
static int asids_init(void)
|
||||
static int asids_update_limit(void)
|
||||
{
|
||||
asid_bits = get_cpu_asid_bits();
|
||||
unsigned long num_available_asids = NUM_USER_ASIDS;
|
||||
|
||||
if (arm64_kernel_unmapped_at_el0())
|
||||
num_available_asids /= 2;
|
||||
/*
|
||||
* Expect allocation after rollover to fail if we don't have at least
|
||||
* one more ASID than CPUs. ASID #0 is reserved for init_mm.
|
||||
*/
|
||||
WARN_ON(NUM_USER_ASIDS - 1 <= num_possible_cpus());
|
||||
WARN_ON(num_available_asids - 1 <= num_possible_cpus());
|
||||
pr_info("ASID allocator initialised with %lu entries\n",
|
||||
num_available_asids);
|
||||
return 0;
|
||||
}
|
||||
arch_initcall(asids_update_limit);
|
||||
|
||||
static int asids_init(void)
|
||||
{
|
||||
asid_bits = get_cpu_asid_bits();
|
||||
atomic64_set(&asid_generation, ASID_FIRST_VERSION);
|
||||
asid_map = kcalloc(BITS_TO_LONGS(NUM_USER_ASIDS), sizeof(*asid_map),
|
||||
GFP_KERNEL);
|
||||
@ -282,8 +294,6 @@ static int asids_init(void)
|
||||
*/
|
||||
if (IS_ENABLED(CONFIG_UNMAP_KERNEL_AT_EL0))
|
||||
set_kpti_asid_bits();
|
||||
|
||||
pr_info("ASID allocator initialised with %lu entries\n", NUM_USER_ASIDS);
|
||||
return 0;
|
||||
}
|
||||
early_initcall(asids_init);
|
||||
|
||||
@ -2193,11 +2193,13 @@ static struct cpu_spec * __init setup_cpu_spec(unsigned long offset,
|
||||
* oprofile_cpu_type already has a value, then we are
|
||||
* possibly overriding a real PVR with a logical one,
|
||||
* and, in that case, keep the current value for
|
||||
* oprofile_cpu_type.
|
||||
* oprofile_cpu_type. Futhermore, let's ensure that the
|
||||
* fix for the PMAO bug is enabled on compatibility mode.
|
||||
*/
|
||||
if (old.oprofile_cpu_type != NULL) {
|
||||
t->oprofile_cpu_type = old.oprofile_cpu_type;
|
||||
t->oprofile_type = old.oprofile_type;
|
||||
t->cpu_features |= old.cpu_features & CPU_FTR_PMAO_BUG;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user