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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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serial: stm32: Add support of TC bit status check
Adds a check on the Transmission Complete bit status before closing the
com port. Prevents the port closure before the end of the transmission.
TC poll loop is moved from stm32_tx_dma_complete to stm32_shutdown
routine, in order to check TC before shutdown in both dma and
PIO tx modes.
TC clear is added in stm32_transmit_char routine, in order to be cleared
before transmitting in both dma and PIO tx modes.
Fixes: 3489187204
("serial: stm32: adding dma support")
Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
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b83b957c91
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@ -290,21 +290,6 @@ static void stm32_tx_dma_complete(void *arg)
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struct uart_port *port = arg;
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struct stm32_port *stm32port = to_stm32_port(port);
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struct stm32_usart_offsets *ofs = &stm32port->info->ofs;
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unsigned int isr;
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int ret;
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ret = readl_relaxed_poll_timeout_atomic(port->membase + ofs->isr,
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isr,
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(isr & USART_SR_TC),
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10, 100000);
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if (ret)
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dev_err(port->dev, "terminal count not set\n");
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if (ofs->icr == UNDEF_REG)
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stm32_clr_bits(port, ofs->isr, USART_SR_TC);
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else
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stm32_set_bits(port, ofs->icr, USART_CR_TC);
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stm32_clr_bits(port, ofs->cr3, USART_CR3_DMAT);
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stm32port->tx_dma_busy = false;
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@ -396,7 +381,6 @@ static void stm32_transmit_chars_dma(struct uart_port *port)
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/* Issue pending DMA TX requests */
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dma_async_issue_pending(stm32port->tx_ch);
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stm32_clr_bits(port, ofs->isr, USART_SR_TC);
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stm32_set_bits(port, ofs->cr3, USART_CR3_DMAT);
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xmit->tail = (xmit->tail + count) & (UART_XMIT_SIZE - 1);
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@ -425,6 +409,11 @@ static void stm32_transmit_chars(struct uart_port *port)
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return;
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}
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if (ofs->icr == UNDEF_REG)
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stm32_clr_bits(port, ofs->isr, USART_SR_TC);
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else
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stm32_set_bits(port, ofs->icr, USART_ICR_TCCF);
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if (stm32_port->tx_ch)
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stm32_transmit_chars_dma(port);
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else
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@ -601,12 +590,21 @@ static void stm32_shutdown(struct uart_port *port)
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struct stm32_port *stm32_port = to_stm32_port(port);
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struct stm32_usart_offsets *ofs = &stm32_port->info->ofs;
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struct stm32_usart_config *cfg = &stm32_port->info->cfg;
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u32 val;
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u32 val, isr;
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int ret;
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val = USART_CR1_TXEIE | USART_CR1_RXNEIE | USART_CR1_TE | USART_CR1_RE;
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val |= BIT(cfg->uart_enable_bit);
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if (stm32_port->fifoen)
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val |= USART_CR1_FIFOEN;
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ret = readl_relaxed_poll_timeout(port->membase + ofs->isr,
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isr, (isr & USART_SR_TC),
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10, 100000);
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if (ret)
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dev_err(port->dev, "transmission complete not set\n");
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stm32_clr_bits(port, ofs->cr1, val);
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dev_pm_clear_wake_irq(port->dev);
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