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ACPI / LPSS: Save/restore LPSS private registers also on Lynxpoint
My assumption in commitb53548f9d9
("spi: pxa2xx: Remove LPSS private register restoring during resume") that Intel Lynxpoint and compatible based chipsets may not need LPSS private registers saving and restoring over suspend/resume cycle turned out to be false on Intel Broadwell. Curtis Malainey sent a patch bringing above change back and reported the LPSS SPI Chip Select control was lost over suspend/resume cycle on Broadwell machine. Instead of reverting above commit lets add LPSS private register saving/restoring also for all LPSS SPI, I2C and UART controllers on Lynxpoint and compatible chipset to make sure context is not lost in case nothing else preserves it like firmware or if LPSS is always on. Fixes:b53548f9d9
("spi: pxa2xx: Remove LPSS private register restoring during resume") Reported-by: Curtis Malainey <cujomalainey@chromium.org> Tested-by: Curtis Malainey <cujomalainey@chromium.org> Cc: 5.0+ <stable@vger.kernel.org> # 5.0+ Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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@ -219,12 +219,13 @@ static void bsw_pwm_setup(struct lpss_private_data *pdata)
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}
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static const struct lpss_device_desc lpt_dev_desc = {
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.flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_LTR,
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.flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_LTR
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| LPSS_SAVE_CTX,
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.prv_offset = 0x800,
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};
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static const struct lpss_device_desc lpt_i2c_dev_desc = {
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.flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_LTR,
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.flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_LTR | LPSS_SAVE_CTX,
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.prv_offset = 0x800,
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};
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@ -236,7 +237,8 @@ static struct property_entry uart_properties[] = {
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};
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static const struct lpss_device_desc lpt_uart_dev_desc = {
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.flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_LTR,
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.flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_LTR
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| LPSS_SAVE_CTX,
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.clk_con_id = "baudclk",
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.prv_offset = 0x800,
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.setup = lpss_uart_setup,
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