arm64: dts: qcom: qcs404: Add PSCI cpuidle low power states

Add device bindings for cpuidle states for cpu devices.

Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
[amit: rename the idle-states to more generic names and fixups]
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Signed-off-by: Andy Gross <agross@kernel.org>
This commit is contained in:
Niklas Cassel 2019-05-21 15:05:15 +05:30 committed by Andy Gross
parent 3fdeaee951
commit 45ea8f32b0

View File

@ -30,6 +30,7 @@ CPU0: cpu@100 {
compatible = "arm,cortex-a53";
reg = <0x100>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0>;
next-level-cache = <&L2_0>;
};
@ -38,6 +39,7 @@ CPU1: cpu@101 {
compatible = "arm,cortex-a53";
reg = <0x101>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0>;
next-level-cache = <&L2_0>;
};
@ -46,6 +48,7 @@ CPU2: cpu@102 {
compatible = "arm,cortex-a53";
reg = <0x102>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0>;
next-level-cache = <&L2_0>;
};
@ -54,6 +57,7 @@ CPU3: cpu@103 {
compatible = "arm,cortex-a53";
reg = <0x103>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0>;
next-level-cache = <&L2_0>;
};
@ -61,6 +65,20 @@ L2_0: l2-cache {
compatible = "cache";
cache-level = <2>;
};
idle-states {
entry-method = "psci";
CPU_SLEEP_0: cpu-sleep-0 {
compatible = "arm,idle-state";
idle-state-name = "standalone-power-collapse";
arm,psci-suspend-param = <0x40000003>;
entry-latency-us = <125>;
exit-latency-us = <180>;
min-residency-us = <595>;
local-timer-stop;
};
};
};
firmware {