Qualcomm ARM64 Updates for v5.2

* Add gpio ranges for Qualcomm platforms
 * Fix MSM8998 BLSP2 I2C5 address
 * Add MSM8998 UFS nodes and associated information
 * Add SDM845 interconnect header and usage
 * Add ADSP and CDSP PAS, RMTFS memory, and UFS phy reset on SDM845
 * Update reserved memory map on SDM845
 * Add QCS404 spmi regulators, ethernet, bluetooth, and uart3
 * Remove remotely-controlled property as default for BAM on QCS404
 * Add spmi regulators on PMS405
 * Fixup QCS404 l3 voltages and regulator supply names
 * Fixup thermal trip names on Qualcomm platforms
 * Add thermal sensors on Qualcomm platforms
 * Remove invalid efficiency property on MSM8998
 * Change QCS404-evb compatible to help distinguish platforms
 * Add rpmhd header file and convert to use definitions on SDM845
 * Add interconnect header file on SDM845
 * Add PMS405 ADC binding
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Merge tag 'qcom-arm64-for-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into arm/dt

Qualcomm ARM64 Updates for v5.2

* Add gpio ranges for Qualcomm platforms
* Fix MSM8998 BLSP2 I2C5 address
* Add MSM8998 UFS nodes and associated information
* Add SDM845 interconnect header and usage
* Add ADSP and CDSP PAS, RMTFS memory, and UFS phy reset on SDM845
* Update reserved memory map on SDM845
* Add QCS404 spmi regulators, ethernet, bluetooth, and uart3
* Remove remotely-controlled property as default for BAM on QCS404
* Add spmi regulators on PMS405
* Fixup QCS404 l3 voltages and regulator supply names
* Fixup thermal trip names on Qualcomm platforms
* Add thermal sensors on Qualcomm platforms
* Remove invalid efficiency property on MSM8998
* Change QCS404-evb compatible to help distinguish platforms
* Add rpmhd header file and convert to use definitions on SDM845
* Add interconnect header file on SDM845
* Add PMS405 ADC binding

* tag 'qcom-arm64-for-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: (38 commits)
  arm64: dts: sdm845: Introduce ADSP and CDSP PAS nodes
  arm64: dts: qcom: sdm845: Define rmtfs memory
  arm64: dts: qcom: sdm845: Update reserved memory map
  arm64: dts: sdm845: Add UFS PHY reset
  arm64: dts: qcom: msm8998: Fix blsp2_i2c5 address
  arm64: dts: qcom: qcs404-evb: Change the compatible to distinguish platforms
  arm64: dts: qcom: pmi8998: add gpio-ranges
  arm64: dts: qcom: pmi8994: add gpio-ranges
  arm64: dts: qcom: pm8998: add gpio-ranges
  arm64: dts: qcom: pm8005: add gpio-ranges
  arm64: dts: msm8998: Add UFS phy reset
  arm64: dts: msm8916: thermal: Convert camera trip type to hot
  arm64: dts: msm8996: thermal: Make trip names consistent
  arm64: dts: msm8916: thermal: Make trip names consistent
  arm64: dts: msm8998: thermal: Make trip names consistent
  arm64: dts: sdm845: thermal: Add temperature sensors near major peripherals
  arm64: dts: msm8998: thermal: Add temperature sensors near major peripherals
  arm64: dts: msm8998: thermal: GPU has two sensors, add the second
  arm64: dts: msm8998: thermal: Fix the gpu sensor number
  arm64: dts: msm8998: thermal: Fix the cpu sensor numbers
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2019-04-28 12:52:08 -07:00
commit 38c2f3826d
17 changed files with 1068 additions and 136 deletions

View File

@ -13,6 +13,7 @@ VADC node:
Definition: Should contain "qcom,spmi-vadc".
Should contain "qcom,spmi-adc5" for PMIC5 ADC driver.
Should contain "qcom,spmi-adc-rev2" for PMIC rev2 ADC driver.
Should contain "qcom,pms405-adc" for PMS405 PMIC
- reg:
Usage: required

View File

@ -11,6 +11,7 @@ Required properties:
the appropriate jedec string:
"qcom,msm8994-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
"qcom,msm8996-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
"qcom,msm8998-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
"qcom,sdm845-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
- interrupts : <interrupt mapping for UFS host controller IRQ>
- reg : <registers mapping>

View File

@ -180,19 +180,19 @@ pmu {
};
thermal-zones {
cpu-thermal0 {
cpu0_1-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens 4>;
trips {
cpu_alert0: trip0 {
cpu0_1_alert0: trip-point@0 {
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit0: trip1 {
cpu0_1_crit: cpu_crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
@ -201,7 +201,7 @@ cpu_crit0: trip1 {
cooling-maps {
map0 {
trip = <&cpu_alert0>;
trip = <&cpu0_1_alert0>;
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
@ -210,19 +210,19 @@ map0 {
};
};
cpu-thermal1 {
cpu2_3-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens 3>;
trips {
cpu_alert1: trip0 {
cpu2_3_alert0: trip-point@0 {
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit1: trip1 {
cpu2_3_crit: cpu_crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
@ -231,7 +231,7 @@ cpu_crit1: trip1 {
cooling-maps {
map0 {
trip = <&cpu_alert1>;
trip = <&cpu2_3_alert0>;
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
@ -247,12 +247,12 @@ gpu-thermal {
thermal-sensors = <&tsens 2>;
trips {
gpu_alert: trip0 {
gpu_alert0: trip-point@0 {
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
gpu_crit: trip1 {
gpu_crit: gpu_crit {
temperature = <95000>;
hysteresis = <2000>;
type = "critical";
@ -267,18 +267,27 @@ camera-thermal {
thermal-sensors = <&tsens 1>;
trips {
cam_alert: trip0 {
cam_alert0: trip-point@0 {
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
cam_crit: trip1 {
temperature = <95000>;
hysteresis = <2000>;
type = "critical";
type = "hot";
};
};
};
modem-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens 0>;
trips {
modem_alert0: trip-point@0 {
temperature = <85000>;
hysteresis = <2000>;
type = "hot";
};
};
};
};

View File

@ -154,20 +154,20 @@ core1 {
};
thermal-zones {
cpu-thermal0 {
cpu0-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens0 3>;
trips {
cpu_alert0: trip0 {
cpu0_alert0: trip-point@0 {
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit0: trip1 {
cpu0_crit: cpu_crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
@ -175,20 +175,20 @@ cpu_crit0: trip1 {
};
};
cpu-thermal1 {
cpu1-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens0 5>;
trips {
cpu_alert1: trip0 {
cpu1_alert0: trip-point@0 {
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit1: trip1 {
cpu1_crit: cpu_crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
@ -196,20 +196,20 @@ cpu_crit1: trip1 {
};
};
cpu-thermal2 {
cpu2-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens0 8>;
trips {
cpu_alert2: trip0 {
cpu2_alert0: trip-point@0 {
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit2: trip1 {
cpu2_crit: cpu_crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
@ -217,26 +217,176 @@ cpu_crit2: trip1 {
};
};
cpu-thermal3 {
cpu3-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens0 10>;
trips {
cpu_alert3: trip0 {
cpu3_alert0: trip-point@0 {
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit3: trip1 {
cpu3_crit: cpu_crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
};
};
};
gpu-thermal-top {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens1 6>;
trips {
gpu1_alert0: trip-point@0 {
temperature = <90000>;
hysteresis = <2000>;
type = "hot";
};
};
};
gpu-thermal-bottom {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens1 7>;
trips {
gpu2_alert0: trip-point@0 {
temperature = <90000>;
hysteresis = <2000>;
type = "hot";
};
};
};
m4m-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens0 1>;
trips {
m4m_alert0: trip-point@0 {
temperature = <90000>;
hysteresis = <2000>;
type = "hot";
};
};
};
l3-or-venus-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens0 2>;
trips {
l3_or_venus_alert0: trip-point@0 {
temperature = <90000>;
hysteresis = <2000>;
type = "hot";
};
};
};
cluster0-l2-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens0 7>;
trips {
cluster0_l2_alert0: trip-point@0 {
temperature = <90000>;
hysteresis = <2000>;
type = "hot";
};
};
};
cluster1-l2-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens0 12>;
trips {
cluster1_l2_alert0: trip-point@0 {
temperature = <90000>;
hysteresis = <2000>;
type = "hot";
};
};
};
camera-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens1 1>;
trips {
camera_alert0: trip-point@0 {
temperature = <90000>;
hysteresis = <2000>;
type = "hot";
};
};
};
q6-dsp-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens1 2>;
trips {
q6_dsp_alert0: trip-point@0 {
temperature = <90000>;
hysteresis = <2000>;
type = "hot";
};
};
};
mem-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens1 3>;
trips {
mem_alert0: trip-point@0 {
temperature = <90000>;
hysteresis = <2000>;
type = "hot";
};
};
};
modemtx-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens1 4>;
trips {
modemtx_alert0: trip-point@0 {
temperature = <90000>;
hysteresis = <2000>;
type = "hot";
};
};
};
};
timer {

View File

@ -111,6 +111,7 @@ vreg_s3a_1p35: s3 {
vreg_s4a_1p8: s4 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-allow-set-load;
};
vreg_s5a_2p04: s5 {
regulator-min-microvolt = <1904000>;
@ -195,6 +196,7 @@ vreg_l19a_3p0: l19 {
vreg_l20a_2p95: l20 {
regulator-min-microvolt = <2960000>;
regulator-max-microvolt = <2960000>;
regulator-allow-set-load;
};
vreg_l21a_2p95: l21 {
regulator-min-microvolt = <2960000>;
@ -221,6 +223,7 @@ vreg_l25a_3p3: l25 {
vreg_l26a_1p2: l26 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-allow-set-load;
};
vreg_l28_3p0: l28 {
regulator-min-microvolt = <3008000>;
@ -267,6 +270,25 @@ &sdhc2 {
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
};
&ufshc {
vcc-supply = <&vreg_l20a_2p95>;
vccq-supply = <&vreg_l26a_1p2>;
vccq2-supply = <&vreg_s4a_1p8>;
vcc-max-microamp = <750000>;
vccq-max-microamp = <560000>;
vccq2-max-microamp = <750000>;
};
&ufsphy {
vdda-phy-supply = <&vreg_l1a_0p875>;
vdda-pll-supply = <&vreg_l2a_1p2>;
vddp-ref-clk-supply = <&vreg_l26a_1p2>;
vdda-phy-max-microamp = <51400>;
vdda-pll-max-microamp = <14600>;
vddp-ref-clk-max-microamp = <100>;
vddp-ref-clk-always-on;
};
&usb3 {
status = "okay";
};

View File

@ -78,7 +78,6 @@ CPU0: cpu@0 {
compatible = "arm,armv8";
reg = <0x0 0x0>;
enable-method = "psci";
efficiency = <1024>;
next-level-cache = <&L2_0>;
L2_0: l2-cache {
compatible = "arm,arch-cache";
@ -97,7 +96,6 @@ CPU1: cpu@1 {
compatible = "arm,armv8";
reg = <0x0 0x1>;
enable-method = "psci";
efficiency = <1024>;
next-level-cache = <&L2_0>;
L1_I_1: l1-icache {
compatible = "arm,arch-cache";
@ -112,7 +110,6 @@ CPU2: cpu@2 {
compatible = "arm,armv8";
reg = <0x0 0x2>;
enable-method = "psci";
efficiency = <1024>;
next-level-cache = <&L2_0>;
L1_I_2: l1-icache {
compatible = "arm,arch-cache";
@ -127,7 +124,6 @@ CPU3: cpu@3 {
compatible = "arm,armv8";
reg = <0x0 0x3>;
enable-method = "psci";
efficiency = <1024>;
next-level-cache = <&L2_0>;
L1_I_3: l1-icache {
compatible = "arm,arch-cache";
@ -142,7 +138,6 @@ CPU4: cpu@100 {
compatible = "arm,armv8";
reg = <0x0 0x100>;
enable-method = "psci";
efficiency = <1536>;
next-level-cache = <&L2_1>;
L2_1: l2-cache {
compatible = "arm,arch-cache";
@ -161,7 +156,6 @@ CPU5: cpu@101 {
compatible = "arm,armv8";
reg = <0x0 0x101>;
enable-method = "psci";
efficiency = <1536>;
next-level-cache = <&L2_1>;
L1_I_101: l1-icache {
compatible = "arm,arch-cache";
@ -176,7 +170,6 @@ CPU6: cpu@102 {
compatible = "arm,armv8";
reg = <0x0 0x102>;
enable-method = "psci";
efficiency = <1536>;
next-level-cache = <&L2_1>;
L1_I_102: l1-icache {
compatible = "arm,arch-cache";
@ -191,7 +184,6 @@ CPU7: cpu@103 {
compatible = "arm,armv8";
reg = <0x0 0x103>;
enable-method = "psci";
efficiency = <1536>;
next-level-cache = <&L2_1>;
L1_I_103: l1-icache {
compatible = "arm,arch-cache";
@ -346,20 +338,20 @@ slpi_smp2p_in: slave-kernel {
};
thermal-zones {
cpu-thermal0 {
cpu0-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens0 6>;
thermal-sensors = <&tsens0 1>;
trips {
cpu_alert0: trip0 {
cpu0_alert0: trip-point@0 {
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit0: trip1 {
cpu0_crit: cpu_crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
@ -367,20 +359,83 @@ cpu_crit0: trip1 {
};
};
cpu-thermal1 {
cpu1-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens0 2>;
trips {
cpu1_alert0: trip-point@0 {
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
cpu1_crit: cpu_crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
};
};
};
cpu2-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens0 3>;
trips {
cpu2_alert0: trip-point@0 {
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
cpu2_crit: cpu_crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
};
};
};
cpu3-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens0 4>;
trips {
cpu3_alert0: trip-point@0 {
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
cpu3_crit: cpu_crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
};
};
};
cpu4-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens0 7>;
trips {
cpu_alert1: trip0 {
cpu4_alert0: trip-point@0 {
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit1: trip1 {
cpu4_crit: cpu_crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
@ -388,20 +443,20 @@ cpu_crit1: trip1 {
};
};
cpu-thermal2 {
cpu5-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens0 8>;
trips {
cpu_alert2: trip0 {
cpu5_alert0: trip-point@0 {
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit2: trip1 {
cpu5_crit: cpu_crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
@ -409,20 +464,20 @@ cpu_crit2: trip1 {
};
};
cpu-thermal3 {
cpu6-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens0 9>;
trips {
cpu_alert3: trip0 {
cpu6_alert0: trip-point@0 {
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit3: trip1 {
cpu6_crit: cpu_crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
@ -430,20 +485,20 @@ cpu_crit3: trip1 {
};
};
cpu-thermal4 {
cpu7-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens0 10>;
trips {
cpu_alert4: trip0 {
cpu7_alert0: trip-point@0 {
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit4: trip1 {
cpu7_crit: cpu_crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
@ -451,74 +506,169 @@ cpu_crit4: trip1 {
};
};
cpu-thermal5 {
gpu-thermal-bottom {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens0 12>;
trips {
gpu1_alert0: trip-point@0 {
temperature = <90000>;
hysteresis = <2000>;
type = "hot";
};
};
};
gpu-thermal-top {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens0 13>;
trips {
gpu2_alert0: trip-point@0 {
temperature = <90000>;
hysteresis = <2000>;
type = "hot";
};
};
};
cluster0-mhm-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens0 5>;
trips {
cluster0_mhm_alert0: trip-point@0 {
temperature = <90000>;
hysteresis = <2000>;
type = "hot";
};
};
};
cluster1-mhm-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens0 6>;
trips {
cluster1_mhm_alert0: trip-point@0 {
temperature = <90000>;
hysteresis = <2000>;
type = "hot";
};
};
};
cluster1-l2-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens0 11>;
trips {
cpu_alert5: trip0 {
temperature = <75000>;
cluster1_l2_alert0: trip-point@0 {
temperature = <90000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit5: trip1 {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
type = "hot";
};
};
};
cpu-thermal6 {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens1 0>;
trips {
cpu_alert6: trip0 {
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit6: trip1 {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
};
};
};
cpu-thermal7 {
modem-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens1 1>;
trips {
cpu_alert7: trip0 {
temperature = <75000>;
modem_alert0: trip-point@0 {
temperature = <90000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit7: trip1 {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
type = "hot";
};
};
};
gpu-thermal {
mem-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens1 2>;
trips {
mem_alert0: trip-point@0 {
temperature = <90000>;
hysteresis = <2000>;
type = "hot";
};
};
};
wlan-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens1 3>;
trips {
wlan_alert0: trip-point@0 {
temperature = <90000>;
hysteresis = <2000>;
type = "hot";
};
};
};
q6-dsp-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens1 4>;
trips {
q6_dsp_alert0: trip-point@0 {
temperature = <90000>;
hysteresis = <2000>;
type = "hot";
};
};
};
camera-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens1 5>;
trips {
camera_alert0: trip-point@0 {
temperature = <90000>;
hysteresis = <2000>;
type = "hot";
};
};
};
multimedia-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens1 6>;
trips {
multimedia_alert0: trip-point@0 {
temperature = <90000>;
hysteresis = <2000>;
type = "hot";
};
};
};
};
@ -590,17 +740,19 @@ spmi_bus: spmi@800f000 {
cell-index = <0>;
};
tsens0: thermal@10aa000 {
tsens0: thermal@10ab000 {
compatible = "qcom,msm8998-tsens", "qcom,tsens-v2";
reg = <0x10aa000 0x2000>;
reg = <0x10ab000 0x1000>, /* TM */
<0x10aa000 0x1000>; /* SROT */
#qcom,sensors = <12>;
#thermal-sensor-cells = <1>;
};
tsens1: thermal@10ad000 {
tsens1: thermal@10ae000 {
compatible = "qcom,msm8998-tsens", "qcom,tsens-v2";
reg = <0x10ad000 0x2000>;
reg = <0x10ae000 0x1000>, /* TM */
<0x10ad000 0x1000>; /* SROT */
#qcom,sensors = <8>;
#thermal-sensor-cells = <1>;
@ -889,7 +1041,7 @@ blsp2_i2c4: i2c@c1b9000 {
blsp2_i2c5: i2c@c1ba000 {
compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x0c175000 0x600>;
reg = <0x0c1ba000 0x600>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP2_QUP6_I2C_APPS_CLK>,
@ -983,6 +1135,75 @@ intc: interrupt-controller@17a00000 {
redistributor-stride = <0x0 0x20000>;
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
};
ufshc: ufshc@1da4000 {
compatible = "qcom,msm8998-ufshc", "qcom,ufshc", "jedec,ufs-2.0";
reg = <0x01da4000 0x2500>;
interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
phys = <&ufsphy_lanes>;
phy-names = "ufsphy";
lanes-per-direction = <2>;
power-domains = <&gcc UFS_GDSC>;
#reset-cells = <1>;
clock-names =
"core_clk",
"bus_aggr_clk",
"iface_clk",
"core_clk_unipro",
"ref_clk",
"tx_lane0_sync_clk",
"rx_lane0_sync_clk",
"rx_lane1_sync_clk";
clocks =
<&gcc GCC_UFS_AXI_CLK>,
<&gcc GCC_AGGRE1_UFS_AXI_CLK>,
<&gcc GCC_UFS_AHB_CLK>,
<&gcc GCC_UFS_UNIPRO_CORE_CLK>,
<&rpmcc RPM_SMD_LN_BB_CLK1>,
<&gcc GCC_UFS_TX_SYMBOL_0_CLK>,
<&gcc GCC_UFS_RX_SYMBOL_0_CLK>,
<&gcc GCC_UFS_RX_SYMBOL_1_CLK>;
freq-table-hz =
<50000000 200000000>,
<0 0>,
<0 0>,
<37500000 150000000>,
<0 0>,
<0 0>,
<0 0>,
<0 0>;
resets = <&gcc GCC_UFS_BCR>;
reset-names = "rst";
};
ufsphy: phy@1da7000 {
compatible = "qcom,msm8998-qmp-ufs-phy";
reg = <0x01da7000 0x18c>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
clock-names =
"ref",
"ref_aux";
clocks =
<&gcc GCC_UFS_CLKREF_CLK>,
<&gcc GCC_UFS_PHY_AUX_CLK>;
reset-names = "ufsphy";
resets = <&ufshc 0>;
ufsphy_lanes: lanes@1da7400 {
reg = <0x01da7400 0x128>,
<0x01da7600 0x1fc>,
<0x01da7c00 0x1dc>,
<0x01da7800 0x128>,
<0x01da7a00 0x1fc>;
#phy-cells = <0>;
};
};
};
};

View File

@ -15,6 +15,7 @@ pm8005_gpio: gpios@c000 {
compatible = "qcom,pm8005-gpio", "qcom,spmi-gpio";
reg = <0xc000>;
gpio-controller;
gpio-ranges = <&pm8005_gpio 0 0 4>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;

View File

@ -93,6 +93,7 @@ pm8998_gpio: gpios@c000 {
compatible = "qcom,pm8998-gpio", "qcom,spmi-gpio";
reg = <0xc000>;
gpio-controller;
gpio-ranges = <&pm8998_gpio 0 0 26>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;

View File

@ -14,6 +14,7 @@ pmi8994_gpios: gpios@c000 {
compatible = "qcom,pmi8994-gpio", "qcom,spmi-gpio";
reg = <0xc000>;
gpio-controller;
gpio-ranges = <&pmi8994_gpios 0 0 10>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;

View File

@ -13,6 +13,7 @@ pmi8998_gpio: gpios@c000 {
compatible = "qcom,pmi8998-gpio", "qcom,spmi-gpio";
reg = <0xc000>;
gpio-controller;
gpio-ranges = <&pmi8998_gpio 0 0 14>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;

View File

@ -131,4 +131,15 @@ rtc@6000 {
interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
};
};
pms405_1: pms405@1 {
compatible = "qcom,spmi-pmic";
reg = <0x1 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pms405_spmi_regulators: regulators {
compatible = "qcom,pms405-regulators";
};
};
};

View File

@ -7,5 +7,6 @@
/ {
model = "Qualcomm Technologies, Inc. QCS404 EVB 1000";
compatible = "qcom,qcs404-evb";
compatible = "qcom,qcs404-evb-1000", "qcom,qcs404-evb",
"qcom,qcs404";
};

View File

@ -3,9 +3,92 @@
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include "qcs404-evb.dtsi"
/ {
model = "Qualcomm Technologies, Inc. QCS404 EVB 4000";
compatible = "qcom,qcs404-evb";
compatible = "qcom,qcs404-evb-4000", "qcom,qcs404-evb",
"qcom,qcs404";
};
&ethernet {
status = "ok";
snps,reset-gpio = <&tlmm 60 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
snps,reset-delays-us = <0 10000 10000>;
pinctrl-names = "default";
pinctrl-0 = <&ethernet_defaults>;
phy-handle = <&phy1>;
phy-mode = "rgmii";
mdio {
#address-cells = <0x1>;
#size-cells = <0x0>;
compatible = "snps,dwmac-mdio";
phy1: phy@4 {
compatible = "ethernet-phy-ieee802.3-c22";
device_type = "ethernet-phy";
reg = <0x4>;
};
};
};
&tlmm {
ethernet_defaults: ethernet-defaults {
int {
pins = "gpio61";
function = "rgmii_int";
bias-disable;
drive-strength = <2>;
};
mdc {
pins = "gpio76";
function = "rgmii_mdc";
bias-pull-up;
};
mdio {
pins = "gpio75";
function = "rgmii_mdio";
bias-pull-up;
};
tx {
pins = "gpio67", "gpio66", "gpio65", "gpio64";
function = "rgmii_tx";
bias-pull-up;
drive-strength = <16>;
};
rx {
pins = "gpio73", "gpio72", "gpio71", "gpio70";
function = "rgmii_rx";
bias-disable;
drive-strength = <2>;
};
tx-ctl {
pins = "gpio68";
function = "rgmii_ctl";
bias-pull-up;
drive-strength = <16>;
};
rx-ctl {
pins = "gpio74";
function = "rgmii_ctl";
bias-disable;
drive-strength = <2>;
};
tx-ck {
pins = "gpio63";
function = "rgmii_ck";
bias-pull-up;
drive-strength = <16>;
};
rx-ck {
pins = "gpio69";
function = "rgmii_ck";
bias-disable;
drive-strength = <2>;
};
};
};

View File

@ -7,6 +7,7 @@
/ {
aliases {
serial0 = &blsp1_uart2;
serial1 = &blsp1_uart3;
};
chosen {
@ -19,6 +20,52 @@ vph_pwr: vph-pwr-regulator {
regulator-always-on;
regulator-boot-on;
};
vdd_ch0_3p3:
vdd_esmps3_3p3: vdd-esmps3-3p3-regulator {
compatible = "regulator-fixed";
regulator-name = "eSMPS3_3P3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
&blsp1_uart3 {
status = "okay";
bluetooth {
compatible = "qcom,wcn3990-bt";
vddio-supply = <&vreg_l6_1p8>;
vddxo-supply = <&vreg_l5_1p8>;
vddrf-supply = <&vreg_l1_1p3>;
vddch0-supply = <&vdd_ch0_3p3>;
local-bd-address = [ 02 00 00 00 5a ad ];
max-speed = <3200000>;
};
};
&blsp1_dma {
qcom,controlled-remotely;
};
&blsp2_dma {
qcom,controlled-remotely;
};
&pms405_spmi_regulators {
vdd_s3-supply = <&pms405_s3>;
pms405_s3: s3 {
regulator-always-on;
regulator-boot-on;
regulator-name = "vdd_apc";
regulator-min-microvolt = <1048000>;
regulator-max-microvolt = <1352000>;
};
};
&remoteproc_adsp {
@ -37,18 +84,18 @@ &rpm_requests {
pms405-regulators {
compatible = "qcom,rpm-pms405-regulators";
vdd-s1-supply = <&vph_pwr>;
vdd-s2-supply = <&vph_pwr>;
vdd-s3-supply = <&vph_pwr>;
vdd-s4-supply = <&vph_pwr>;
vdd-s5-supply = <&vph_pwr>;
vdd-l1-l2-supply = <&vreg_s5_1p35>;
vdd-l3-l8-supply = <&vreg_s5_1p35>;
vdd-l4-supply = <&vreg_s5_1p35>;
vdd-l5-l6-supply = <&vreg_s4_1p8>;
vdd-l7-supply = <&vph_pwr>;
vdd-l9-supply = <&vreg_s5_1p35>;
vdd-l10-l11-l12-l13-supply = <&vph_pwr>;
vdd_s1-supply = <&vph_pwr>;
vdd_s2-supply = <&vph_pwr>;
vdd_s3-supply = <&vph_pwr>;
vdd_s4-supply = <&vph_pwr>;
vdd_s5-supply = <&vph_pwr>;
vdd_l1_l2-supply = <&vreg_s5_1p35>;
vdd_l3_l8-supply = <&vreg_s5_1p35>;
vdd_l4-supply = <&vreg_s5_1p35>;
vdd_l5_l6-supply = <&vreg_s4_1p8>;
vdd_l7-supply = <&vph_pwr>;
vdd_l9-supply = <&vreg_s5_1p35>;
vdd_l10_l11_l12_l13-supply = <&vph_pwr>;
vreg_s4_1p8: s4 {
regulator-min-microvolt = <1728000>;
@ -56,8 +103,8 @@ vreg_s4_1p8: s4 {
};
vreg_s5_1p35: s5 {
regulator-min-microvolt = <>;
regulator-max-microvolt = <>;
regulator-min-microvolt = <1352000>;
regulator-max-microvolt = <1352000>;
};
vreg_l1_1p3: l1 {
@ -71,7 +118,7 @@ vreg_l2_1p275: l2 {
};
vreg_l3_1p05: l3 {
regulator-min-microvolt = <976000>;
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1160000>;
};
@ -205,3 +252,21 @@ tx {
bias-disable;
};
};
&blsp1_uart3_default {
cts {
pins = "gpio84";
bias-disable;
};
rts-tx {
pins = "gpio85", "gpio82";
drive-strength = <2>;
bias-disable;
};
rx {
pins = "gpio83";
bias-pull-up;
};
};

View File

@ -435,7 +435,6 @@ blsp1_dma: dma@7884000 {
clocks = <&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "bam_clk";
#dma-cells = <1>;
qcom,controlled-remotely = <1>;
qcom,ee = <0>;
status = "okay";
};
@ -479,6 +478,27 @@ blsp1_uart2: serial@78b1000 {
status = "okay";
};
ethernet: ethernet@7a80000 {
compatible = "qcom,qcs404-ethqos";
reg = <0x07a80000 0x10000>,
<0x07a96000 0x100>;
reg-names = "stmmaceth", "rgmii";
clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii";
clocks = <&gcc GCC_ETH_AXI_CLK>,
<&gcc GCC_ETH_SLAVE_AHB_CLK>,
<&gcc GCC_ETH_PTP_CLK>,
<&gcc GCC_ETH_RGMII_CLK>;
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq", "eth_lpi";
snps,tso;
rx-fifo-depth = <4096>;
tx-fifo-depth = <4096>;
status = "disabled";
};
wifi: wifi@a000000 {
compatible = "qcom,wcn3990-wifi";
reg = <0xa000000 0x800000>;
@ -659,7 +679,6 @@ blsp2_dma: dma@7ac4000 {
clocks = <&gcc GCC_BLSP2_AHB_CLK>;
clock-names = "bam_clk";
#dma-cells = <1>;
qcom,controlled-remotely = <1>;
qcom,ee = <0>;
status = "disabled";
};

View File

@ -48,6 +48,10 @@ vreg_s4a_1p8: pm8998-smps4 {
};
};
&adsp_pas {
status = "okay";
};
&apps_rsc {
pm8998-rpmh-regulators {
compatible = "qcom,pm8998-rpmh-regulators";
@ -344,6 +348,10 @@ vreg_s3c_0p6: smps3 {
};
};
&cdsp_pas {
status = "okay";
};
&gcc {
protected-clocks = <GCC_QSPI_CORE_CLK>,
<GCC_QSPI_CORE_CLK_SRC>,

View File

@ -11,8 +11,10 @@
#include <dt-bindings/clock/qcom,lpass-sdm845.h>
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/clock/qcom,videocc-sdm845.h>
#include <dt-bindings/interconnect/qcom,sdm845.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/phy/phy-qcom-qusb2.h>
#include <dt-bindings/power/qcom-rpmpd.h>
#include <dt-bindings/reset/qcom,sdm845-aoss.h>
#include <dt-bindings/reset/qcom,sdm845-pdc.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
@ -73,29 +75,78 @@ reserved-memory {
#size-cells = <2>;
ranges;
memory@85fc0000 {
hyp_mem: memory@85700000 {
reg = <0 0x85700000 0 0x600000>;
no-map;
};
xbl_mem: memory@85e00000 {
reg = <0 0x85e00000 0 0x100000>;
no-map;
};
aop_mem: memory@85fc0000 {
reg = <0 0x85fc0000 0 0x20000>;
no-map;
};
memory@85fe0000 {
aop_cmd_db_mem: memory@85fe0000 {
compatible = "qcom,cmd-db";
reg = <0x0 0x85fe0000 0x0 0x20000>;
reg = <0x0 0x85fe0000 0 0x20000>;
no-map;
};
smem_mem: memory@86000000 {
reg = <0x0 0x86000000 0x0 0x200000>;
reg = <0x0 0x86000000 0 0x200000>;
no-map;
};
memory@86200000 {
tz_mem: memory@86200000 {
reg = <0 0x86200000 0 0x2d00000>;
no-map;
};
wlan_msa_mem: memory@96700000 {
reg = <0 0x96700000 0 0x100000>;
rmtfs_mem: memory@88f00000 {
compatible = "qcom,rmtfs-mem";
reg = <0 0x88f00000 0 0x200000>;
no-map;
qcom,client-id = <1>;
qcom,vmid = <15>;
};
qseecom_mem: memory@8ab00000 {
reg = <0 0x8ab00000 0 0x1400000>;
no-map;
};
camera_mem: memory@8bf00000 {
reg = <0 0x8bf00000 0 0x500000>;
no-map;
};
ipa_fw_mem: memory@8c400000 {
reg = <0 0x8c400000 0 0x10000>;
no-map;
};
ipa_gsi_mem: memory@8c410000 {
reg = <0 0x8c410000 0 0x5000>;
no-map;
};
gpu_mem: memory@8c415000 {
reg = <0 0x8c415000 0 0x2000>;
no-map;
};
adsp_mem: memory@8c500000 {
reg = <0 0x8c500000 0 0x1a00000>;
no-map;
};
wlan_msa_mem: memory@8df00000 {
reg = <0 0x8df00000 0 0x100000>;
no-map;
};
@ -104,10 +155,30 @@ mpss_region: memory@8e000000 {
no-map;
};
venus_mem: memory@95800000 {
reg = <0 0x95800000 0 0x500000>;
no-map;
};
cdsp_mem: memory@95d00000 {
reg = <0 0x95d00000 0 0x800000>;
no-map;
};
mba_region: memory@96500000 {
reg = <0 0x96500000 0 0x200000>;
no-map;
};
slpi_mem: memory@96700000 {
reg = <0 0x96700000 0 0x1400000>;
no-map;
};
spss_mem: memory@97b00000 {
reg = <0 0x97b00000 0 0x100000>;
no-map;
};
};
cpus {
@ -264,6 +335,64 @@ scm {
};
};
adsp_pas: remoteproc-adsp {
compatible = "qcom,sdm845-adsp-pas";
interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>,
<&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
<&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
<&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
<&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "wdog", "fatal", "ready",
"handover", "stop-ack";
clocks = <&rpmhcc RPMH_CXO_CLK>;
clock-names = "xo";
memory-region = <&adsp_mem>;
qcom,smem-states = <&adsp_smp2p_out 0>;
qcom,smem-state-names = "stop";
status = "disabled";
glink-edge {
interrupts = <GIC_SPI 156 IRQ_TYPE_EDGE_RISING>;
label = "lpass";
qcom,remote-pid = <2>;
mboxes = <&apss_shared 8>;
};
};
cdsp_pas: remoteproc-cdsp {
compatible = "qcom,sdm845-cdsp-pas";
interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>,
<&cdsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
<&cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
<&cdsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
<&cdsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "wdog", "fatal", "ready",
"handover", "stop-ack";
clocks = <&rpmhcc RPMH_CXO_CLK>;
clock-names = "xo";
memory-region = <&cdsp_mem>;
qcom,smem-states = <&cdsp_smp2p_out 0>;
qcom,smem-state-names = "stop";
status = "disabled";
glink-edge {
interrupts = <GIC_SPI 574 IRQ_TYPE_EDGE_RISING>;
label = "turing";
qcom,remote-pid = <5>;
mboxes = <&apss_shared 4>;
};
};
tcsr_mutex: hwlock {
compatible = "qcom,tcsr-mutex";
syscon = <&tcsr_mutex_regs 0 0x1000>;
@ -1033,6 +1162,7 @@ ufs_mem_hc: ufshc@1d84000 {
phy-names = "ufsphy";
lanes-per-direction = <2>;
power-domains = <&gcc UFS_PHY_GDSC>;
#reset-cells = <1>;
iommus = <&apps_smmu 0x100 0xf>;
@ -1078,6 +1208,8 @@ ufs_mem_phy: phy@1d87000 {
clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>,
<&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
resets = <&ufs_mem_hc 0>;
reset-names = "ufsphy";
status = "disabled";
ufs_mem_phy_lanes: lanes@1d87400 {
@ -2098,43 +2230,43 @@ rpmhpd_opp_table: opp-table {
compatible = "operating-points-v2";
rpmhpd_opp_ret: opp1 {
opp-level = <16>;
opp-level = <RPMH_REGULATOR_LEVEL_RETENTION>;
};
rpmhpd_opp_min_svs: opp2 {
opp-level = <48>;
opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>;
};
rpmhpd_opp_low_svs: opp3 {
opp-level = <64>;
opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
};
rpmhpd_opp_svs: opp4 {
opp-level = <128>;
opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
};
rpmhpd_opp_svs_l1: opp5 {
opp-level = <192>;
opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
};
rpmhpd_opp_nom: opp6 {
opp-level = <256>;
opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
};
rpmhpd_opp_nom_l1: opp7 {
opp-level = <320>;
opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
};
rpmhpd_opp_nom_l2: opp8 {
opp-level = <336>;
opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>;
};
rpmhpd_opp_turbo: opp9 {
opp-level = <384>;
opp-level = <RPMH_REGULATOR_LEVEL_TURBO>;
};
rpmhpd_opp_turbo_l1: opp10 {
opp-level = <416>;
opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
};
};
};
@ -2611,5 +2743,210 @@ map1 {
};
};
};
aoss0-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens0 0>;
trips {
aoss0_alert0: trip-point@0 {
temperature = <90000>;
hysteresis = <2000>;
type = "hot";
};
};
};
cluster0-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens0 5>;
trips {
cluster0_alert0: trip-point@0 {
temperature = <90000>;
hysteresis = <2000>;
type = "hot";
};
cluster0_crit: cluster0_crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
};
};
};
cluster1-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens0 6>;
trips {
cluster1_alert0: trip-point@0 {
temperature = <90000>;
hysteresis = <2000>;
type = "hot";
};
cluster1_crit: cluster1_crit {
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
};
};
};
gpu-thermal-top {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens0 11>;
trips {
gpu1_alert0: trip-point@0 {
temperature = <90000>;
hysteresis = <2000>;
type = "hot";
};
};
};
gpu-thermal-bottom {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens0 12>;
trips {
gpu2_alert0: trip-point@0 {
temperature = <90000>;
hysteresis = <2000>;
type = "hot";
};
};
};
aoss1-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens1 0>;
trips {
aoss1_alert0: trip-point@0 {
temperature = <90000>;
hysteresis = <2000>;
type = "hot";
};
};
};
q6-modem-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens1 1>;
trips {
q6_modem_alert0: trip-point@0 {
temperature = <90000>;
hysteresis = <2000>;
type = "hot";
};
};
};
mem-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens1 2>;
trips {
mem_alert0: trip-point@0 {
temperature = <90000>;
hysteresis = <2000>;
type = "hot";
};
};
};
wlan-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens1 3>;
trips {
wlan_alert0: trip-point@0 {
temperature = <90000>;
hysteresis = <2000>;
type = "hot";
};
};
};
q6-hvx-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens1 4>;
trips {
q6_hvx_alert0: trip-point@0 {
temperature = <90000>;
hysteresis = <2000>;
type = "hot";
};
};
};
camera-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens1 5>;
trips {
camera_alert0: trip-point@0 {
temperature = <90000>;
hysteresis = <2000>;
type = "hot";
};
};
};
video-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens1 6>;
trips {
video_alert0: trip-point@0 {
temperature = <90000>;
hysteresis = <2000>;
type = "hot";
};
};
};
modem-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens1 7>;
trips {
modem_alert0: trip-point@0 {
temperature = <90000>;
hysteresis = <2000>;
type = "hot";
};
};
};
};
};