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ARM: EXYNOS: Support cluster power off on exynos5420/5800
Turning off a cluster when all 4 cores of the cluster are powered off saves power significantly. Powering off the A15 L2 alone gives around 100mW in savings. Add support for powering off the A15/A7 clusters on exynos5420/5800. The patch enables specific register bits which ensure that: - cluster L2 will be turned on before the first man is powered up. - last man will be turned off before the cluster L2 is turned off. - core is powered down before powering it up. Remove the exynos_cluster_power_control function completely as we can rely on the above mentioned bits rather than polling the cluster power status register. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Acked-by: Nicolas Pitre <nico@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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@ -26,6 +26,10 @@
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#define EXYNOS5420_CPUS_PER_CLUSTER 4
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#define EXYNOS5420_NR_CLUSTERS 2
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#define EXYNOS5420_ENABLE_AUTOMATIC_CORE_DOWN BIT(9)
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#define EXYNOS5420_USE_ARM_CORE_DOWN_STATE BIT(29)
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#define EXYNOS5420_USE_L2_COMMON_UP_STATE BIT(30)
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/*
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* The common v7_exit_coherency_flush API could not be used because of the
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* Erratum 799270 workaround. This macro is the same as the common one (in
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@ -73,36 +77,9 @@ cpu_use_count[EXYNOS5420_CPUS_PER_CLUSTER][EXYNOS5420_NR_CLUSTERS];
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#define exynos_cluster_unused(cluster) !exynos_cluster_usecnt(cluster)
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static int exynos_cluster_power_control(unsigned int cluster, int enable)
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{
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unsigned int tries = 100;
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unsigned int val;
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if (enable) {
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exynos_cluster_power_up(cluster);
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val = S5P_CORE_LOCAL_PWR_EN;
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} else {
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exynos_cluster_power_down(cluster);
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val = 0;
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}
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/* Wait until cluster power control is applied */
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while (tries--) {
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if (exynos_cluster_power_state(cluster) == val)
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return 0;
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cpu_relax();
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}
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pr_debug("timed out waiting for cluster %u to power %s\n", cluster,
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enable ? "on" : "off");
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return -ETIMEDOUT;
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}
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static int exynos_power_up(unsigned int cpu, unsigned int cluster)
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{
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unsigned int cpunr = cpu + (cluster * EXYNOS5420_CPUS_PER_CLUSTER);
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int err = 0;
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pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster);
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if (cpu >= EXYNOS5420_CPUS_PER_CLUSTER ||
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@ -126,12 +103,9 @@ static int exynos_power_up(unsigned int cpu, unsigned int cluster)
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* cores.
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*/
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if (was_cluster_down)
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err = exynos_cluster_power_control(cluster, 1);
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exynos_cluster_power_up(cluster);
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if (!err)
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exynos_cpu_power_up(cpunr);
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else
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exynos_cluster_power_control(cluster, 0);
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exynos_cpu_power_up(cpunr);
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} else if (cpu_use_count[cpu][cluster] != 2) {
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/*
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* The only possible values are:
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@ -147,7 +121,7 @@ static int exynos_power_up(unsigned int cpu, unsigned int cluster)
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arch_spin_unlock(&exynos_mcpm_lock);
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local_irq_enable();
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return err;
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return 0;
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}
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/*
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@ -178,9 +152,10 @@ static void exynos_power_down(void)
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if (cpu_use_count[cpu][cluster] == 0) {
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exynos_cpu_power_down(cpunr);
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if (exynos_cluster_unused(cluster))
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/* TODO: Turn off the cluster here to save power. */
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if (exynos_cluster_unused(cluster)) {
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exynos_cluster_power_down(cluster);
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last_man = true;
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}
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} else if (cpu_use_count[cpu][cluster] == 1) {
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/*
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* A power_up request went ahead of us.
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@ -335,6 +310,7 @@ static int __init exynos_mcpm_init(void)
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{
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struct device_node *node;
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void __iomem *ns_sram_base_addr;
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unsigned int value, i;
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int ret;
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node = of_find_matching_node(NULL, exynos_dt_mcpm_match);
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@ -377,6 +353,26 @@ static int __init exynos_mcpm_init(void)
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pr_info("Exynos MCPM support installed\n");
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/*
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* On Exynos5420/5800 for the A15 and A7 clusters:
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*
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* EXYNOS5420_ENABLE_AUTOMATIC_CORE_DOWN ensures that all the cores
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* in a cluster are turned off before turning off the cluster L2.
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*
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* EXYNOS5420_USE_ARM_CORE_DOWN_STATE ensures that a cores is powered
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* off before waking it up.
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*
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* EXYNOS5420_USE_L2_COMMON_UP_STATE ensures that cluster L2 will be
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* turned on before the first man is powered up.
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*/
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for (i = 0; i < EXYNOS5420_NR_CLUSTERS; i++) {
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value = __raw_readl(EXYNOS_COMMON_OPTION(i));
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value |= EXYNOS5420_ENABLE_AUTOMATIC_CORE_DOWN |
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EXYNOS5420_USE_ARM_CORE_DOWN_STATE |
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EXYNOS5420_USE_L2_COMMON_UP_STATE;
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__raw_writel(value, EXYNOS_COMMON_OPTION(i));
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}
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/*
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* U-Boot SPL is hardcoded to jump to the start of ns_sram_base_addr
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* as part of secondary_cpu_start(). Let's redirect it to the
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@ -116,6 +116,8 @@
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(EXYNOS_ARM_COMMON_CONFIGURATION + (0x80 * (_nr)))
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#define EXYNOS_COMMON_STATUS(_nr) \
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(EXYNOS_COMMON_CONFIGURATION(_nr) + 0x4)
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#define EXYNOS_COMMON_OPTION(_nr) \
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(EXYNOS_COMMON_CONFIGURATION(_nr) + 0x8)
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#define S5P_PAD_RET_MAUDIO_OPTION S5P_PMUREG(0x3028)
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#define S5P_PAD_RET_GPIO_OPTION S5P_PMUREG(0x3108)
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