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PCI: artpec6: Use generic DesignWare accessors
The dw_pcie_readl_rc() and dw_pcie_writel_rc() interfaces already add in pp->dbi_base, so use those instead of doing it ourselves in the armada8k driver. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>
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@ -139,7 +139,7 @@ static int artpec6_pcie_establish_link(struct pcie_port *pp)
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* Enable writing to config regs. This is required as the Synopsys
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* driver changes the class code. That register needs DBI write enable.
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*/
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writel(DBI_RO_WR_EN, pp->dbi_base + MISC_CONTROL_1_OFF);
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dw_pcie_writel_rc(pp, MISC_CONTROL_1_OFF, DBI_RO_WR_EN);
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pp->io_base &= ARTPEC6_CPU_TO_BUS_ADDR;
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pp->mem_base &= ARTPEC6_CPU_TO_BUS_ADDR;
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@ -159,8 +159,8 @@ static int artpec6_pcie_establish_link(struct pcie_port *pp)
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return 0;
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dev_dbg(pp->dev, "DEBUG_R0: 0x%08x, DEBUG_R1: 0x%08x\n",
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readl(pp->dbi_base + PCIE_PHY_DEBUG_R0),
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readl(pp->dbi_base + PCIE_PHY_DEBUG_R1));
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dw_pcie_readl_rc(pp, PCIE_PHY_DEBUG_R0),
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dw_pcie_readl_rc(pp, PCIE_PHY_DEBUG_R1));
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return -ETIMEDOUT;
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}
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