2005-04-17 05:20:36 +07:00
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#
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# For a description of the syntax of this configuration file,
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# see Documentation/kbuild/kconfig-language.txt.
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#
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mainmenu "Linux Kernel Configuration"
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config ARM
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bool
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default y
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2008-06-17 18:19:34 +07:00
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select HAVE_AOUT
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2008-04-29 04:44:43 +07:00
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select HAVE_IDE
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2006-03-27 16:16:35 +07:00
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select RTC_LIB
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2007-02-10 00:08:58 +07:00
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select SYS_SUPPORTS_APM_EMULATION
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2008-02-03 03:10:34 +07:00
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select HAVE_OPROFILE
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2008-02-21 02:33:40 +07:00
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select HAVE_ARCH_KGDB
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2008-02-03 03:10:35 +07:00
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select HAVE_KPROBES if (!XIP_KERNEL)
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2008-03-05 05:28:37 +07:00
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select HAVE_KRETPROBES if (HAVE_KPROBES)
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2008-10-07 06:06:12 +07:00
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select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
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2008-07-18 16:30:14 +07:00
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select HAVE_GENERIC_DMA_COHERENT
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2005-04-17 05:20:36 +07:00
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help
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The ARM series is a line of low-power-consumption RISC chip designs
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2006-02-09 04:09:07 +07:00
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licensed by ARM Ltd and targeted at embedded applications and
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2005-04-17 05:20:36 +07:00
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handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
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2006-02-09 04:09:07 +07:00
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manufactured, but legacy ARM-based PC hardware remains popular in
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2005-04-17 05:20:36 +07:00
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Europe. There is an ARM Linux project with a web page at
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<http://www.arm.linux.org.uk/>.
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2008-04-14 03:41:55 +07:00
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config HAVE_PWM
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bool
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2007-02-10 00:08:58 +07:00
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config SYS_SUPPORTS_APM_EMULATION
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bool
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2007-03-05 15:30:18 +07:00
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config GENERIC_GPIO
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bool
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default n
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2006-09-22 06:16:30 +07:00
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config GENERIC_TIME
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bool
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default n
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2007-03-14 02:29:24 +07:00
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config GENERIC_CLOCKEVENTS
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bool
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default n
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2008-02-04 23:30:57 +07:00
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config GENERIC_CLOCKEVENTS_BROADCAST
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bool
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depends on GENERIC_CLOCKEVENTS
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default y if SMP && !LOCAL_TIMERS
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2005-04-17 05:20:36 +07:00
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config MMU
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bool
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default y
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2007-02-11 22:41:31 +07:00
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config NO_IOPORT
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bool
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default n
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2005-04-17 05:20:36 +07:00
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config EISA
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bool
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---help---
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The Extended Industry Standard Architecture (EISA) bus was
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developed as an open alternative to the IBM MicroChannel bus.
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The EISA bus provided some of the features of the IBM MicroChannel
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bus while maintaining backward compatibility with cards made for
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the older ISA bus. The EISA bus saw limited use between 1988 and
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1995 when it was made obsolete by the PCI bus.
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Say Y here if you are building a kernel for an EISA-based machine.
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Otherwise, say N.
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config SBUS
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bool
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config MCA
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bool
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help
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MicroChannel Architecture is found in some IBM PS/2 machines and
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laptops. It is a bus system similar to PCI or ISA. See
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<file:Documentation/mca.txt> (and especially the web page given
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there) before attempting to build an MCA bus kernel.
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2006-07-02 04:30:09 +07:00
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config GENERIC_HARDIRQS
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bool
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default y
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2007-04-28 15:59:37 +07:00
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config STACKTRACE_SUPPORT
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bool
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default y
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2008-04-24 12:31:46 +07:00
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config HAVE_LATENCYTOP_SUPPORT
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bool
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depends on !SMP
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default y
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2007-04-28 15:59:37 +07:00
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config LOCKDEP_SUPPORT
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bool
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default y
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2006-08-27 18:07:02 +07:00
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config TRACE_IRQFLAGS_SUPPORT
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bool
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default y
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2006-07-02 04:30:09 +07:00
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config HARDIRQS_SW_RESEND
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bool
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default y
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config GENERIC_IRQ_PROBE
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bool
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default y
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2008-01-30 19:31:20 +07:00
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config GENERIC_LOCKBREAK
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bool
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default y
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depends on SMP && PREEMPT
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2005-04-17 05:20:36 +07:00
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config RWSEM_GENERIC_SPINLOCK
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bool
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default y
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config RWSEM_XCHGADD_ALGORITHM
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bool
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2006-12-08 17:37:49 +07:00
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config ARCH_HAS_ILOG2_U32
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bool
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default n
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config ARCH_HAS_ILOG2_U64
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bool
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default n
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2006-03-26 16:39:19 +07:00
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config GENERIC_HWEIGHT
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bool
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default y
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2005-04-17 05:20:36 +07:00
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config GENERIC_CALIBRATE_DELAY
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bool
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default y
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2005-09-06 07:48:42 +07:00
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config ARCH_MAY_HAVE_PC_FDC
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bool
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2007-02-10 16:43:14 +07:00
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config ZONE_DMA
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bool
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2005-04-17 05:20:36 +07:00
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config GENERIC_ISA_DMA
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bool
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config FIQ
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bool
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2005-12-20 04:27:59 +07:00
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config ARCH_MTD_XIP
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bool
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2008-06-25 19:33:14 +07:00
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config GENERIC_HARDIRQS_NO__DO_IRQ
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def_bool y
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2008-02-03 03:10:32 +07:00
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if OPROFILE
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config OPROFILE_ARMV6
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def_bool y
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depends on CPU_V6 && !SMP
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select OPROFILE_ARM11_CORE
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config OPROFILE_MPCORE
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def_bool y
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depends on CPU_V6 && SMP
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select OPROFILE_ARM11_CORE
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config OPROFILE_ARM11_CORE
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bool
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2008-08-13 01:07:39 +07:00
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config OPROFILE_ARMV7
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def_bool y
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depends on CPU_V7 && !SMP
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bool
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2008-02-03 03:10:32 +07:00
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endif
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2006-03-27 21:18:50 +07:00
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config VECTORS_BASE
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hex
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2006-09-28 19:46:34 +07:00
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default 0xffff0000 if MMU || CPU_HIGH_VECTOR
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2006-03-27 21:18:50 +07:00
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default DRAM_BASE if REMAP_VECTORS_TO_RAM
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default 0x00000000
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help
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The base address of exception vectors.
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2005-04-17 05:20:36 +07:00
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source "init/Kconfig"
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2008-10-19 10:27:21 +07:00
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source "kernel/Kconfig.freezer"
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2005-04-17 05:20:36 +07:00
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menu "System Type"
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choice
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prompt "ARM system type"
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2006-03-07 21:42:27 +07:00
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default ARCH_VERSATILE
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2005-04-17 05:20:36 +07:00
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2006-06-21 03:30:44 +07:00
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config ARCH_AAEC2000
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bool "Agilent AAEC-2000 based"
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2008-10-26 17:55:14 +07:00
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select CPU_ARM920T
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2006-06-21 03:30:44 +07:00
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select ARM_AMBA
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2008-07-24 11:26:48 +07:00
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select HAVE_CLK
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2006-06-21 03:30:44 +07:00
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help
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This enables support for systems based on the Agilent AAEC-2000
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config ARCH_INTEGRATOR
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bool "ARM Ltd. Integrator family"
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select ARM_AMBA
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2008-07-24 11:26:48 +07:00
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select HAVE_CLK
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2008-11-09 03:08:08 +07:00
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select COMMON_CLKDEV
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2006-06-21 03:30:44 +07:00
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select ICST525
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help
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Support for ARM's Integrator platform.
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config ARCH_REALVIEW
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bool "ARM Ltd. RealView family"
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select ARM_AMBA
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2008-07-24 11:26:48 +07:00
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select HAVE_CLK
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2008-11-09 03:05:55 +07:00
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select COMMON_CLKDEV
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2006-06-21 03:30:44 +07:00
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select ICST307
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2008-02-04 23:24:54 +07:00
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select GENERIC_TIME
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2008-02-04 23:26:55 +07:00
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select GENERIC_CLOCKEVENTS
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2006-06-21 03:30:44 +07:00
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help
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This enables support for ARM Ltd RealView boards.
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config ARCH_VERSATILE
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bool "ARM Ltd. Versatile family"
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select ARM_AMBA
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select ARM_VIC
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2008-07-24 11:26:48 +07:00
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select HAVE_CLK
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2008-11-09 03:13:53 +07:00
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select COMMON_CLKDEV
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2006-06-21 03:30:44 +07:00
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select ICST307
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2007-03-09 02:25:13 +07:00
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select GENERIC_TIME
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2007-03-09 02:30:38 +07:00
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select GENERIC_CLOCKEVENTS
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2006-06-21 03:30:44 +07:00
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help
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This enables support for ARM Ltd Versatile board.
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2006-06-29 22:06:33 +07:00
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config ARCH_AT91
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bool "Atmel AT91"
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2007-03-05 15:30:18 +07:00
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select GENERIC_GPIO
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2009-02-11 03:02:08 +07:00
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select ARCH_REQUIRE_GPIOLIB
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2008-07-29 05:46:22 +07:00
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select HAVE_CLK
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2006-06-21 03:30:44 +07:00
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help
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2008-01-24 21:10:39 +07:00
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This enables support for systems based on the Atmel AT91RM9200,
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AT91SAM9 and AT91CAP9 processors.
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2006-06-21 03:30:44 +07:00
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2005-04-17 05:20:36 +07:00
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config ARCH_CLPS711X
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2006-06-21 03:30:44 +07:00
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bool "Cirrus Logic CLPS711x/EP721x-based"
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2008-10-26 17:55:14 +07:00
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select CPU_ARM720T
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2006-02-09 04:09:05 +07:00
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help
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Support for Cirrus Logic 711x/721x based boards.
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2005-04-17 05:20:36 +07:00
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config ARCH_EBSA110
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bool "EBSA-110"
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2008-10-26 17:55:14 +07:00
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select CPU_SA110
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2005-05-05 20:49:01 +07:00
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select ISA
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2007-03-03 18:54:19 +07:00
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select NO_IOPORT
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2005-04-17 05:20:36 +07:00
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help
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This is an evaluation board for the StrongARM processor available
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2006-02-09 04:09:07 +07:00
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from Digital. It has limited hardware on-board, including an
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2005-04-17 05:20:36 +07:00
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Ethernet interface, two PCMCIA sockets, two serial ports and a
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parallel port.
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[ARM] 3369/1: ep93xx: add core cirrus ep93xx support
Patch from Lennert Buytenhek
This patch adds support for the Cirrus ep93xx series of CPUs. The
ep93xx is an ARM920T based CPU with two VICs, PL010 based UARTs,
IrDA, MaverickCrunch floating point coprocessor, between 24 and 64
GPIOs, ethernet, OHCI USB and, depending on the model, pcmcia, raster
engine, graphics accelerator, IDE controller and a bunch of other
stuff.
This patch adds the core ep93xx support code, and support for the
Glomation GESBC-9312-sx and the Technologic Systems TS-72xx SBCs.
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-03-21 00:10:13 +07:00
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config ARCH_EP93XX
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bool "EP93xx-based"
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2008-10-26 17:55:14 +07:00
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select CPU_ARM920T
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[ARM] 3369/1: ep93xx: add core cirrus ep93xx support
Patch from Lennert Buytenhek
This patch adds support for the Cirrus ep93xx series of CPUs. The
ep93xx is an ARM920T based CPU with two VICs, PL010 based UARTs,
IrDA, MaverickCrunch floating point coprocessor, between 24 and 64
GPIOs, ethernet, OHCI USB and, depending on the model, pcmcia, raster
engine, graphics accelerator, IDE controller and a bunch of other
stuff.
This patch adds the core ep93xx support code, and support for the
Glomation GESBC-9312-sx and the Technologic Systems TS-72xx SBCs.
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-03-21 00:10:13 +07:00
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select ARM_AMBA
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select ARM_VIC
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2007-11-27 00:41:02 +07:00
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select GENERIC_GPIO
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2008-07-24 11:26:48 +07:00
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select HAVE_CLK
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2008-12-01 00:11:49 +07:00
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select COMMON_CLKDEV
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2008-07-25 15:46:11 +07:00
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select ARCH_REQUIRE_GPIOLIB
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2009-05-13 23:34:48 +07:00
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select ARCH_HAS_HOLES_MEMORYMODEL
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[ARM] 3369/1: ep93xx: add core cirrus ep93xx support
Patch from Lennert Buytenhek
This patch adds support for the Cirrus ep93xx series of CPUs. The
ep93xx is an ARM920T based CPU with two VICs, PL010 based UARTs,
IrDA, MaverickCrunch floating point coprocessor, between 24 and 64
GPIOs, ethernet, OHCI USB and, depending on the model, pcmcia, raster
engine, graphics accelerator, IDE controller and a bunch of other
stuff.
This patch adds the core ep93xx support code, and support for the
Glomation GESBC-9312-sx and the Technologic Systems TS-72xx SBCs.
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-03-21 00:10:13 +07:00
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help
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This enables support for the Cirrus EP93xx series of CPUs.
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2009-03-26 15:06:08 +07:00
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config ARCH_GEMINI
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bool "Cortina Systems Gemini"
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select CPU_FA526
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2009-03-26 15:06:27 +07:00
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select GENERIC_GPIO
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select ARCH_REQUIRE_GPIOLIB
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2009-03-26 15:06:08 +07:00
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help
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Support for the Cortina Systems Gemini family SoCs
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2005-04-17 05:20:36 +07:00
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config ARCH_FOOTBRIDGE
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bool "FootBridge"
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2008-10-26 17:55:14 +07:00
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select CPU_SA110
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2005-04-17 05:20:36 +07:00
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select FOOTBRIDGE
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2006-02-09 04:09:05 +07:00
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help
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Support for systems based on the DC21285 companion chip
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("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
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2005-04-17 05:20:36 +07:00
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2006-06-21 03:30:44 +07:00
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config ARCH_NETX
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bool "Hilscher NetX based"
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2008-10-26 17:55:14 +07:00
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select CPU_ARM926T
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2006-06-21 03:30:44 +07:00
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select ARM_VIC
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2008-12-10 03:57:24 +07:00
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select GENERIC_CLOCKEVENTS
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2008-12-10 03:57:23 +07:00
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select GENERIC_TIME
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2006-02-09 04:09:05 +07:00
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|
help
|
2006-06-21 03:30:44 +07:00
|
|
|
This enables support for systems based on the Hilscher NetX Soc
|
|
|
|
|
|
|
|
config ARCH_H720X
|
|
|
|
bool "Hynix HMS720x-based"
|
2008-10-26 17:55:14 +07:00
|
|
|
select CPU_ARM720T
|
2006-06-21 03:30:44 +07:00
|
|
|
select ISA_DMA_API
|
|
|
|
help
|
|
|
|
This enables support for systems based on the Hynix HMS720x
|
|
|
|
|
|
|
|
config ARCH_IMX
|
|
|
|
bool "IMX"
|
2008-10-26 17:55:14 +07:00
|
|
|
select CPU_ARM920T
|
2007-05-12 20:31:17 +07:00
|
|
|
select GENERIC_GPIO
|
2007-05-13 23:37:33 +07:00
|
|
|
select GENERIC_TIME
|
|
|
|
select GENERIC_CLOCKEVENTS
|
2006-06-21 03:30:44 +07:00
|
|
|
help
|
|
|
|
Support for Motorola's i.MX family of processors (MX1, MXL).
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2007-05-12 17:25:44 +07:00
|
|
|
config ARCH_IOP13XX
|
|
|
|
bool "IOP13xx-based"
|
|
|
|
depends on MMU
|
2008-10-26 17:55:14 +07:00
|
|
|
select CPU_XSC3
|
2007-05-12 17:25:44 +07:00
|
|
|
select PLAT_IOP
|
|
|
|
select PCI
|
|
|
|
select ARCH_SUPPORTS_MSI
|
2008-08-26 03:03:32 +07:00
|
|
|
select VMSPLIT_1G
|
2007-05-12 17:25:44 +07:00
|
|
|
help
|
|
|
|
Support for Intel's IOP13XX (XScale) family of processors.
|
|
|
|
|
2006-09-19 05:10:26 +07:00
|
|
|
config ARCH_IOP32X
|
|
|
|
bool "IOP32x-based"
|
2006-06-28 18:52:41 +07:00
|
|
|
depends on MMU
|
2008-10-26 17:55:14 +07:00
|
|
|
select CPU_XSCALE
|
2006-09-19 05:12:53 +07:00
|
|
|
select PLAT_IOP
|
2005-05-05 20:49:01 +07:00
|
|
|
select PCI
|
2008-07-09 05:07:48 +07:00
|
|
|
select GENERIC_GPIO
|
2008-07-26 21:36:03 +07:00
|
|
|
select ARCH_REQUIRE_GPIOLIB
|
2006-02-09 04:09:05 +07:00
|
|
|
help
|
2006-09-19 05:10:26 +07:00
|
|
|
Support for Intel's 80219 and IOP32X (XScale) family of
|
|
|
|
processors.
|
|
|
|
|
|
|
|
config ARCH_IOP33X
|
|
|
|
bool "IOP33x-based"
|
|
|
|
depends on MMU
|
2008-10-26 17:55:14 +07:00
|
|
|
select CPU_XSCALE
|
2006-09-19 05:12:53 +07:00
|
|
|
select PLAT_IOP
|
2006-09-19 05:10:26 +07:00
|
|
|
select PCI
|
2008-07-09 05:07:48 +07:00
|
|
|
select GENERIC_GPIO
|
2008-07-26 21:36:03 +07:00
|
|
|
select ARCH_REQUIRE_GPIOLIB
|
2006-09-19 05:10:26 +07:00
|
|
|
help
|
|
|
|
Support for Intel's IOP33X (XScale) family of processors.
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2007-05-12 17:25:44 +07:00
|
|
|
config ARCH_IXP23XX
|
|
|
|
bool "IXP23XX-based"
|
2006-06-28 18:52:41 +07:00
|
|
|
depends on MMU
|
2008-10-26 17:55:14 +07:00
|
|
|
select CPU_XSC3
|
2007-05-12 17:25:44 +07:00
|
|
|
select PCI
|
2006-02-09 04:09:05 +07:00
|
|
|
help
|
2007-05-12 17:25:44 +07:00
|
|
|
Support for Intel's IXP23xx (XScale) family of processors.
|
2005-04-17 05:20:36 +07:00
|
|
|
|
|
|
|
config ARCH_IXP2000
|
|
|
|
bool "IXP2400/2800-based"
|
2006-06-28 18:52:41 +07:00
|
|
|
depends on MMU
|
2008-10-26 17:55:14 +07:00
|
|
|
select CPU_XSCALE
|
2005-05-05 20:49:01 +07:00
|
|
|
select PCI
|
2006-02-09 04:09:05 +07:00
|
|
|
help
|
|
|
|
Support for Intel's IXP2400/2800 (XScale) family of processors.
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2007-05-12 17:25:44 +07:00
|
|
|
config ARCH_IXP4XX
|
|
|
|
bool "IXP4xx-based"
|
2006-06-28 18:52:41 +07:00
|
|
|
depends on MMU
|
2008-10-26 17:55:14 +07:00
|
|
|
select CPU_XSCALE
|
2007-05-14 13:50:42 +07:00
|
|
|
select GENERIC_GPIO
|
2007-05-12 17:25:44 +07:00
|
|
|
select GENERIC_TIME
|
|
|
|
select GENERIC_CLOCKEVENTS
|
2008-10-17 20:00:43 +07:00
|
|
|
select DMABOUNCE if PCI
|
[ARM] 3388/1: ixp23xx: add core ixp23xx support
Patch from Lennert Buytenhek
This patch adds support for the Intel ixp23xx series of CPUs. The
ixp23xx is an XSC3 based CPU with 512K of L2 cache, a 64bit 66MHz PCI
interface, two DDR RAM interfaces, QDR RAM interfaces, two gigabit
MACs, two 10/100 MACs, expansion bus, four microengines, a Media and
Switch Fabric unit almost identical to the one on the ixp2400, two
xscale (8250ish) UARTs and a bunch of other stuff.
This patch adds the core ixp23xx support code, and support for the
ADI Engineering Roadrunner, Intel IXDP2351, and IP Fabrics Double
Espresso platforms.
Signed-off-by: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-03-29 03:18:54 +07:00
|
|
|
help
|
2007-05-12 17:25:44 +07:00
|
|
|
Support for Intel's IXP4XX (XScale) family of processors.
|
[ARM] 3388/1: ixp23xx: add core ixp23xx support
Patch from Lennert Buytenhek
This patch adds support for the Intel ixp23xx series of CPUs. The
ixp23xx is an XSC3 based CPU with 512K of L2 cache, a 64bit 66MHz PCI
interface, two DDR RAM interfaces, QDR RAM interfaces, two gigabit
MACs, two 10/100 MACs, expansion bus, four microengines, a Media and
Switch Fabric unit almost identical to the one on the ixp2400, two
xscale (8250ish) UARTs and a bunch of other stuff.
This patch adds the core ixp23xx support code, and support for the
ADI Engineering Roadrunner, Intel IXDP2351, and IP Fabrics Double
Espresso platforms.
Signed-off-by: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-03-29 03:18:54 +07:00
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
config ARCH_L7200
|
|
|
|
bool "LinkUp-L7200"
|
2008-10-26 17:55:14 +07:00
|
|
|
select CPU_ARM720T
|
2005-04-17 05:20:36 +07:00
|
|
|
select FIQ
|
|
|
|
help
|
|
|
|
Say Y here if you intend to run this kernel on a LinkUp Systems
|
|
|
|
L7200 Software Development Board which uses an ARM720T processor.
|
|
|
|
Information on this board can be obtained at:
|
|
|
|
|
|
|
|
<http://www.linkupsys.com/>
|
|
|
|
|
|
|
|
If you have any questions or comments about the Linux kernel port
|
|
|
|
to this board, send e-mail to <sjhill@cotw.com>.
|
|
|
|
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 03:45:06 +07:00
|
|
|
config ARCH_KIRKWOOD
|
|
|
|
bool "Marvell Kirkwood"
|
2008-10-26 17:55:14 +07:00
|
|
|
select CPU_FEROCEON
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 03:45:06 +07:00
|
|
|
select PCI
|
2008-10-20 06:51:04 +07:00
|
|
|
select GENERIC_GPIO
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 03:45:06 +07:00
|
|
|
select GENERIC_TIME
|
|
|
|
select GENERIC_CLOCKEVENTS
|
|
|
|
select PLAT_ORION
|
|
|
|
help
|
|
|
|
Support for the following Marvell Kirkwood series SoCs:
|
|
|
|
88F6180, 88F6192 and 88F6281.
|
|
|
|
|
2007-05-12 03:01:28 +07:00
|
|
|
config ARCH_KS8695
|
|
|
|
bool "Micrel/Kendin KS8695"
|
2008-10-26 17:55:14 +07:00
|
|
|
select CPU_ARM922T
|
2007-05-14 20:30:15 +07:00
|
|
|
select GENERIC_GPIO
|
2008-12-14 03:44:12 +07:00
|
|
|
select ARCH_REQUIRE_GPIOLIB
|
2007-05-12 03:01:28 +07:00
|
|
|
help
|
|
|
|
Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
|
|
|
|
System-on-Chip devices.
|
|
|
|
|
2007-02-16 21:36:55 +07:00
|
|
|
config ARCH_NS9XXX
|
|
|
|
bool "NetSilicon NS9xxx"
|
2008-10-26 17:55:14 +07:00
|
|
|
select CPU_ARM926T
|
2007-10-01 02:35:09 +07:00
|
|
|
select GENERIC_GPIO
|
2007-10-01 02:35:48 +07:00
|
|
|
select GENERIC_TIME
|
2007-10-01 02:36:00 +07:00
|
|
|
select GENERIC_CLOCKEVENTS
|
2008-07-24 11:26:48 +07:00
|
|
|
select HAVE_CLK
|
2007-02-16 21:36:55 +07:00
|
|
|
help
|
|
|
|
Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
|
|
|
|
System.
|
|
|
|
|
|
|
|
<http://www.digi.com/products/microprocessors/index.jsp>
|
|
|
|
|
[ARM] add Marvell Loki (88RC8480) SoC support
The Marvell Loki (88RC8480) is an ARM SoC based on a Feroceon CPU
core running at between 400 MHz and 1.0 GHz, and features a 64 bit
DDR controller, 512K of internal SRAM, two x4 PCI-Express ports,
two Gigabit Ethernet ports, two 4x SAS/SATA controllers, two UARTs,
two TWSI controllers, and IDMA/XOR engines.
This patch adds support for the Marvell LB88RC8480 Development
Board, enabling the use of the PCIe interfaces, the ethernet
interfaces, the TWSI interfaces and the UARTs.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 03:45:02 +07:00
|
|
|
config ARCH_LOKI
|
|
|
|
bool "Marvell Loki (88RC8480)"
|
2008-10-26 17:55:14 +07:00
|
|
|
select CPU_FEROCEON
|
[ARM] add Marvell Loki (88RC8480) SoC support
The Marvell Loki (88RC8480) is an ARM SoC based on a Feroceon CPU
core running at between 400 MHz and 1.0 GHz, and features a 64 bit
DDR controller, 512K of internal SRAM, two x4 PCI-Express ports,
two Gigabit Ethernet ports, two 4x SAS/SATA controllers, two UARTs,
two TWSI controllers, and IDMA/XOR engines.
This patch adds support for the Marvell LB88RC8480 Development
Board, enabling the use of the PCIe interfaces, the ethernet
interfaces, the TWSI interfaces and the UARTs.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 03:45:02 +07:00
|
|
|
select GENERIC_TIME
|
|
|
|
select GENERIC_CLOCKEVENTS
|
|
|
|
select PLAT_ORION
|
|
|
|
help
|
|
|
|
Support for the Marvell Loki (88RC8480) SoC.
|
|
|
|
|
[ARM] add Marvell 78xx0 ARM SoC support
The Marvell Discovery Duo (MV78xx0) is a family of ARM SoCs featuring
(depending on the model) one or two Feroceon CPU cores with 512K of L2
cache and VFP coprocessors running at (depending on the model) between
800 MHz and 1.2 GHz, and features a DDR2 controller, two PCIe
interfaces that can each run either in x4 or quad x1 mode, three USB
2.0 interfaces, two 3Gb/s SATA II interfaces, a SPI interface, two
TWSI interfaces, a crypto accelerator, IDMA/XOR engines, a SPI
interface, four UARTs, and depending on the model, two or four gigabit
ethernet interfaces.
This patch adds basic support for the platform, and allows booting
on the MV78x00 development board, with functional UARTs, SATA, PCIe,
GigE and USB ports.
Signed-off-by: Stanislav Samsonov <samsonov@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 03:45:10 +07:00
|
|
|
config ARCH_MV78XX0
|
|
|
|
bool "Marvell MV78xx0"
|
2008-10-26 17:55:14 +07:00
|
|
|
select CPU_FEROCEON
|
[ARM] add Marvell 78xx0 ARM SoC support
The Marvell Discovery Duo (MV78xx0) is a family of ARM SoCs featuring
(depending on the model) one or two Feroceon CPU cores with 512K of L2
cache and VFP coprocessors running at (depending on the model) between
800 MHz and 1.2 GHz, and features a DDR2 controller, two PCIe
interfaces that can each run either in x4 or quad x1 mode, three USB
2.0 interfaces, two 3Gb/s SATA II interfaces, a SPI interface, two
TWSI interfaces, a crypto accelerator, IDMA/XOR engines, a SPI
interface, four UARTs, and depending on the model, two or four gigabit
ethernet interfaces.
This patch adds basic support for the platform, and allows booting
on the MV78x00 development board, with functional UARTs, SATA, PCIe,
GigE and USB ports.
Signed-off-by: Stanislav Samsonov <samsonov@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 03:45:10 +07:00
|
|
|
select PCI
|
2008-10-20 06:51:04 +07:00
|
|
|
select GENERIC_GPIO
|
[ARM] add Marvell 78xx0 ARM SoC support
The Marvell Discovery Duo (MV78xx0) is a family of ARM SoCs featuring
(depending on the model) one or two Feroceon CPU cores with 512K of L2
cache and VFP coprocessors running at (depending on the model) between
800 MHz and 1.2 GHz, and features a DDR2 controller, two PCIe
interfaces that can each run either in x4 or quad x1 mode, three USB
2.0 interfaces, two 3Gb/s SATA II interfaces, a SPI interface, two
TWSI interfaces, a crypto accelerator, IDMA/XOR engines, a SPI
interface, four UARTs, and depending on the model, two or four gigabit
ethernet interfaces.
This patch adds basic support for the platform, and allows booting
on the MV78x00 development board, with functional UARTs, SATA, PCIe,
GigE and USB ports.
Signed-off-by: Stanislav Samsonov <samsonov@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 03:45:10 +07:00
|
|
|
select GENERIC_TIME
|
|
|
|
select GENERIC_CLOCKEVENTS
|
|
|
|
select PLAT_ORION
|
|
|
|
help
|
|
|
|
Support for the following Marvell MV78xx0 series SoCs:
|
|
|
|
MV781x0, MV782x0.
|
|
|
|
|
2007-07-10 04:06:53 +07:00
|
|
|
config ARCH_MXC
|
|
|
|
bool "Freescale MXC/iMX-based"
|
2008-07-05 15:02:50 +07:00
|
|
|
select GENERIC_TIME
|
|
|
|
select GENERIC_CLOCKEVENTS
|
2007-07-10 04:06:53 +07:00
|
|
|
select ARCH_MTD_XIP
|
2008-07-05 15:02:49 +07:00
|
|
|
select GENERIC_GPIO
|
2008-07-26 21:36:03 +07:00
|
|
|
select ARCH_REQUIRE_GPIOLIB
|
2009-04-16 19:12:54 +07:00
|
|
|
select HAVE_CLK
|
2007-07-10 04:06:53 +07:00
|
|
|
help
|
|
|
|
Support for Freescale MXC/iMX-based family of processors
|
|
|
|
|
2008-03-28 01:51:41 +07:00
|
|
|
config ARCH_ORION5X
|
[ARM] basic support for the Marvell Orion SoC family
The Marvell Orion is a family of ARM SoCs with a DDR/DDR2 memory
controller, 10/100/1000 ethernet MAC, and USB 2.0 interfaces,
and, depending on the specific model, PCI-E interface, PCI-X
interface, SATA controllers, crypto unit, SPI interface, SDIO
interface, device bus, NAND controller, DMA engine and/or XOR
engine.
This contains the basic structure and architecture register definitions.
Signed-off-by: Tzachi Perelstein <tzachi@marvell.com>
Reviewed-by: Nicolas Pitre <nico@marvell.com>
Reviewed-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-10-24 02:14:41 +07:00
|
|
|
bool "Marvell Orion"
|
|
|
|
depends on MMU
|
2008-10-26 17:55:14 +07:00
|
|
|
select CPU_FEROCEON
|
2007-10-24 02:14:42 +07:00
|
|
|
select PCI
|
2007-10-24 02:14:42 +07:00
|
|
|
select GENERIC_GPIO
|
2007-10-24 02:14:42 +07:00
|
|
|
select GENERIC_TIME
|
|
|
|
select GENERIC_CLOCKEVENTS
|
2008-03-28 01:51:39 +07:00
|
|
|
select PLAT_ORION
|
[ARM] basic support for the Marvell Orion SoC family
The Marvell Orion is a family of ARM SoCs with a DDR/DDR2 memory
controller, 10/100/1000 ethernet MAC, and USB 2.0 interfaces,
and, depending on the specific model, PCI-E interface, PCI-X
interface, SATA controllers, crypto unit, SPI interface, SDIO
interface, device bus, NAND controller, DMA engine and/or XOR
engine.
This contains the basic structure and architecture register definitions.
Signed-off-by: Tzachi Perelstein <tzachi@marvell.com>
Reviewed-by: Nicolas Pitre <nico@marvell.com>
Reviewed-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-10-24 02:14:41 +07:00
|
|
|
help
|
2008-03-28 01:51:41 +07:00
|
|
|
Support for the following Marvell Orion 5x series SoCs:
|
2008-05-31 13:30:40 +07:00
|
|
|
Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
|
[ARM] Orion: add 88F6183 (Orion-1-90) support
The Orion-1-90 (88F6183) is another member of the Orion SoC family,
which has a 16 bit DDR2 interface, one x1 PCIe port (configurable as
Root Complex or Endpoint), one 10/100/1000 ethernet interface, one
USB 2.0 port with PHY, one SPDIF/I2S interface, one SDIO interface,
one TWSI interface, two UARTs, one SPI interface, a NAND controller,
a crypto engine, and a 4-channel DMA engine.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-08-29 11:55:06 +07:00
|
|
|
Orion-2 (5281), Orion-1-90 (6183).
|
[ARM] basic support for the Marvell Orion SoC family
The Marvell Orion is a family of ARM SoCs with a DDR/DDR2 memory
controller, 10/100/1000 ethernet MAC, and USB 2.0 interfaces,
and, depending on the specific model, PCI-E interface, PCI-X
interface, SATA controllers, crypto unit, SPI interface, SDIO
interface, device bus, NAND controller, DMA engine and/or XOR
engine.
This contains the basic structure and architecture register definitions.
Signed-off-by: Tzachi Perelstein <tzachi@marvell.com>
Reviewed-by: Nicolas Pitre <nico@marvell.com>
Reviewed-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-10-24 02:14:41 +07:00
|
|
|
|
2006-06-21 03:30:44 +07:00
|
|
|
config ARCH_PNX4008
|
|
|
|
bool "Philips Nexperia PNX4008 Mobile"
|
2008-10-26 17:55:14 +07:00
|
|
|
select CPU_ARM926T
|
2008-07-24 11:26:48 +07:00
|
|
|
select HAVE_CLK
|
2006-06-21 03:30:44 +07:00
|
|
|
help
|
|
|
|
This enables support for Philips PNX4008 mobile platform.
|
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
config ARCH_PXA
|
2007-09-12 09:13:17 +07:00
|
|
|
bool "PXA2xx/PXA3xx-based"
|
2006-06-28 18:52:41 +07:00
|
|
|
depends on MMU
|
2005-12-20 04:27:59 +07:00
|
|
|
select ARCH_MTD_XIP
|
2007-03-05 15:30:18 +07:00
|
|
|
select GENERIC_GPIO
|
2008-07-24 11:26:48 +07:00
|
|
|
select HAVE_CLK
|
2008-11-09 03:25:21 +07:00
|
|
|
select COMMON_CLKDEV
|
2008-07-25 15:46:11 +07:00
|
|
|
select ARCH_REQUIRE_GPIOLIB
|
2007-02-06 04:37:07 +07:00
|
|
|
select GENERIC_TIME
|
2007-07-24 07:22:43 +07:00
|
|
|
select GENERIC_CLOCKEVENTS
|
2007-11-13 05:45:16 +07:00
|
|
|
select TICK_ONESHOT
|
2009-01-20 11:06:01 +07:00
|
|
|
select PLAT_PXA
|
2006-02-09 04:09:05 +07:00
|
|
|
help
|
2007-09-12 09:13:17 +07:00
|
|
|
Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2009-01-20 13:15:18 +07:00
|
|
|
config ARCH_MMP
|
2009-03-20 11:50:22 +07:00
|
|
|
bool "Marvell PXA168/910"
|
2009-01-20 13:15:18 +07:00
|
|
|
depends on MMU
|
2009-01-20 13:38:24 +07:00
|
|
|
select GENERIC_GPIO
|
|
|
|
select ARCH_REQUIRE_GPIOLIB
|
2009-01-20 13:15:18 +07:00
|
|
|
select HAVE_CLK
|
|
|
|
select COMMON_CLKDEV
|
|
|
|
select GENERIC_TIME
|
|
|
|
select GENERIC_CLOCKEVENTS
|
|
|
|
select TICK_ONESHOT
|
|
|
|
select PLAT_PXA
|
|
|
|
help
|
2009-03-20 11:50:22 +07:00
|
|
|
Support for Marvell's PXA168/910 processor line.
|
2009-01-20 13:15:18 +07:00
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
config ARCH_RPC
|
|
|
|
bool "RiscPC"
|
|
|
|
select ARCH_ACORN
|
|
|
|
select FIQ
|
|
|
|
select TIMER_ACORN
|
2005-09-06 07:48:42 +07:00
|
|
|
select ARCH_MAY_HAVE_PC_FDC
|
2008-07-01 20:16:49 +07:00
|
|
|
select HAVE_PATA_PLATFORM
|
2006-01-04 22:44:16 +07:00
|
|
|
select ISA_DMA_API
|
2007-02-11 22:41:31 +07:00
|
|
|
select NO_IOPORT
|
2008-10-01 23:11:06 +07:00
|
|
|
select ARCH_SPARSEMEM_ENABLE
|
2005-04-17 05:20:36 +07:00
|
|
|
help
|
|
|
|
On the Acorn Risc-PC, Linux can support the internal IDE disk and
|
|
|
|
CD-ROM interface, serial and parallel port, and the floppy drive.
|
|
|
|
|
|
|
|
config ARCH_SA1100
|
|
|
|
bool "SA1100-based"
|
2008-10-26 17:55:14 +07:00
|
|
|
select CPU_SA1100
|
2005-05-05 20:49:01 +07:00
|
|
|
select ISA
|
2006-12-01 03:43:51 +07:00
|
|
|
select ARCH_SPARSEMEM_ENABLE
|
2005-12-20 04:27:59 +07:00
|
|
|
select ARCH_MTD_XIP
|
2007-03-05 15:30:18 +07:00
|
|
|
select GENERIC_GPIO
|
2007-11-13 04:55:12 +07:00
|
|
|
select GENERIC_TIME
|
2008-04-15 05:03:10 +07:00
|
|
|
select GENERIC_CLOCKEVENTS
|
2008-07-24 11:26:48 +07:00
|
|
|
select HAVE_CLK
|
2008-04-15 05:03:10 +07:00
|
|
|
select TICK_ONESHOT
|
2008-07-25 15:46:11 +07:00
|
|
|
select ARCH_REQUIRE_GPIOLIB
|
2006-02-09 04:09:05 +07:00
|
|
|
help
|
|
|
|
Support for StrongARM 11x0 based boards.
|
2005-04-17 05:20:36 +07:00
|
|
|
|
|
|
|
config ARCH_S3C2410
|
2007-02-16 18:12:31 +07:00
|
|
|
bool "Samsung S3C2410, S3C2412, S3C2413, S3C2440, S3C2442, S3C2443"
|
2007-03-05 15:30:18 +07:00
|
|
|
select GENERIC_GPIO
|
2008-07-24 11:26:48 +07:00
|
|
|
select HAVE_CLK
|
2005-04-17 05:20:36 +07:00
|
|
|
help
|
|
|
|
Samsung S3C2410X CPU based systems, such as the Simtec Electronics
|
|
|
|
BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
|
2006-02-09 04:09:07 +07:00
|
|
|
the Samsung SMDK2410 development board (and derivatives).
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-10-21 20:06:39 +07:00
|
|
|
config ARCH_S3C64XX
|
|
|
|
bool "Samsung S3C64XX"
|
|
|
|
select GENERIC_GPIO
|
|
|
|
select HAVE_CLK
|
|
|
|
help
|
|
|
|
Samsung S3C64XX series based systems
|
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
config ARCH_SHARK
|
|
|
|
bool "Shark"
|
2008-10-26 17:55:14 +07:00
|
|
|
select CPU_SA110
|
2005-05-05 20:49:01 +07:00
|
|
|
select ISA
|
|
|
|
select ISA_DMA
|
2008-10-08 02:14:55 +07:00
|
|
|
select ZONE_DMA
|
2005-05-05 20:49:01 +07:00
|
|
|
select PCI
|
2006-02-09 04:09:05 +07:00
|
|
|
help
|
|
|
|
Support for the StrongARM based Digital DNARD machine, also known
|
|
|
|
as "Shark" (<http://www.shark-linux.de/shark.html>).
|
2005-04-17 05:20:36 +07:00
|
|
|
|
|
|
|
config ARCH_LH7A40X
|
|
|
|
bool "Sharp LH7A40X"
|
2008-10-26 17:55:14 +07:00
|
|
|
select CPU_ARM922T
|
2008-10-02 03:38:23 +07:00
|
|
|
select ARCH_DISCONTIGMEM_ENABLE if !LH7A40X_CONTIGMEM
|
|
|
|
select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
|
2005-04-17 05:20:36 +07:00
|
|
|
help
|
|
|
|
Say Y here for systems based on one of the Sharp LH7A40X
|
|
|
|
System on a Chip processors. These CPUs include an ARM922T
|
|
|
|
core with a wide array of integrated devices for
|
|
|
|
hand-held and low-power applications.
|
|
|
|
|
2007-05-01 01:37:19 +07:00
|
|
|
config ARCH_DAVINCI
|
|
|
|
bool "TI DaVinci"
|
2008-10-26 17:55:14 +07:00
|
|
|
select CPU_ARM926T
|
2007-05-01 01:37:19 +07:00
|
|
|
select GENERIC_TIME
|
|
|
|
select GENERIC_CLOCKEVENTS
|
2007-07-10 19:03:43 +07:00
|
|
|
select GENERIC_GPIO
|
2008-09-08 13:41:04 +07:00
|
|
|
select ARCH_REQUIRE_GPIOLIB
|
2008-07-24 11:26:48 +07:00
|
|
|
select HAVE_CLK
|
2008-10-08 02:14:55 +07:00
|
|
|
select ZONE_DMA
|
2009-04-09 04:49:38 +07:00
|
|
|
select HAVE_IDE
|
2009-03-21 07:29:01 +07:00
|
|
|
select COMMON_CLKDEV
|
2007-05-01 01:37:19 +07:00
|
|
|
help
|
|
|
|
Support for TI's DaVinci platform.
|
|
|
|
|
2007-05-12 17:25:44 +07:00
|
|
|
config ARCH_OMAP
|
|
|
|
bool "TI OMAP"
|
|
|
|
select GENERIC_GPIO
|
2008-07-24 11:26:48 +07:00
|
|
|
select HAVE_CLK
|
2008-07-25 15:46:11 +07:00
|
|
|
select ARCH_REQUIRE_GPIOLIB
|
2007-05-12 17:25:44 +07:00
|
|
|
select GENERIC_TIME
|
2007-10-19 13:04:43 +07:00
|
|
|
select GENERIC_CLOCKEVENTS
|
2007-05-12 17:25:44 +07:00
|
|
|
help
|
|
|
|
Support for TI's OMAP platform (OMAP1 and OMAP2).
|
|
|
|
|
2008-09-09 21:13:33 +07:00
|
|
|
config ARCH_MSM
|
|
|
|
bool "Qualcomm MSM"
|
2008-10-26 17:55:14 +07:00
|
|
|
select CPU_V6
|
2007-11-26 19:11:43 +07:00
|
|
|
select GENERIC_TIME
|
|
|
|
select GENERIC_CLOCKEVENTS
|
|
|
|
help
|
2008-09-09 21:13:33 +07:00
|
|
|
Support for Qualcomm MSM7K based systems. This runs on the ARM11
|
|
|
|
apps processor of the MSM7K and depends on a shared memory
|
2007-11-26 19:11:43 +07:00
|
|
|
interface to the ARM9 modem processor which runs the baseband stack
|
|
|
|
and controls some vital subsystems (clock and power control, etc).
|
|
|
|
|
2008-12-03 09:55:38 +07:00
|
|
|
config ARCH_W90X900
|
|
|
|
bool "Nuvoton W90X900 CPU"
|
|
|
|
select CPU_ARM926T
|
|
|
|
help
|
|
|
|
Support for Nuvoton (Winbond logic dept.) ARM9 processor,You
|
|
|
|
can login www.mcuos.com or www.nuvoton.com to know more.
|
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
endchoice
|
|
|
|
|
|
|
|
source "arch/arm/mach-clps711x/Kconfig"
|
|
|
|
|
[ARM] 3369/1: ep93xx: add core cirrus ep93xx support
Patch from Lennert Buytenhek
This patch adds support for the Cirrus ep93xx series of CPUs. The
ep93xx is an ARM920T based CPU with two VICs, PL010 based UARTs,
IrDA, MaverickCrunch floating point coprocessor, between 24 and 64
GPIOs, ethernet, OHCI USB and, depending on the model, pcmcia, raster
engine, graphics accelerator, IDE controller and a bunch of other
stuff.
This patch adds the core ep93xx support code, and support for the
Glomation GESBC-9312-sx and the Technologic Systems TS-72xx SBCs.
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-03-21 00:10:13 +07:00
|
|
|
source "arch/arm/mach-ep93xx/Kconfig"
|
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
source "arch/arm/mach-footbridge/Kconfig"
|
|
|
|
|
2009-03-26 15:06:08 +07:00
|
|
|
source "arch/arm/mach-gemini/Kconfig"
|
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
source "arch/arm/mach-integrator/Kconfig"
|
|
|
|
|
2006-09-19 05:10:26 +07:00
|
|
|
source "arch/arm/mach-iop32x/Kconfig"
|
|
|
|
|
|
|
|
source "arch/arm/mach-iop33x/Kconfig"
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2006-12-07 08:59:39 +07:00
|
|
|
source "arch/arm/mach-iop13xx/Kconfig"
|
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
source "arch/arm/mach-ixp4xx/Kconfig"
|
|
|
|
|
|
|
|
source "arch/arm/mach-ixp2000/Kconfig"
|
|
|
|
|
[ARM] 3388/1: ixp23xx: add core ixp23xx support
Patch from Lennert Buytenhek
This patch adds support for the Intel ixp23xx series of CPUs. The
ixp23xx is an XSC3 based CPU with 512K of L2 cache, a 64bit 66MHz PCI
interface, two DDR RAM interfaces, QDR RAM interfaces, two gigabit
MACs, two 10/100 MACs, expansion bus, four microengines, a Media and
Switch Fabric unit almost identical to the one on the ixp2400, two
xscale (8250ish) UARTs and a bunch of other stuff.
This patch adds the core ixp23xx support code, and support for the
ADI Engineering Roadrunner, Intel IXDP2351, and IP Fabrics Double
Espresso platforms.
Signed-off-by: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-03-29 03:18:54 +07:00
|
|
|
source "arch/arm/mach-ixp23xx/Kconfig"
|
|
|
|
|
[ARM] add Marvell Loki (88RC8480) SoC support
The Marvell Loki (88RC8480) is an ARM SoC based on a Feroceon CPU
core running at between 400 MHz and 1.0 GHz, and features a 64 bit
DDR controller, 512K of internal SRAM, two x4 PCI-Express ports,
two Gigabit Ethernet ports, two 4x SAS/SATA controllers, two UARTs,
two TWSI controllers, and IDMA/XOR engines.
This patch adds support for the Marvell LB88RC8480 Development
Board, enabling the use of the PCIe interfaces, the ethernet
interfaces, the TWSI interfaces and the UARTs.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 03:45:02 +07:00
|
|
|
source "arch/arm/mach-loki/Kconfig"
|
|
|
|
|
[ARM] add Marvell 78xx0 ARM SoC support
The Marvell Discovery Duo (MV78xx0) is a family of ARM SoCs featuring
(depending on the model) one or two Feroceon CPU cores with 512K of L2
cache and VFP coprocessors running at (depending on the model) between
800 MHz and 1.2 GHz, and features a DDR2 controller, two PCIe
interfaces that can each run either in x4 or quad x1 mode, three USB
2.0 interfaces, two 3Gb/s SATA II interfaces, a SPI interface, two
TWSI interfaces, a crypto accelerator, IDMA/XOR engines, a SPI
interface, four UARTs, and depending on the model, two or four gigabit
ethernet interfaces.
This patch adds basic support for the platform, and allows booting
on the MV78x00 development board, with functional UARTs, SATA, PCIe,
GigE and USB ports.
Signed-off-by: Stanislav Samsonov <samsonov@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 03:45:10 +07:00
|
|
|
source "arch/arm/mach-mv78xx0/Kconfig"
|
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
source "arch/arm/mach-pxa/Kconfig"
|
2009-01-20 11:06:01 +07:00
|
|
|
source "arch/arm/plat-pxa/Kconfig"
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2009-01-20 13:15:18 +07:00
|
|
|
source "arch/arm/mach-mmp/Kconfig"
|
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
source "arch/arm/mach-sa1100/Kconfig"
|
|
|
|
|
2005-07-11 01:58:17 +07:00
|
|
|
source "arch/arm/plat-omap/Kconfig"
|
|
|
|
|
|
|
|
source "arch/arm/mach-omap1/Kconfig"
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2005-11-10 21:26:51 +07:00
|
|
|
source "arch/arm/mach-omap2/Kconfig"
|
|
|
|
|
2008-03-28 01:51:41 +07:00
|
|
|
source "arch/arm/mach-orion5x/Kconfig"
|
[ARM] basic support for the Marvell Orion SoC family
The Marvell Orion is a family of ARM SoCs with a DDR/DDR2 memory
controller, 10/100/1000 ethernet MAC, and USB 2.0 interfaces,
and, depending on the specific model, PCI-E interface, PCI-X
interface, SATA controllers, crypto unit, SPI interface, SDIO
interface, device bus, NAND controller, DMA engine and/or XOR
engine.
This contains the basic structure and architecture register definitions.
Signed-off-by: Tzachi Perelstein <tzachi@marvell.com>
Reviewed-by: Nicolas Pitre <nico@marvell.com>
Reviewed-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-10-24 02:14:41 +07:00
|
|
|
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 03:45:06 +07:00
|
|
|
source "arch/arm/mach-kirkwood/Kconfig"
|
[ARM] basic support for the Marvell Orion SoC family
The Marvell Orion is a family of ARM SoCs with a DDR/DDR2 memory
controller, 10/100/1000 ethernet MAC, and USB 2.0 interfaces,
and, depending on the specific model, PCI-E interface, PCI-X
interface, SATA controllers, crypto unit, SPI interface, SDIO
interface, device bus, NAND controller, DMA engine and/or XOR
engine.
This contains the basic structure and architecture register definitions.
Signed-off-by: Tzachi Perelstein <tzachi@marvell.com>
Reviewed-by: Nicolas Pitre <nico@marvell.com>
Reviewed-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-10-24 02:14:41 +07:00
|
|
|
|
2007-02-12 00:31:01 +07:00
|
|
|
source "arch/arm/plat-s3c24xx/Kconfig"
|
2008-10-21 20:06:39 +07:00
|
|
|
source "arch/arm/plat-s3c64xx/Kconfig"
|
2007-07-22 22:07:09 +07:00
|
|
|
source "arch/arm/plat-s3c/Kconfig"
|
2007-02-12 00:31:01 +07:00
|
|
|
|
|
|
|
if ARCH_S3C2410
|
|
|
|
source "arch/arm/mach-s3c2400/Kconfig"
|
2005-04-17 05:20:36 +07:00
|
|
|
source "arch/arm/mach-s3c2410/Kconfig"
|
2007-02-12 00:31:01 +07:00
|
|
|
source "arch/arm/mach-s3c2412/Kconfig"
|
|
|
|
source "arch/arm/mach-s3c2440/Kconfig"
|
|
|
|
source "arch/arm/mach-s3c2442/Kconfig"
|
2007-02-16 18:12:31 +07:00
|
|
|
source "arch/arm/mach-s3c2443/Kconfig"
|
2007-02-12 00:31:01 +07:00
|
|
|
endif
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-10-21 20:06:39 +07:00
|
|
|
if ARCH_S3C64XX
|
|
|
|
source "arch/arm/mach-s3c6400/Kconfig"
|
|
|
|
source "arch/arm/mach-s3c6410/Kconfig"
|
|
|
|
endif
|
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
source "arch/arm/mach-lh7a40x/Kconfig"
|
|
|
|
|
|
|
|
source "arch/arm/mach-imx/Kconfig"
|
|
|
|
|
|
|
|
source "arch/arm/mach-h720x/Kconfig"
|
|
|
|
|
|
|
|
source "arch/arm/mach-versatile/Kconfig"
|
|
|
|
|
2005-06-21 00:51:05 +07:00
|
|
|
source "arch/arm/mach-aaec2000/Kconfig"
|
|
|
|
|
2005-10-31 21:25:02 +07:00
|
|
|
source "arch/arm/mach-realview/Kconfig"
|
|
|
|
|
2007-02-05 17:42:07 +07:00
|
|
|
source "arch/arm/mach-at91/Kconfig"
|
2006-01-10 00:05:41 +07:00
|
|
|
|
2007-07-10 04:06:53 +07:00
|
|
|
source "arch/arm/plat-mxc/Kconfig"
|
|
|
|
|
2006-06-19 21:27:53 +07:00
|
|
|
source "arch/arm/mach-netx/Kconfig"
|
|
|
|
|
2007-02-16 21:36:55 +07:00
|
|
|
source "arch/arm/mach-ns9xxx/Kconfig"
|
|
|
|
|
2007-05-01 01:37:19 +07:00
|
|
|
source "arch/arm/mach-davinci/Kconfig"
|
|
|
|
|
2007-05-12 03:01:28 +07:00
|
|
|
source "arch/arm/mach-ks8695/Kconfig"
|
|
|
|
|
2007-11-26 19:12:13 +07:00
|
|
|
source "arch/arm/mach-msm/Kconfig"
|
|
|
|
|
2008-12-03 09:55:38 +07:00
|
|
|
source "arch/arm/mach-w90x900/Kconfig"
|
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
# Definitions to make life easier
|
|
|
|
config ARCH_ACORN
|
|
|
|
bool
|
|
|
|
|
2006-09-19 05:12:53 +07:00
|
|
|
config PLAT_IOP
|
|
|
|
bool
|
|
|
|
|
2008-03-28 01:51:39 +07:00
|
|
|
config PLAT_ORION
|
|
|
|
bool
|
|
|
|
|
2009-01-20 11:06:01 +07:00
|
|
|
config PLAT_PXA
|
|
|
|
bool
|
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
source arch/arm/mm/Kconfig
|
|
|
|
|
[ARM] 3881/4: xscale: clean up cp0/cp1 handling
XScale cores either have a DSP coprocessor (which contains a single
40 bit accumulator register), or an iWMMXt coprocessor (which contains
eight 64 bit registers.)
Because of the small amount of state in the DSP coprocessor, access to
the DSP coprocessor (CP0) is always enabled, and DSP context switching
is done unconditionally on every task switch. Access to the iWMMXt
coprocessor (CP0/CP1) is enabled only when an iWMMXt instruction is
first issued, and iWMMXt context switching is done lazily.
CONFIG_IWMMXT is supposed to mean 'the cpu we will be running on will
have iWMMXt support', but boards are supposed to select this config
symbol by hand, and at least one pxa27x board doesn't get this right,
so on that board, proc-xscale.S will incorrectly assume that we have a
DSP coprocessor, enable CP0 on boot, and we will then only save the
first iWMMXt register (wR0) on context switches, which is Bad.
This patch redefines CONFIG_IWMMXT as 'the cpu we will be running on
might have iWMMXt support, and we will enable iWMMXt context switching
if it does.' This means that with this patch, running a CONFIG_IWMMXT=n
kernel on an iWMMXt-capable CPU will no longer potentially corrupt iWMMXt
state over context switches, and running a CONFIG_IWMMXT=y kernel on a
non-iWMMXt capable CPU will still do DSP context save/restore.
These changes should make iWMMXt work on PXA3xx, and as a side effect,
enable proper acc0 save/restore on non-iWMMXt capable xsc3 cores such
as IOP13xx and IXP23xx (which will not have CONFIG_CPU_XSCALE defined),
as well as setting and using HWCAP_IWMMXT properly.
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Acked-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-12-04 00:51:14 +07:00
|
|
|
config IWMMXT
|
|
|
|
bool "Enable iWMMXt support"
|
2009-02-26 08:34:35 +07:00
|
|
|
depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK
|
|
|
|
default y if PXA27x || PXA3xx || ARCH_MMP
|
[ARM] 3881/4: xscale: clean up cp0/cp1 handling
XScale cores either have a DSP coprocessor (which contains a single
40 bit accumulator register), or an iWMMXt coprocessor (which contains
eight 64 bit registers.)
Because of the small amount of state in the DSP coprocessor, access to
the DSP coprocessor (CP0) is always enabled, and DSP context switching
is done unconditionally on every task switch. Access to the iWMMXt
coprocessor (CP0/CP1) is enabled only when an iWMMXt instruction is
first issued, and iWMMXt context switching is done lazily.
CONFIG_IWMMXT is supposed to mean 'the cpu we will be running on will
have iWMMXt support', but boards are supposed to select this config
symbol by hand, and at least one pxa27x board doesn't get this right,
so on that board, proc-xscale.S will incorrectly assume that we have a
DSP coprocessor, enable CP0 on boot, and we will then only save the
first iWMMXt register (wR0) on context switches, which is Bad.
This patch redefines CONFIG_IWMMXT as 'the cpu we will be running on
might have iWMMXt support, and we will enable iWMMXt context switching
if it does.' This means that with this patch, running a CONFIG_IWMMXT=n
kernel on an iWMMXt-capable CPU will no longer potentially corrupt iWMMXt
state over context switches, and running a CONFIG_IWMMXT=y kernel on a
non-iWMMXt capable CPU will still do DSP context save/restore.
These changes should make iWMMXt work on PXA3xx, and as a side effect,
enable proper acc0 save/restore on non-iWMMXt capable xsc3 cores such
as IOP13xx and IXP23xx (which will not have CONFIG_CPU_XSCALE defined),
as well as setting and using HWCAP_IWMMXT properly.
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Acked-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-12-04 00:51:14 +07:00
|
|
|
help
|
|
|
|
Enable support for iWMMXt context switching at run time if
|
|
|
|
running on a CPU that supports it.
|
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
# bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
|
|
|
|
config XSCALE_PMU
|
|
|
|
bool
|
|
|
|
depends on CPU_XSCALE && !XSCALE_PMU_TIMER
|
|
|
|
default y
|
|
|
|
|
2006-06-22 17:48:56 +07:00
|
|
|
if !MMU
|
|
|
|
source "arch/arm/Kconfig-nommu"
|
|
|
|
endif
|
|
|
|
|
2009-04-30 23:06:03 +07:00
|
|
|
config ARM_ERRATA_411920
|
|
|
|
bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
|
|
|
|
depends on CPU_V6 && !SMP
|
|
|
|
help
|
|
|
|
Invalidation of the Instruction Cache operation can
|
|
|
|
fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
|
|
|
|
It does not affect the MPCore. This option enables the ARM Ltd.
|
|
|
|
recommended workaround.
|
|
|
|
|
2009-04-30 23:06:09 +07:00
|
|
|
config ARM_ERRATA_430973
|
|
|
|
bool "ARM errata: Stale prediction on replaced interworking branch"
|
|
|
|
depends on CPU_V7
|
|
|
|
help
|
|
|
|
This option enables the workaround for the 430973 Cortex-A8
|
|
|
|
(r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
|
|
|
|
interworking branch is replaced with another code sequence at the
|
|
|
|
same virtual address, whether due to self-modifying code or virtual
|
|
|
|
to physical address re-mapping, Cortex-A8 does not recover from the
|
|
|
|
stale interworking branch prediction. This results in Cortex-A8
|
|
|
|
executing the new code sequence in the incorrect ARM or Thumb state.
|
|
|
|
The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
|
|
|
|
and also flushes the branch target cache at every context switch.
|
|
|
|
Note that setting specific bits in the ACTLR register may not be
|
|
|
|
available in non-secure mode.
|
|
|
|
|
2009-04-30 23:06:15 +07:00
|
|
|
config ARM_ERRATA_458693
|
|
|
|
bool "ARM errata: Processor deadlock when a false hazard is created"
|
|
|
|
depends on CPU_V7
|
|
|
|
help
|
|
|
|
This option enables the workaround for the 458693 Cortex-A8 (r2p0)
|
|
|
|
erratum. For very specific sequences of memory operations, it is
|
|
|
|
possible for a hazard condition intended for a cache line to instead
|
|
|
|
be incorrectly associated with a different cache line. This false
|
|
|
|
hazard might then cause a processor deadlock. The workaround enables
|
|
|
|
the L1 caching of the NEON accesses and disables the PLD instruction
|
|
|
|
in the ACTLR register. Note that setting specific bits in the ACTLR
|
|
|
|
register may not be available in non-secure mode.
|
|
|
|
|
2009-04-30 23:06:20 +07:00
|
|
|
config ARM_ERRATA_460075
|
|
|
|
bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
|
|
|
|
depends on CPU_V7
|
|
|
|
help
|
|
|
|
This option enables the workaround for the 460075 Cortex-A8 (r2p0)
|
|
|
|
erratum. Any asynchronous access to the L2 cache may encounter a
|
|
|
|
situation in which recent store transactions to the L2 cache are lost
|
|
|
|
and overwritten with stale memory contents from external memory. The
|
|
|
|
workaround disables the write-allocate mode for the L2 cache via the
|
|
|
|
ACTLR register. Note that setting specific bits in the ACTLR register
|
|
|
|
may not be available in non-secure mode.
|
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
endmenu
|
|
|
|
|
|
|
|
source "arch/arm/common/Kconfig"
|
|
|
|
|
|
|
|
config FORCE_MAX_ZONEORDER
|
|
|
|
int
|
|
|
|
depends on SA1111
|
|
|
|
default "9"
|
|
|
|
|
|
|
|
menu "Bus support"
|
|
|
|
|
|
|
|
config ARM_AMBA
|
|
|
|
bool
|
|
|
|
|
|
|
|
config ISA
|
|
|
|
bool
|
|
|
|
help
|
|
|
|
Find out whether you have ISA slots on your motherboard. ISA is the
|
|
|
|
name of a bus system, i.e. the way the CPU talks to the other stuff
|
|
|
|
inside your box. Other bus systems are PCI, EISA, MicroChannel
|
|
|
|
(MCA) or VESA. ISA is an older system, now being displaced by PCI;
|
|
|
|
newer boards don't support it. If you have ISA, say Y, otherwise N.
|
|
|
|
|
2006-01-04 22:44:16 +07:00
|
|
|
# Select ISA DMA controller support
|
2005-04-17 05:20:36 +07:00
|
|
|
config ISA_DMA
|
|
|
|
bool
|
2006-01-04 22:44:16 +07:00
|
|
|
select ISA_DMA_API
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2006-01-04 22:44:16 +07:00
|
|
|
# Select ISA DMA interface
|
2005-05-04 11:39:22 +07:00
|
|
|
config ISA_DMA_API
|
|
|
|
bool
|
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
config PCI
|
2007-11-25 14:55:34 +07:00
|
|
|
bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB || ARCH_IXP4XX || ARCH_KS8695 || MACH_ARMCORE
|
2005-04-17 05:20:36 +07:00
|
|
|
help
|
|
|
|
Find out whether you have a PCI motherboard. PCI is the name of a
|
|
|
|
bus system, i.e. the way the CPU talks to the other stuff inside
|
|
|
|
your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
|
|
|
|
VESA. If you have PCI, say Y, otherwise N.
|
|
|
|
|
2007-07-10 23:54:40 +07:00
|
|
|
config PCI_SYSCALL
|
|
|
|
def_bool PCI
|
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
# Select the host bridge type
|
|
|
|
config PCI_HOST_VIA82C505
|
|
|
|
bool
|
|
|
|
depends on PCI && ARCH_SHARK
|
|
|
|
default y
|
|
|
|
|
2007-11-25 14:55:34 +07:00
|
|
|
config PCI_HOST_ITE8152
|
|
|
|
bool
|
|
|
|
depends on PCI && MACH_ARMCORE
|
|
|
|
default y
|
|
|
|
select DMABOUNCE
|
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
source "drivers/pci/Kconfig"
|
|
|
|
|
|
|
|
source "drivers/pcmcia/Kconfig"
|
|
|
|
|
|
|
|
endmenu
|
|
|
|
|
|
|
|
menu "Kernel Features"
|
|
|
|
|
2007-03-14 02:29:24 +07:00
|
|
|
source "kernel/time/Kconfig"
|
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
config SMP
|
|
|
|
bool "Symmetric Multi-Processing (EXPERIMENTAL)"
|
2008-04-19 04:43:14 +07:00
|
|
|
depends on EXPERIMENTAL && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP)
|
2008-06-11 01:48:30 +07:00
|
|
|
select USE_GENERIC_SMP_HELPERS
|
2005-04-17 05:20:36 +07:00
|
|
|
help
|
|
|
|
This enables support for systems with more than one CPU. If you have
|
|
|
|
a system with only one CPU, like most personal computers, say N. If
|
|
|
|
you have a system with more than one CPU, say Y.
|
|
|
|
|
|
|
|
If you say N here, the kernel will run on single and multiprocessor
|
|
|
|
machines, but will use only one CPU of a multiprocessor machine. If
|
|
|
|
you say Y here, the kernel will run on many, but not all, single
|
|
|
|
processor machines. On a single processor machine, the kernel will
|
|
|
|
run faster if you say N here.
|
|
|
|
|
2008-02-03 20:50:21 +07:00
|
|
|
See also <file:Documentation/i386/IO-APIC.txt>,
|
2005-04-17 05:20:36 +07:00
|
|
|
<file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
|
|
|
|
<http://www.linuxdoc.org/docs.html#howto>.
|
|
|
|
|
|
|
|
If you don't know what to do here, say N.
|
|
|
|
|
2008-08-26 03:03:32 +07:00
|
|
|
choice
|
|
|
|
prompt "Memory split"
|
|
|
|
default VMSPLIT_3G
|
|
|
|
help
|
|
|
|
Select the desired split between kernel and user memory.
|
|
|
|
|
|
|
|
If you are not absolutely sure what you are doing, leave this
|
|
|
|
option alone!
|
|
|
|
|
|
|
|
config VMSPLIT_3G
|
|
|
|
bool "3G/1G user/kernel split"
|
|
|
|
config VMSPLIT_2G
|
|
|
|
bool "2G/2G user/kernel split"
|
|
|
|
config VMSPLIT_1G
|
|
|
|
bool "1G/3G user/kernel split"
|
|
|
|
endchoice
|
|
|
|
|
|
|
|
config PAGE_OFFSET
|
|
|
|
hex
|
|
|
|
default 0x40000000 if VMSPLIT_1G
|
|
|
|
default 0x80000000 if VMSPLIT_2G
|
|
|
|
default 0xC0000000
|
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
config NR_CPUS
|
|
|
|
int "Maximum number of CPUs (2-32)"
|
|
|
|
range 2 32
|
|
|
|
depends on SMP
|
|
|
|
default "4"
|
|
|
|
|
2005-11-03 05:24:33 +07:00
|
|
|
config HOTPLUG_CPU
|
|
|
|
bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
|
|
|
|
depends on SMP && HOTPLUG && EXPERIMENTAL
|
|
|
|
help
|
|
|
|
Say Y here to experiment with turning CPUs off and on. CPUs
|
|
|
|
can be controlled through /sys/devices/system/cpu.
|
|
|
|
|
2005-11-09 02:08:05 +07:00
|
|
|
config LOCAL_TIMERS
|
|
|
|
bool "Use local timer interrupts"
|
2008-12-01 21:54:56 +07:00
|
|
|
depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || REALVIEW_EB_A9MP)
|
2005-11-09 02:08:05 +07:00
|
|
|
default y
|
|
|
|
help
|
|
|
|
Enable support for local timers on SMP platforms, rather then the
|
|
|
|
legacy IPI broadcast method. Local timers allows the system
|
|
|
|
accounting to be spread across the timer interval, preventing a
|
|
|
|
"thundering herd" at every timer tick.
|
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
config PREEMPT
|
|
|
|
bool "Preemptible Kernel (EXPERIMENTAL)"
|
|
|
|
depends on EXPERIMENTAL
|
|
|
|
help
|
|
|
|
This option reduces the latency of the kernel when reacting to
|
|
|
|
real-time or interactive events by allowing a low priority process to
|
|
|
|
be preempted even if it is in kernel mode executing a system call.
|
|
|
|
This allows applications to run more reliably even when the system is
|
|
|
|
under load.
|
|
|
|
|
|
|
|
Say Y here if you are building a kernel for a desktop, embedded
|
|
|
|
or real-time system. Say N if you are unsure.
|
|
|
|
|
2006-03-03 05:41:59 +07:00
|
|
|
config HZ
|
|
|
|
int
|
|
|
|
default 128 if ARCH_L7200
|
|
|
|
default 200 if ARCH_EBSA110 || ARCH_S3C2410
|
2006-03-04 18:01:53 +07:00
|
|
|
default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
|
2007-11-12 23:59:10 +07:00
|
|
|
default AT91_TIMER_HZ if ARCH_AT91
|
2006-03-03 05:41:59 +07:00
|
|
|
default 100
|
|
|
|
|
2006-01-14 23:33:50 +07:00
|
|
|
config AEABI
|
|
|
|
bool "Use the ARM EABI to compile the kernel"
|
|
|
|
help
|
|
|
|
This option allows for the kernel to be compiled using the latest
|
|
|
|
ARM ABI (aka EABI). This is only useful if you are using a user
|
|
|
|
space environment that is also compiled with EABI.
|
|
|
|
|
|
|
|
Since there are major incompatibilities between the legacy ABI and
|
|
|
|
EABI, especially with regard to structure member alignment, this
|
|
|
|
option also changes the kernel syscall calling convention to
|
|
|
|
disambiguate both ABIs and allow for backward compatibility support
|
|
|
|
(selected with CONFIG_OABI_COMPAT).
|
|
|
|
|
|
|
|
To use this you need GCC version 4.0.0 or later.
|
|
|
|
|
2006-01-14 23:37:15 +07:00
|
|
|
config OABI_COMPAT
|
2006-02-09 04:09:55 +07:00
|
|
|
bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
|
2006-02-09 04:09:08 +07:00
|
|
|
depends on AEABI && EXPERIMENTAL
|
2006-01-14 23:37:15 +07:00
|
|
|
default y
|
|
|
|
help
|
|
|
|
This option preserves the old syscall interface along with the
|
|
|
|
new (ARM EABI) one. It also provides a compatibility layer to
|
|
|
|
intercept syscalls that have structure arguments which layout
|
|
|
|
in memory differs between the legacy ABI and the new ARM EABI
|
|
|
|
(only for non "thumb" binaries). This option adds a tiny
|
|
|
|
overhead to all syscalls and produces a slightly larger kernel.
|
|
|
|
If you know you'll be using only pure EABI user space then you
|
|
|
|
can say N here. If this option is not selected and you attempt
|
|
|
|
to execute a legacy ABI binary then the result will be
|
|
|
|
UNPREDICTABLE (in fact it can be predicted that it won't work
|
|
|
|
at all). If in doubt say Y.
|
|
|
|
|
2009-05-13 23:34:48 +07:00
|
|
|
config ARCH_HAS_HOLES_MEMORYMODEL
|
2008-08-14 17:10:14 +07:00
|
|
|
bool
|
2009-05-13 23:34:48 +07:00
|
|
|
default n
|
2008-08-14 17:10:14 +07:00
|
|
|
|
2008-10-02 03:39:58 +07:00
|
|
|
# Discontigmem is deprecated
|
2005-06-23 14:07:43 +07:00
|
|
|
config ARCH_DISCONTIGMEM_ENABLE
|
2005-04-17 05:20:36 +07:00
|
|
|
bool
|
|
|
|
|
2006-12-01 03:43:51 +07:00
|
|
|
config ARCH_SPARSEMEM_ENABLE
|
|
|
|
bool
|
|
|
|
|
2008-10-02 03:39:58 +07:00
|
|
|
config ARCH_SPARSEMEM_DEFAULT
|
|
|
|
def_bool ARCH_SPARSEMEM_ENABLE
|
|
|
|
|
2006-12-01 03:43:51 +07:00
|
|
|
config ARCH_SELECT_MEMORY_MODEL
|
2008-10-02 03:39:58 +07:00
|
|
|
def_bool ARCH_DISCONTIGMEM_ENABLE && ARCH_SPARSEMEM_ENABLE
|
2006-12-01 03:43:51 +07:00
|
|
|
|
2006-04-11 12:53:53 +07:00
|
|
|
config NODES_SHIFT
|
|
|
|
int
|
|
|
|
default "4" if ARCH_LH7A40X
|
|
|
|
default "2"
|
|
|
|
depends on NEED_MULTIPLE_NODES
|
|
|
|
|
2008-09-19 11:36:12 +07:00
|
|
|
config HIGHMEM
|
|
|
|
bool "High Memory Support (EXPERIMENTAL)"
|
|
|
|
depends on MMU && EXPERIMENTAL
|
|
|
|
help
|
|
|
|
The address space of ARM processors is only 4 Gigabytes large
|
|
|
|
and it has to accommodate user address space, kernel address
|
|
|
|
space as well as some memory mapped IO. That means that, if you
|
|
|
|
have a large amount of physical memory and/or IO, not all of the
|
|
|
|
memory can be "permanently mapped" by the kernel. The physical
|
|
|
|
memory that is not permanently mapped is called "high memory".
|
|
|
|
|
|
|
|
Depending on the selected kernel/user memory split, minimum
|
|
|
|
vmalloc space and actual amount of RAM, you may not need this
|
|
|
|
option which should result in a slightly faster kernel.
|
|
|
|
|
|
|
|
If unsure, say n.
|
|
|
|
|
2005-06-23 14:07:43 +07:00
|
|
|
source "mm/Kconfig"
|
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
config LEDS
|
|
|
|
bool "Timer and CPU usage LEDs"
|
2008-04-22 07:43:27 +07:00
|
|
|
depends on ARCH_CDB89712 || ARCH_EBSA110 || \
|
2005-04-17 05:20:36 +07:00
|
|
|
ARCH_EBSA285 || ARCH_IMX || ARCH_INTEGRATOR || \
|
|
|
|
ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
|
|
|
|
ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
|
2006-01-10 00:05:41 +07:00
|
|
|
ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
|
2008-09-17 03:36:30 +07:00
|
|
|
ARCH_AT91 || ARCH_DAVINCI || \
|
2007-10-18 01:51:34 +07:00
|
|
|
ARCH_KS8695 || MACH_RD88F5182
|
2005-04-17 05:20:36 +07:00
|
|
|
help
|
|
|
|
If you say Y here, the LEDs on your machine will be used
|
|
|
|
to provide useful information about your current system status.
|
|
|
|
|
|
|
|
If you are compiling a kernel for a NetWinder or EBSA-285, you will
|
|
|
|
be able to select which LEDs are active using the options below. If
|
|
|
|
you are compiling a kernel for the EBSA-110 or the LART however, the
|
|
|
|
red LED will simply flash regularly to indicate that the system is
|
|
|
|
still functional. It is safe to say Y here if you have a CATS
|
|
|
|
system, but the driver will do nothing.
|
|
|
|
|
|
|
|
config LEDS_TIMER
|
|
|
|
bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
|
2007-04-03 02:48:10 +07:00
|
|
|
OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
|
|
|
|
|| MACH_OMAP_PERSEUS2
|
2005-04-17 05:20:36 +07:00
|
|
|
depends on LEDS
|
2007-03-14 02:29:24 +07:00
|
|
|
depends on !GENERIC_CLOCKEVENTS
|
2005-04-17 05:20:36 +07:00
|
|
|
default y if ARCH_EBSA110
|
|
|
|
help
|
|
|
|
If you say Y here, one of the system LEDs (the green one on the
|
|
|
|
NetWinder, the amber one on the EBSA285, or the red one on the LART)
|
|
|
|
will flash regularly to indicate that the system is still
|
|
|
|
operational. This is mainly useful to kernel hackers who are
|
|
|
|
debugging unstable kernels.
|
|
|
|
|
|
|
|
The LART uses the same LED for both Timer LED and CPU usage LED
|
|
|
|
functions. You may choose to use both, but the Timer LED function
|
|
|
|
will overrule the CPU usage LED.
|
|
|
|
|
|
|
|
config LEDS_CPU
|
|
|
|
bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
|
2007-04-03 02:48:10 +07:00
|
|
|
!ARCH_OMAP) \
|
|
|
|
|| OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
|
|
|
|
|| MACH_OMAP_PERSEUS2
|
2005-04-17 05:20:36 +07:00
|
|
|
depends on LEDS
|
|
|
|
help
|
|
|
|
If you say Y here, the red LED will be used to give a good real
|
|
|
|
time indication of CPU usage, by lighting whenever the idle task
|
|
|
|
is not currently executing.
|
|
|
|
|
|
|
|
The LART uses the same LED for both Timer LED and CPU usage LED
|
|
|
|
functions. You may choose to use both, but the Timer LED function
|
|
|
|
will overrule the CPU usage LED.
|
|
|
|
|
|
|
|
config ALIGNMENT_TRAP
|
|
|
|
bool
|
2006-09-26 15:36:37 +07:00
|
|
|
depends on CPU_CP15_MMU
|
2005-04-17 05:20:36 +07:00
|
|
|
default y if !ARCH_EBSA110
|
|
|
|
help
|
2006-10-04 03:53:09 +07:00
|
|
|
ARM processors cannot fetch/store information which is not
|
2005-04-17 05:20:36 +07:00
|
|
|
naturally aligned on the bus, i.e., a 4 byte fetch must start at an
|
|
|
|
address divisible by 4. On 32-bit ARM processors, these non-aligned
|
|
|
|
fetch/store instructions will be emulated in software if you say
|
|
|
|
here, which has a severe performance impact. This is necessary for
|
|
|
|
correct operation of some network protocols. With an IP-only
|
|
|
|
configuration it is safe to say N, otherwise say Y.
|
|
|
|
|
|
|
|
endmenu
|
|
|
|
|
|
|
|
menu "Boot options"
|
|
|
|
|
|
|
|
# Compressed boot loader in ROM. Yes, we really want to ask about
|
|
|
|
# TEXT and BSS so we preserve their values in the config files.
|
|
|
|
config ZBOOT_ROM_TEXT
|
|
|
|
hex "Compressed ROM boot loader base address"
|
|
|
|
default "0"
|
|
|
|
help
|
|
|
|
The physical address at which the ROM-able zImage is to be
|
|
|
|
placed in the target. Platforms which normally make use of
|
|
|
|
ROM-able zImage formats normally set this to a suitable
|
|
|
|
value in their defconfig file.
|
|
|
|
|
|
|
|
If ZBOOT_ROM is not enabled, this has no effect.
|
|
|
|
|
|
|
|
config ZBOOT_ROM_BSS
|
|
|
|
hex "Compressed ROM boot loader BSS address"
|
|
|
|
default "0"
|
|
|
|
help
|
2006-09-21 05:28:51 +07:00
|
|
|
The base address of an area of read/write memory in the target
|
|
|
|
for the ROM-able zImage which must be available while the
|
|
|
|
decompressor is running. It must be large enough to hold the
|
|
|
|
entire decompressed kernel plus an additional 128 KiB.
|
|
|
|
Platforms which normally make use of ROM-able zImage formats
|
|
|
|
normally set this to a suitable value in their defconfig file.
|
2005-04-17 05:20:36 +07:00
|
|
|
|
|
|
|
If ZBOOT_ROM is not enabled, this has no effect.
|
|
|
|
|
|
|
|
config ZBOOT_ROM
|
|
|
|
bool "Compressed boot loader in ROM/flash"
|
|
|
|
depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
|
|
|
|
help
|
|
|
|
Say Y here if you intend to execute your compressed kernel image
|
|
|
|
(zImage) directly from ROM or flash. If unsure, say N.
|
|
|
|
|
|
|
|
config CMDLINE
|
|
|
|
string "Default kernel command string"
|
|
|
|
default ""
|
|
|
|
help
|
|
|
|
On some architectures (EBSA110 and CATS), there is currently no way
|
|
|
|
for the boot loader to pass arguments to the kernel. For these
|
|
|
|
architectures, you should supply some command-line options at build
|
|
|
|
time by entering them here. As a minimum, you should specify the
|
|
|
|
memory size and the root device (e.g., mem=64M root=/dev/nfs).
|
|
|
|
|
|
|
|
config XIP_KERNEL
|
|
|
|
bool "Kernel Execute-In-Place from ROM"
|
|
|
|
depends on !ZBOOT_ROM
|
|
|
|
help
|
|
|
|
Execute-In-Place allows the kernel to run from non-volatile storage
|
|
|
|
directly addressable by the CPU, such as NOR flash. This saves RAM
|
|
|
|
space since the text section of the kernel is not loaded from flash
|
|
|
|
to RAM. Read-write sections, such as the data section and stack,
|
|
|
|
are still copied to RAM. The XIP kernel is not compressed since
|
|
|
|
it has to run directly from flash, so it will take more space to
|
|
|
|
store it. The flash address used to link the kernel object files,
|
|
|
|
and for storing it, is configuration dependent. Therefore, if you
|
|
|
|
say Y here, you must know the proper physical address where to
|
|
|
|
store the kernel image depending on your own flash memory usage.
|
|
|
|
|
|
|
|
Also note that the make target becomes "make xipImage" rather than
|
|
|
|
"make zImage" or "make Image". The final kernel binary to put in
|
|
|
|
ROM memory will be arch/arm/boot/xipImage.
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
|
|
config XIP_PHYS_ADDR
|
|
|
|
hex "XIP Kernel Physical Location"
|
|
|
|
depends on XIP_KERNEL
|
|
|
|
default "0x00080000"
|
|
|
|
help
|
|
|
|
This is the physical address in your flash memory the kernel will
|
|
|
|
be linked for and stored to. This address is dependent on your
|
|
|
|
own flash usage.
|
|
|
|
|
2007-02-07 03:29:00 +07:00
|
|
|
config KEXEC
|
|
|
|
bool "Kexec system call (EXPERIMENTAL)"
|
|
|
|
depends on EXPERIMENTAL
|
|
|
|
help
|
|
|
|
kexec is a system call that implements the ability to shutdown your
|
|
|
|
current kernel, and to start another kernel. It is like a reboot
|
2007-10-20 06:34:40 +07:00
|
|
|
but it is independent of the system firmware. And like a reboot
|
2007-02-07 03:29:00 +07:00
|
|
|
you can start any kernel with it, not just Linux.
|
|
|
|
|
|
|
|
It is an ongoing process to be certain the hardware in a machine
|
|
|
|
is properly shutdown, so do not be surprised if this code does not
|
|
|
|
initially work for you. It may help to enable device hotplugging
|
|
|
|
support.
|
|
|
|
|
2008-01-02 06:56:46 +07:00
|
|
|
config ATAGS_PROC
|
|
|
|
bool "Export atags in procfs"
|
2008-02-22 22:45:18 +07:00
|
|
|
depends on KEXEC
|
|
|
|
default y
|
2008-01-02 06:56:46 +07:00
|
|
|
help
|
|
|
|
Should the atags used to boot the kernel be exported in an "atags"
|
|
|
|
file in procfs. Useful with kexec.
|
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
endmenu
|
|
|
|
|
2008-08-18 23:26:00 +07:00
|
|
|
menu "CPU Power Management"
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-08-18 23:26:00 +07:00
|
|
|
if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP || ARCH_IMX || ARCH_PXA)
|
2005-04-17 05:20:36 +07:00
|
|
|
|
|
|
|
source "drivers/cpufreq/Kconfig"
|
|
|
|
|
|
|
|
config CPU_FREQ_SA1100
|
|
|
|
bool
|
2009-02-20 16:16:01 +07:00
|
|
|
depends on CPU_FREQ && (SA1100_H3100 || SA1100_H3600 || SA1100_LART || SA1100_PLEB || SA1100_BADGE4 || SA1100_HACKKIT)
|
2005-04-17 05:20:36 +07:00
|
|
|
default y
|
|
|
|
|
|
|
|
config CPU_FREQ_SA1110
|
|
|
|
bool
|
|
|
|
depends on CPU_FREQ && (SA1100_ASSABET || SA1100_CERF || SA1100_PT_SYSTEM3)
|
|
|
|
default y
|
|
|
|
|
|
|
|
config CPU_FREQ_INTEGRATOR
|
|
|
|
tristate "CPUfreq driver for ARM Integrator CPUs"
|
|
|
|
depends on ARCH_INTEGRATOR && CPU_FREQ
|
|
|
|
default y
|
|
|
|
help
|
|
|
|
This enables the CPUfreq driver for ARM Integrator CPUs.
|
|
|
|
|
|
|
|
For details, take a look at <file:Documentation/cpu-freq>.
|
|
|
|
|
|
|
|
If in doubt, say Y.
|
|
|
|
|
2006-12-06 23:25:04 +07:00
|
|
|
config CPU_FREQ_IMX
|
|
|
|
tristate "CPUfreq driver for i.MX CPUs"
|
|
|
|
depends on ARCH_IMX && CPU_FREQ
|
|
|
|
default n
|
|
|
|
help
|
|
|
|
This enables the CPUfreq driver for i.MX CPUs.
|
|
|
|
|
|
|
|
If in doubt, say N.
|
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
endif
|
|
|
|
|
2008-08-18 23:26:00 +07:00
|
|
|
source "drivers/cpuidle/Kconfig"
|
|
|
|
|
|
|
|
endmenu
|
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
menu "Floating point emulation"
|
|
|
|
|
|
|
|
comment "At least one emulation must be selected"
|
|
|
|
|
|
|
|
config FPE_NWFPE
|
|
|
|
bool "NWFPE math emulation"
|
2006-01-14 23:36:50 +07:00
|
|
|
depends on !AEABI || OABI_COMPAT
|
2005-04-17 05:20:36 +07:00
|
|
|
---help---
|
|
|
|
Say Y to include the NWFPE floating point emulator in the kernel.
|
|
|
|
This is necessary to run most binaries. Linux does not currently
|
|
|
|
support floating point hardware so you need to say Y here even if
|
|
|
|
your machine has an FPA or floating point co-processor podule.
|
|
|
|
|
|
|
|
You may say N here if you are going to load the Acorn FPEmulator
|
|
|
|
early in the bootup.
|
|
|
|
|
|
|
|
config FPE_NWFPE_XP
|
|
|
|
bool "Support extended precision"
|
2005-11-08 04:12:08 +07:00
|
|
|
depends on FPE_NWFPE
|
2005-04-17 05:20:36 +07:00
|
|
|
help
|
|
|
|
Say Y to include 80-bit support in the kernel floating-point
|
|
|
|
emulator. Otherwise, only 32 and 64-bit support is compiled in.
|
|
|
|
Note that gcc does not generate 80-bit operations by default,
|
|
|
|
so in most cases this option only enlarges the size of the
|
|
|
|
floating point emulator without any good reason.
|
|
|
|
|
|
|
|
You almost surely want to say N here.
|
|
|
|
|
|
|
|
config FPE_FASTFPE
|
|
|
|
bool "FastFPE math emulation (EXPERIMENTAL)"
|
2006-01-14 23:36:50 +07:00
|
|
|
depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
|
2005-04-17 05:20:36 +07:00
|
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---help---
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Say Y here to include the FAST floating point emulator in the kernel.
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This is an experimental much faster emulator which now also has full
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precision for the mantissa. It does not support any exceptions.
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It is very simple, and approximately 3-6 times faster than NWFPE.
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It should be sufficient for most programs. It may be not suitable
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for scientific calculations, but you have to check this for yourself.
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If you do not feel you need a faster FP emulation you should better
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choose NWFPE.
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config VFP
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bool "VFP-format floating point maths"
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2008-01-28 20:21:30 +07:00
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depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
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2005-04-17 05:20:36 +07:00
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help
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Say Y to include VFP support code in the kernel. This is needed
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if your hardware includes a VFP unit.
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Please see <file:Documentation/arm/VFP/release-notes.txt> for
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release notes and additional status information.
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Say N if your target does not have VFP hardware.
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2007-09-25 21:22:24 +07:00
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config VFPv3
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bool
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depends on VFP
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default y if CPU_V7
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2008-01-11 01:16:17 +07:00
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config NEON
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bool "Advanced SIMD (NEON) Extension support"
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depends on VFPv3 && CPU_V7
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help
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Say Y to include support code for NEON, the ARMv7 Advanced SIMD
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Extension.
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2005-04-17 05:20:36 +07:00
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endmenu
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menu "Userspace binary formats"
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source "fs/Kconfig.binfmt"
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config ARTHUR
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tristate "RISC OS personality"
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2006-01-14 23:33:50 +07:00
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depends on !AEABI
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2005-04-17 05:20:36 +07:00
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help
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Say Y here to include the kernel code necessary if you want to run
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Acorn RISC OS/Arthur binaries under Linux. This code is still very
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experimental; if this sounds frightening, say N and sleep in peace.
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You can also say M here to compile this support as a module (which
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will be called arthur).
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endmenu
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menu "Power management options"
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2005-11-15 18:31:41 +07:00
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source "kernel/power/Kconfig"
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2005-04-17 05:20:36 +07:00
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2007-12-08 08:14:00 +07:00
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config ARCH_SUSPEND_POSSIBLE
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def_bool y
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2005-04-17 05:20:36 +07:00
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endmenu
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2005-07-12 11:03:49 +07:00
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source "net/Kconfig"
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2005-04-17 05:20:36 +07:00
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menu "Device Drivers"
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source "drivers/base/Kconfig"
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2005-11-13 03:25:25 +07:00
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source "drivers/connector/Kconfig"
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2006-09-26 15:36:37 +07:00
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if ALIGNMENT_TRAP || !CPU_CP15_MMU
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2005-04-17 05:20:36 +07:00
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source "drivers/mtd/Kconfig"
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endif
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source "drivers/parport/Kconfig"
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source "drivers/pnp/Kconfig"
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source "drivers/block/Kconfig"
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2007-10-13 04:24:09 +07:00
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# misc before ide - BLK_DEV_SGIIOC4 depends on SGI_IOC4
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source "drivers/misc/Kconfig"
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2005-04-17 05:20:36 +07:00
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source "drivers/ide/Kconfig"
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source "drivers/scsi/Kconfig"
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2006-11-17 06:14:35 +07:00
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source "drivers/ata/Kconfig"
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2005-04-17 05:20:36 +07:00
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source "drivers/md/Kconfig"
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source "drivers/message/fusion/Kconfig"
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source "drivers/ieee1394/Kconfig"
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source "drivers/message/i2o/Kconfig"
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2005-07-12 11:03:49 +07:00
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source "drivers/net/Kconfig"
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2005-04-17 05:20:36 +07:00
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source "drivers/isdn/Kconfig"
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# input before char - char/joystick depends on it. As does USB.
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source "drivers/input/Kconfig"
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source "drivers/char/Kconfig"
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source "drivers/i2c/Kconfig"
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[PATCH] spi: simple SPI framework
This is the core of a small SPI framework, implementing the model of a
queue of messages which complete asynchronously (with thin synchronous
wrappers on top).
- It's still less than 2KB of ".text" (ARM). If there's got to be a
mid-layer for something so simple, that's the right size budget. :)
- The guts use board-specific SPI device tables to build the driver
model tree. (Hardware probing is rarely an option.)
- This version of Kconfig includes no drivers. At this writing there
are two known master controller drivers (PXA/SSP, OMAP MicroWire)
and three protocol drivers (CS8415a, ADS7846, DataFlash) with LKML
mentions of other drivers in development.
- No userspace API. There are several implementations to compare.
Implement them like any other driver, and bind them with sysfs.
The changes from last version posted to LKML (on 11-Nov-2005) are minor,
and include:
- One bugfix (removes a FIXME), with the visible effect of making device
names be "spiB.C" where B is the bus number and C is the chipselect.
- The "caller provides DMA mappings" mechanism now has kerneldoc, for
DMA drivers that want to be fancy.
- Hey, the framework init can be subsys_init. Even though board init
logic fires earlier, at arch_init ... since the framework init is
for driver support, and the board init support uses static init.
- Various additional spec/doc clarifications based on discussions
with other folk. It adds a brief "thank you" at the end, for folk
who've helped nudge this framework into existence.
As I've said before, I think that "protocol tweaking" is the main support
that this driver framework will need to evolve.
From: Mark Underwood <basicmark@yahoo.com>
Update the SPI framework to remove a potential priority inversion case by
reverting to kmalloc if the pre-allocated DMA-safe buffer isn't available.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-01-09 04:34:19 +07:00
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source "drivers/spi/Kconfig"
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2008-02-05 13:28:17 +07:00
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source "drivers/gpio/Kconfig"
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2006-03-11 05:30:01 +07:00
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source "drivers/w1/Kconfig"
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2007-10-13 04:24:09 +07:00
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source "drivers/power/Kconfig"
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2005-07-02 23:15:49 +07:00
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source "drivers/hwmon/Kconfig"
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2008-08-18 23:26:00 +07:00
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source "drivers/thermal/Kconfig"
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2007-11-07 21:13:35 +07:00
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source "drivers/watchdog/Kconfig"
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2007-10-13 04:24:09 +07:00
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source "drivers/ssb/Kconfig"
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2005-04-17 05:20:36 +07:00
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2007-10-13 04:24:09 +07:00
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#source "drivers/l3/Kconfig"
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2005-04-17 05:20:36 +07:00
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2005-08-18 16:06:59 +07:00
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source "drivers/mfd/Kconfig"
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2005-04-17 05:20:36 +07:00
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source "drivers/media/Kconfig"
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source "drivers/video/Kconfig"
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source "sound/Kconfig"
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2006-12-12 16:32:42 +07:00
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source "drivers/hid/Kconfig"
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2005-04-17 05:20:36 +07:00
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source "drivers/usb/Kconfig"
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2008-09-17 22:34:11 +07:00
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source "drivers/uwb/Kconfig"
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2005-04-17 05:20:36 +07:00
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source "drivers/mmc/Kconfig"
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2008-08-18 23:26:00 +07:00
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source "drivers/memstick/Kconfig"
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source "drivers/accessibility/Kconfig"
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2007-10-13 04:24:09 +07:00
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source "drivers/leds/Kconfig"
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2006-03-27 16:16:35 +07:00
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source "drivers/rtc/Kconfig"
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2007-01-03 01:10:43 +07:00
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source "drivers/dma/Kconfig"
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2008-01-19 05:26:10 +07:00
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source "drivers/dca/Kconfig"
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2008-08-18 23:26:00 +07:00
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source "drivers/auxdisplay/Kconfig"
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2008-04-30 23:13:42 +07:00
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source "drivers/regulator/Kconfig"
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2008-02-20 03:07:19 +07:00
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source "drivers/uio/Kconfig"
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2008-11-08 06:17:51 +07:00
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source "drivers/staging/Kconfig"
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2005-04-17 05:20:36 +07:00
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endmenu
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source "fs/Kconfig"
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source "arch/arm/Kconfig.debug"
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source "security/Kconfig"
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source "crypto/Kconfig"
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source "lib/Kconfig"
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