2019-02-02 16:41:15 +07:00
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// SPDX-License-Identifier: GPL-2.0
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2018-01-03 01:10:41 +07:00
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/*
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* UEFI Common Platform Error Record (CPER) support
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*
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* Copyright (C) 2017, The Linux Foundation. All rights reserved.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/time.h>
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#include <linux/cper.h>
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#include <linux/dmi.h>
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#include <linux/acpi.h>
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#include <linux/pci.h>
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#include <linux/aer.h>
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#include <linux/printk.h>
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#include <linux/bcd.h>
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#include <acpi/ghes.h>
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#include <ras/ras_event.h>
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static const char * const arm_reg_ctx_strs[] = {
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"AArch32 general purpose registers",
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"AArch32 EL1 context registers",
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"AArch32 EL2 context registers",
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"AArch32 secure context registers",
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"AArch64 general purpose registers",
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"AArch64 EL1 context registers",
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"AArch64 EL2 context registers",
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"AArch64 EL3 context registers",
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"Misc. system register structure",
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};
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2018-01-03 01:10:42 +07:00
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static const char * const arm_err_trans_type_strs[] = {
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"Instruction",
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"Data Access",
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"Generic",
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};
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static const char * const arm_bus_err_op_strs[] = {
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"Generic error (type cannot be determined)",
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"Generic read (type of instruction or data request cannot be determined)",
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"Generic write (type of instruction of data request cannot be determined)",
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"Data read",
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"Data write",
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"Instruction fetch",
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"Prefetch",
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};
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static const char * const arm_cache_err_op_strs[] = {
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"Generic error (type cannot be determined)",
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"Generic read (type of instruction or data request cannot be determined)",
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"Generic write (type of instruction of data request cannot be determined)",
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"Data read",
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"Data write",
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"Instruction fetch",
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"Prefetch",
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"Eviction",
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"Snooping (processor initiated a cache snoop that resulted in an error)",
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"Snooped (processor raised a cache error caused by another processor or device snooping its cache)",
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"Management",
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};
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static const char * const arm_tlb_err_op_strs[] = {
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"Generic error (type cannot be determined)",
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"Generic read (type of instruction or data request cannot be determined)",
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"Generic write (type of instruction of data request cannot be determined)",
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"Data read",
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"Data write",
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"Instruction fetch",
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"Prefetch",
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"Local management operation (processor initiated a TLB management operation that resulted in an error)",
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"External management operation (processor raised a TLB error caused by another processor or device broadcasting TLB operations)",
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};
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static const char * const arm_bus_err_part_type_strs[] = {
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"Local processor originated request",
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"Local processor responded to request",
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"Local processor observed",
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"Generic",
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};
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static const char * const arm_bus_err_addr_space_strs[] = {
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"External Memory Access",
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"Internal Memory Access",
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"Unknown",
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"Device Memory Access",
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};
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static void cper_print_arm_err_info(const char *pfx, u32 type,
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u64 error_info)
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{
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u8 trans_type, op_type, level, participation_type, address_space;
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u16 mem_attributes;
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bool proc_context_corrupt, corrected, precise_pc, restartable_pc;
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bool time_out, access_mode;
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/* If the type is unknown, bail. */
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if (type > CPER_ARM_MAX_TYPE)
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return;
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/*
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* Vendor type errors have error information values that are vendor
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* specific.
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*/
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if (type == CPER_ARM_VENDOR_ERROR)
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return;
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if (error_info & CPER_ARM_ERR_VALID_TRANSACTION_TYPE) {
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trans_type = ((error_info >> CPER_ARM_ERR_TRANSACTION_SHIFT)
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& CPER_ARM_ERR_TRANSACTION_MASK);
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if (trans_type < ARRAY_SIZE(arm_err_trans_type_strs)) {
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printk("%stransaction type: %s\n", pfx,
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arm_err_trans_type_strs[trans_type]);
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}
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}
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if (error_info & CPER_ARM_ERR_VALID_OPERATION_TYPE) {
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op_type = ((error_info >> CPER_ARM_ERR_OPERATION_SHIFT)
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& CPER_ARM_ERR_OPERATION_MASK);
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switch (type) {
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case CPER_ARM_CACHE_ERROR:
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if (op_type < ARRAY_SIZE(arm_cache_err_op_strs)) {
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printk("%soperation type: %s\n", pfx,
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arm_cache_err_op_strs[op_type]);
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}
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break;
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case CPER_ARM_TLB_ERROR:
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if (op_type < ARRAY_SIZE(arm_tlb_err_op_strs)) {
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printk("%soperation type: %s\n", pfx,
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arm_tlb_err_op_strs[op_type]);
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}
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break;
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case CPER_ARM_BUS_ERROR:
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if (op_type < ARRAY_SIZE(arm_bus_err_op_strs)) {
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printk("%soperation type: %s\n", pfx,
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arm_bus_err_op_strs[op_type]);
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}
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break;
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}
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}
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if (error_info & CPER_ARM_ERR_VALID_LEVEL) {
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level = ((error_info >> CPER_ARM_ERR_LEVEL_SHIFT)
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& CPER_ARM_ERR_LEVEL_MASK);
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switch (type) {
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case CPER_ARM_CACHE_ERROR:
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printk("%scache level: %d\n", pfx, level);
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break;
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case CPER_ARM_TLB_ERROR:
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printk("%sTLB level: %d\n", pfx, level);
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break;
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case CPER_ARM_BUS_ERROR:
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printk("%saffinity level at which the bus error occurred: %d\n",
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pfx, level);
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break;
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}
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}
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if (error_info & CPER_ARM_ERR_VALID_PROC_CONTEXT_CORRUPT) {
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proc_context_corrupt = ((error_info >> CPER_ARM_ERR_PC_CORRUPT_SHIFT)
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& CPER_ARM_ERR_PC_CORRUPT_MASK);
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if (proc_context_corrupt)
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printk("%sprocessor context corrupted\n", pfx);
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else
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printk("%sprocessor context not corrupted\n", pfx);
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}
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if (error_info & CPER_ARM_ERR_VALID_CORRECTED) {
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corrected = ((error_info >> CPER_ARM_ERR_CORRECTED_SHIFT)
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& CPER_ARM_ERR_CORRECTED_MASK);
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if (corrected)
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printk("%sthe error has been corrected\n", pfx);
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else
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printk("%sthe error has not been corrected\n", pfx);
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}
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if (error_info & CPER_ARM_ERR_VALID_PRECISE_PC) {
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precise_pc = ((error_info >> CPER_ARM_ERR_PRECISE_PC_SHIFT)
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& CPER_ARM_ERR_PRECISE_PC_MASK);
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if (precise_pc)
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printk("%sPC is precise\n", pfx);
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else
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printk("%sPC is imprecise\n", pfx);
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}
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if (error_info & CPER_ARM_ERR_VALID_RESTARTABLE_PC) {
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restartable_pc = ((error_info >> CPER_ARM_ERR_RESTARTABLE_PC_SHIFT)
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& CPER_ARM_ERR_RESTARTABLE_PC_MASK);
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if (restartable_pc)
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printk("%sProgram execution can be restarted reliably at the PC associated with the error.\n", pfx);
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}
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/* The rest of the fields are specific to bus errors */
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if (type != CPER_ARM_BUS_ERROR)
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return;
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if (error_info & CPER_ARM_ERR_VALID_PARTICIPATION_TYPE) {
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participation_type = ((error_info >> CPER_ARM_ERR_PARTICIPATION_TYPE_SHIFT)
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& CPER_ARM_ERR_PARTICIPATION_TYPE_MASK);
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if (participation_type < ARRAY_SIZE(arm_bus_err_part_type_strs)) {
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printk("%sparticipation type: %s\n", pfx,
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arm_bus_err_part_type_strs[participation_type]);
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}
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}
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if (error_info & CPER_ARM_ERR_VALID_TIME_OUT) {
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time_out = ((error_info >> CPER_ARM_ERR_TIME_OUT_SHIFT)
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& CPER_ARM_ERR_TIME_OUT_MASK);
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if (time_out)
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printk("%srequest timed out\n", pfx);
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}
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if (error_info & CPER_ARM_ERR_VALID_ADDRESS_SPACE) {
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address_space = ((error_info >> CPER_ARM_ERR_ADDRESS_SPACE_SHIFT)
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& CPER_ARM_ERR_ADDRESS_SPACE_MASK);
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if (address_space < ARRAY_SIZE(arm_bus_err_addr_space_strs)) {
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printk("%saddress space: %s\n", pfx,
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arm_bus_err_addr_space_strs[address_space]);
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}
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}
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if (error_info & CPER_ARM_ERR_VALID_MEM_ATTRIBUTES) {
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mem_attributes = ((error_info >> CPER_ARM_ERR_MEM_ATTRIBUTES_SHIFT)
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& CPER_ARM_ERR_MEM_ATTRIBUTES_MASK);
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printk("%smemory access attributes:0x%x\n", pfx, mem_attributes);
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}
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if (error_info & CPER_ARM_ERR_VALID_ACCESS_MODE) {
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access_mode = ((error_info >> CPER_ARM_ERR_ACCESS_MODE_SHIFT)
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& CPER_ARM_ERR_ACCESS_MODE_MASK);
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if (access_mode)
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printk("%saccess mode: normal\n", pfx);
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else
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printk("%saccess mode: secure\n", pfx);
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}
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}
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2018-01-03 01:10:41 +07:00
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void cper_print_proc_arm(const char *pfx,
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const struct cper_sec_proc_arm *proc)
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{
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int i, len, max_ctx_type;
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struct cper_arm_err_info *err_info;
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struct cper_arm_ctx_info *ctx_info;
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2018-01-03 01:10:42 +07:00
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char newpfx[64], infopfx[64];
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2018-01-03 01:10:41 +07:00
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printk("%sMIDR: 0x%016llx\n", pfx, proc->midr);
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len = proc->section_length - (sizeof(*proc) +
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proc->err_info_num * (sizeof(*err_info)));
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if (len < 0) {
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printk("%ssection length: %d\n", pfx, proc->section_length);
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printk("%ssection length is too small\n", pfx);
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printk("%sfirmware-generated error record is incorrect\n", pfx);
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printk("%sERR_INFO_NUM is %d\n", pfx, proc->err_info_num);
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return;
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}
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if (proc->validation_bits & CPER_ARM_VALID_MPIDR)
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printk("%sMultiprocessor Affinity Register (MPIDR): 0x%016llx\n",
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pfx, proc->mpidr);
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if (proc->validation_bits & CPER_ARM_VALID_AFFINITY_LEVEL)
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printk("%serror affinity level: %d\n", pfx,
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proc->affinity_level);
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if (proc->validation_bits & CPER_ARM_VALID_RUNNING_STATE) {
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printk("%srunning state: 0x%x\n", pfx, proc->running_state);
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printk("%sPower State Coordination Interface state: %d\n",
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pfx, proc->psci_state);
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}
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2018-05-04 12:59:48 +07:00
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snprintf(newpfx, sizeof(newpfx), "%s ", pfx);
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2018-01-03 01:10:41 +07:00
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err_info = (struct cper_arm_err_info *)(proc + 1);
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for (i = 0; i < proc->err_info_num; i++) {
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printk("%sError info structure %d:\n", pfx, i);
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printk("%snum errors: %d\n", pfx, err_info->multiple_error + 1);
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if (err_info->validation_bits & CPER_ARM_INFO_VALID_FLAGS) {
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if (err_info->flags & CPER_ARM_INFO_FLAGS_FIRST)
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printk("%sfirst error captured\n", newpfx);
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if (err_info->flags & CPER_ARM_INFO_FLAGS_LAST)
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printk("%slast error captured\n", newpfx);
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if (err_info->flags & CPER_ARM_INFO_FLAGS_PROPAGATED)
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printk("%spropagated error captured\n",
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newpfx);
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if (err_info->flags & CPER_ARM_INFO_FLAGS_OVERFLOW)
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printk("%soverflow occurred, error info is incomplete\n",
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newpfx);
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}
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printk("%serror_type: %d, %s\n", newpfx, err_info->type,
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err_info->type < ARRAY_SIZE(cper_proc_error_type_strs) ?
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cper_proc_error_type_strs[err_info->type] : "unknown");
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2018-01-03 01:10:42 +07:00
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if (err_info->validation_bits & CPER_ARM_INFO_VALID_ERR_INFO) {
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2018-01-03 01:10:41 +07:00
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printk("%serror_info: 0x%016llx\n", newpfx,
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err_info->error_info);
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2018-05-04 12:59:48 +07:00
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snprintf(infopfx, sizeof(infopfx), "%s ", newpfx);
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2018-01-03 01:10:42 +07:00
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cper_print_arm_err_info(infopfx, err_info->type,
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err_info->error_info);
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}
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2018-01-03 01:10:41 +07:00
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if (err_info->validation_bits & CPER_ARM_INFO_VALID_VIRT_ADDR)
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printk("%svirtual fault address: 0x%016llx\n",
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newpfx, err_info->virt_fault_addr);
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if (err_info->validation_bits & CPER_ARM_INFO_VALID_PHYSICAL_ADDR)
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printk("%sphysical fault address: 0x%016llx\n",
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newpfx, err_info->physical_fault_addr);
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err_info += 1;
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}
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ctx_info = (struct cper_arm_ctx_info *)err_info;
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max_ctx_type = ARRAY_SIZE(arm_reg_ctx_strs) - 1;
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for (i = 0; i < proc->context_info_num; i++) {
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int size = sizeof(*ctx_info) + ctx_info->size;
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printk("%sContext info structure %d:\n", pfx, i);
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if (len < size) {
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printk("%ssection length is too small\n", newpfx);
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printk("%sfirmware-generated error record is incorrect\n", pfx);
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return;
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}
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if (ctx_info->type > max_ctx_type) {
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printk("%sInvalid context type: %d (max: %d)\n",
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newpfx, ctx_info->type, max_ctx_type);
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return;
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}
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printk("%sregister context type: %s\n", newpfx,
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arm_reg_ctx_strs[ctx_info->type]);
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print_hex_dump(newpfx, "", DUMP_PREFIX_OFFSET, 16, 4,
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(ctx_info + 1), ctx_info->size, 0);
|
|
|
|
len -= size;
|
|
|
|
ctx_info = (struct cper_arm_ctx_info *)((long)ctx_info + size);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (len > 0) {
|
|
|
|
printk("%sVendor specific error info has %u bytes:\n", pfx,
|
|
|
|
len);
|
|
|
|
print_hex_dump(newpfx, "", DUMP_PREFIX_OFFSET, 16, 4, ctx_info,
|
|
|
|
len, true);
|
|
|
|
}
|
|
|
|
}
|