2009-10-13 14:15:51 +07:00
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/*
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* Linux driver for VMware's vmxnet3 ethernet NIC.
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*
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2016-06-17 00:51:53 +07:00
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* Copyright (C) 2008-2016, VMware, Inc. All Rights Reserved.
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2009-10-13 14:15:51 +07:00
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; version 2 of the License and no later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for more
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* details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* The full GNU General Public License is included in this distribution in
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* the file called "COPYING".
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*
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2016-06-17 00:51:53 +07:00
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* Maintained by: pv-drivers@vmware.com
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2009-10-13 14:15:51 +07:00
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*
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*/
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#ifndef _VMXNET3_INT_H
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#define _VMXNET3_INT_H
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2011-06-23 20:04:39 +07:00
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#include <linux/bitops.h>
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2009-10-13 14:15:51 +07:00
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#include <linux/ethtool.h>
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#include <linux/delay.h>
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#include <linux/netdevice.h>
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#include <linux/pci.h>
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#include <linux/compiler.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include <linux/ioport.h>
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#include <linux/highmem.h>
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#include <linux/timer.h>
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#include <linux/skbuff.h>
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#include <linux/interrupt.h>
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#include <linux/workqueue.h>
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#include <linux/uaccess.h>
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#include <asm/dma.h>
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#include <asm/page.h>
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#include <linux/tcp.h>
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#include <linux/udp.h>
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#include <linux/ip.h>
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#include <linux/ipv6.h>
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#include <linux/in.h>
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#include <linux/etherdevice.h>
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#include <asm/checksum.h>
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#include <linux/if_vlan.h>
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#include <linux/if_arp.h>
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#include <linux/inetdevice.h>
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2011-07-07 14:25:52 +07:00
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#include <linux/log2.h>
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2009-10-13 14:15:51 +07:00
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#include "vmxnet3_defs.h"
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#ifdef DEBUG
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# define VMXNET3_DRIVER_VERSION_REPORT VMXNET3_DRIVER_VERSION_STRING"-NAPI(debug)"
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#else
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# define VMXNET3_DRIVER_VERSION_REPORT VMXNET3_DRIVER_VERSION_STRING"-NAPI"
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#endif
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/*
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* Version numbers
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*/
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2018-05-14 19:14:49 +07:00
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#define VMXNET3_DRIVER_VERSION_STRING "1.4.16.0-k"
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2009-10-13 14:15:51 +07:00
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2018-05-14 19:14:34 +07:00
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/* Each byte of this 32-bit integer encodes a version number in
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* VMXNET3_DRIVER_VERSION_STRING.
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*/
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2018-05-14 19:14:49 +07:00
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#define VMXNET3_DRIVER_VERSION_NUM 0x01041000
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2009-10-13 14:15:51 +07:00
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2010-11-19 17:55:24 +07:00
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#if defined(CONFIG_PCI_MSI)
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/* RSS only makes sense if MSI-X is supported. */
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#define VMXNET3_RSS
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#endif
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2009-10-13 14:15:51 +07:00
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2016-06-17 00:51:53 +07:00
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#define VMXNET3_REV_3 2 /* Vmxnet3 Rev. 3 */
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#define VMXNET3_REV_2 1 /* Vmxnet3 Rev. 2 */
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#define VMXNET3_REV_1 0 /* Vmxnet3 Rev. 1 */
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2009-10-13 14:15:51 +07:00
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/*
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* Capabilities
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*/
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enum {
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VMNET_CAP_SG = 0x0001, /* Can do scatter-gather transmits. */
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VMNET_CAP_IP4_CSUM = 0x0002, /* Can checksum only TCP/UDP over
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* IPv4 */
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VMNET_CAP_HW_CSUM = 0x0004, /* Can checksum all packets. */
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VMNET_CAP_HIGH_DMA = 0x0008, /* Can DMA to high memory. */
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VMNET_CAP_TOE = 0x0010, /* Supports TCP/IP offload. */
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VMNET_CAP_TSO = 0x0020, /* Supports TCP Segmentation
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* offload */
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VMNET_CAP_SW_TSO = 0x0040, /* Supports SW TCP Segmentation */
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VMNET_CAP_VMXNET_APROM = 0x0080, /* Vmxnet APROM support */
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VMNET_CAP_HW_TX_VLAN = 0x0100, /* Can we do VLAN tagging in HW */
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VMNET_CAP_HW_RX_VLAN = 0x0200, /* Can we do VLAN untagging in HW */
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VMNET_CAP_SW_VLAN = 0x0400, /* VLAN tagging/untagging in SW */
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VMNET_CAP_WAKE_PCKT_RCV = 0x0800, /* Can wake on network packet recv? */
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VMNET_CAP_ENABLE_INT_INLINE = 0x1000, /* Enable Interrupt Inline */
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VMNET_CAP_ENABLE_HEADER_COPY = 0x2000, /* copy header for vmkernel */
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VMNET_CAP_TX_CHAIN = 0x4000, /* Guest can use multiple tx entries
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* for a pkt */
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VMNET_CAP_RX_CHAIN = 0x8000, /* pkt can span multiple rx entries */
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VMNET_CAP_LPD = 0x10000, /* large pkt delivery */
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VMNET_CAP_BPF = 0x20000, /* BPF Support in VMXNET Virtual HW*/
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VMNET_CAP_SG_SPAN_PAGES = 0x40000, /* Scatter-gather can span multiple*/
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/* pages transmits */
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VMNET_CAP_IP6_CSUM = 0x80000, /* Can do IPv6 csum offload. */
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VMNET_CAP_TSO6 = 0x100000, /* TSO seg. offload for IPv6 pkts. */
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VMNET_CAP_TSO256k = 0x200000, /* Can do TSO seg offload for */
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/* pkts up to 256kB. */
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VMNET_CAP_UPT = 0x400000 /* Support UPT */
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};
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/*
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2016-10-03 09:10:21 +07:00
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* Maximum devices supported.
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2009-10-13 14:15:51 +07:00
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*/
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#define MAX_ETHERNET_CARDS 10
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#define MAX_PCI_PASSTHRU_DEVICE 6
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struct vmxnet3_cmd_ring {
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union Vmxnet3_GenericDesc *base;
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u32 size;
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u32 next2fill;
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u32 next2comp;
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u8 gen;
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dma_addr_t basePA;
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};
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static inline void
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vmxnet3_cmd_ring_adv_next2fill(struct vmxnet3_cmd_ring *ring)
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{
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ring->next2fill++;
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if (unlikely(ring->next2fill == ring->size)) {
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ring->next2fill = 0;
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VMXNET3_FLIP_RING_GEN(ring->gen);
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}
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}
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static inline void
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vmxnet3_cmd_ring_adv_next2comp(struct vmxnet3_cmd_ring *ring)
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{
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VMXNET3_INC_RING_IDX_ONLY(ring->next2comp, ring->size);
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}
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static inline int
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vmxnet3_cmd_ring_desc_avail(struct vmxnet3_cmd_ring *ring)
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{
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return (ring->next2comp > ring->next2fill ? 0 : ring->size) +
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ring->next2comp - ring->next2fill - 1;
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}
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struct vmxnet3_comp_ring {
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union Vmxnet3_GenericDesc *base;
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u32 size;
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u32 next2proc;
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u8 gen;
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u8 intr_idx;
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dma_addr_t basePA;
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};
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static inline void
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vmxnet3_comp_ring_adv_next2proc(struct vmxnet3_comp_ring *ring)
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{
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ring->next2proc++;
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if (unlikely(ring->next2proc == ring->size)) {
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ring->next2proc = 0;
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VMXNET3_FLIP_RING_GEN(ring->gen);
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}
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}
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struct vmxnet3_tx_data_ring {
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struct Vmxnet3_TxDataDesc *base;
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u32 size;
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dma_addr_t basePA;
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};
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enum vmxnet3_buf_map_type {
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VMXNET3_MAP_INVALID = 0,
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VMXNET3_MAP_NONE,
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VMXNET3_MAP_SINGLE,
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VMXNET3_MAP_PAGE,
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};
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struct vmxnet3_tx_buf_info {
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u32 map_type;
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u16 len;
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u16 sop_idx;
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dma_addr_t dma_addr;
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struct sk_buff *skb;
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};
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struct vmxnet3_tq_driver_stats {
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u64 drop_total; /* # of pkts dropped by the driver, the
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* counters below track droppings due to
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* different reasons
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*/
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u64 drop_too_many_frags;
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u64 drop_oversized_hdr;
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u64 drop_hdr_inspect_err;
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u64 drop_tso;
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u64 tx_ring_full;
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u64 linearized; /* # of pkts linearized */
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u64 copy_skb_header; /* # of times we have to copy skb header */
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u64 oversized_hdr;
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};
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struct vmxnet3_tx_ctx {
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bool ipv4;
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2015-03-01 11:33:09 +07:00
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bool ipv6;
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2009-10-13 14:15:51 +07:00
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u16 mss;
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u32 eth_ip_hdr_size; /* only valid for pkts requesting tso or csum
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* offloading
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*/
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u32 l4_hdr_size; /* only valid if mss != 0 */
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u32 copy_size; /* # of bytes copied into the data ring */
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union Vmxnet3_GenericDesc *sop_txd;
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union Vmxnet3_GenericDesc *eop_txd;
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};
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struct vmxnet3_tx_queue {
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2010-11-19 17:55:24 +07:00
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char name[IFNAMSIZ+8]; /* To identify interrupt */
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struct vmxnet3_adapter *adapter;
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2009-10-13 14:15:51 +07:00
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spinlock_t tx_lock;
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struct vmxnet3_cmd_ring tx_ring;
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2010-11-19 17:55:24 +07:00
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struct vmxnet3_tx_buf_info *buf_info;
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2013-08-23 23:33:49 +07:00
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dma_addr_t buf_info_pa;
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2009-10-13 14:15:51 +07:00
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struct vmxnet3_tx_data_ring data_ring;
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struct vmxnet3_comp_ring comp_ring;
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2010-11-19 17:55:24 +07:00
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struct Vmxnet3_TxQueueCtrl *shared;
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2009-10-13 14:15:51 +07:00
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struct vmxnet3_tq_driver_stats stats;
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bool stopped;
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int num_stop; /* # of times the queue is
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* stopped */
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2010-11-19 17:55:24 +07:00
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int qid;
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2016-06-17 00:51:55 +07:00
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u16 txdata_desc_size;
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2009-10-13 14:15:51 +07:00
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} __attribute__((__aligned__(SMP_CACHE_BYTES)));
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enum vmxnet3_rx_buf_type {
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VMXNET3_RX_BUF_NONE = 0,
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VMXNET3_RX_BUF_SKB = 1,
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VMXNET3_RX_BUF_PAGE = 2
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};
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struct vmxnet3_rx_buf_info {
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enum vmxnet3_rx_buf_type buf_type;
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u16 len;
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union {
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struct sk_buff *skb;
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struct page *page;
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};
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dma_addr_t dma_addr;
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};
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struct vmxnet3_rx_ctx {
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struct sk_buff *skb;
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u32 sop_idx;
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};
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struct vmxnet3_rq_driver_stats {
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u64 drop_total;
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u64 drop_err;
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u64 drop_fcs;
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u64 rx_buf_alloc_failure;
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};
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2016-06-17 00:51:56 +07:00
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struct vmxnet3_rx_data_ring {
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Vmxnet3_RxDataDesc *base;
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dma_addr_t basePA;
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u16 desc_size;
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};
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2009-10-13 14:15:51 +07:00
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struct vmxnet3_rx_queue {
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2010-11-19 17:55:24 +07:00
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char name[IFNAMSIZ + 8]; /* To identify interrupt */
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struct vmxnet3_adapter *adapter;
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struct napi_struct napi;
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2009-10-13 14:15:51 +07:00
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struct vmxnet3_cmd_ring rx_ring[2];
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2016-06-17 00:51:56 +07:00
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struct vmxnet3_rx_data_ring data_ring;
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2009-10-13 14:15:51 +07:00
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struct vmxnet3_comp_ring comp_ring;
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struct vmxnet3_rx_ctx rx_ctx;
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u32 qid; /* rqID in RCD for buffer from 1st ring */
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u32 qid2; /* rqID in RCD for buffer from 2nd ring */
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2016-06-17 00:51:56 +07:00
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u32 dataRingQid; /* rqID in RCD for buffer from data ring */
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2009-10-13 14:15:51 +07:00
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struct vmxnet3_rx_buf_info *buf_info[2];
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2013-08-23 23:33:49 +07:00
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dma_addr_t buf_info_pa;
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2009-10-13 14:15:51 +07:00
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struct Vmxnet3_RxQueueCtrl *shared;
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struct vmxnet3_rq_driver_stats stats;
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} __attribute__((__aligned__(SMP_CACHE_BYTES)));
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2010-11-19 17:55:24 +07:00
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#define VMXNET3_DEVICE_MAX_TX_QUEUES 8
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#define VMXNET3_DEVICE_MAX_RX_QUEUES 8 /* Keep this value as a power of 2 */
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/* Should be less than UPT1_RSS_MAX_IND_TABLE_SIZE */
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#define VMXNET3_RSS_IND_TABLE_SIZE (VMXNET3_DEVICE_MAX_RX_QUEUES * 4)
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#define VMXNET3_LINUX_MAX_MSIX_VECT (VMXNET3_DEVICE_MAX_TX_QUEUES + \
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VMXNET3_DEVICE_MAX_RX_QUEUES + 1)
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2011-01-14 22:00:03 +07:00
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#define VMXNET3_LINUX_MIN_MSIX_VECT 2 /* 1 for tx-rx pair and 1 for event */
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2010-11-19 17:55:24 +07:00
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2009-10-13 14:15:51 +07:00
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struct vmxnet3_intr {
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enum vmxnet3_intr_mask_mode mask_mode;
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enum vmxnet3_intr_type type; /* MSI-X, MSI, or INTx? */
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u8 num_intrs; /* # of intr vectors */
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u8 event_intr_idx; /* idx of the intr vector for event */
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u8 mod_levels[VMXNET3_LINUX_MAX_MSIX_VECT]; /* moderation level */
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2017-07-14 19:07:04 +07:00
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char event_msi_vector_name[IFNAMSIZ+17];
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2009-10-13 14:15:51 +07:00
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#ifdef CONFIG_PCI_MSI
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struct msix_entry msix_entries[VMXNET3_LINUX_MAX_MSIX_VECT];
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#endif
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};
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2010-11-19 17:55:24 +07:00
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/* Interrupt sharing schemes, share_intr */
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#define VMXNET3_INTR_BUDDYSHARE 0 /* Corresponding tx,rx queues share irq */
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#define VMXNET3_INTR_TXSHARE 1 /* All tx queues share one irq */
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#define VMXNET3_INTR_DONTSHARE 2 /* each queue has its own irq */
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2009-10-13 14:15:51 +07:00
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#define VMXNET3_STATE_BIT_RESETTING 0
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#define VMXNET3_STATE_BIT_QUIESCED 1
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struct vmxnet3_adapter {
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2010-11-19 17:55:24 +07:00
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struct vmxnet3_tx_queue tx_queue[VMXNET3_DEVICE_MAX_TX_QUEUES];
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struct vmxnet3_rx_queue rx_queue[VMXNET3_DEVICE_MAX_RX_QUEUES];
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2011-06-23 20:04:39 +07:00
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unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
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2010-11-19 17:55:24 +07:00
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struct vmxnet3_intr intr;
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2011-01-14 21:59:57 +07:00
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spinlock_t cmd_lock;
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2010-11-19 17:55:24 +07:00
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struct Vmxnet3_DriverShared *shared;
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struct Vmxnet3_PMConf *pm_conf;
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struct Vmxnet3_TxQueueDesc *tqd_start; /* all tx queue desc */
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struct Vmxnet3_RxQueueDesc *rqd_start; /* all rx queue desc */
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struct net_device *netdev;
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struct pci_dev *pdev;
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2009-10-13 14:15:51 +07:00
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2010-10-22 01:05:33 +07:00
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u8 __iomem *hw_addr0; /* for BAR 0 */
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u8 __iomem *hw_addr1; /* for BAR 1 */
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2015-06-20 03:38:29 +07:00
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u8 version;
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2010-11-19 17:55:24 +07:00
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#ifdef VMXNET3_RSS
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struct UPT1_RSSConf *rss_conf;
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bool rss;
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#endif
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u32 num_rx_queues;
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u32 num_tx_queues;
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2009-10-13 14:15:51 +07:00
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/* rx buffer related */
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unsigned skb_buf_size;
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int rx_buf_per_pkt; /* only apply to the 1st ring */
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dma_addr_t shared_pa;
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dma_addr_t queue_desc_pa;
|
2016-06-17 00:51:57 +07:00
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dma_addr_t coal_conf_pa;
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2009-10-13 14:15:51 +07:00
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/* Wake-on-LAN */
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u32 wol;
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/* Link speed */
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u32 link_speed; /* in mbps */
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u64 tx_timeout_count;
|
2014-06-13 21:03:21 +07:00
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|
/* Ring sizes */
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|
u32 tx_ring_size;
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u32 rx_ring_size;
|
2015-01-07 00:20:15 +07:00
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|
u32 rx_ring2_size;
|
2014-06-13 21:03:21 +07:00
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|
2016-06-17 00:51:55 +07:00
|
|
|
/* Size of buffer in the data ring */
|
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|
|
u16 txdata_desc_size;
|
2016-06-17 00:51:56 +07:00
|
|
|
u16 rxdata_desc_size;
|
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|
bool rxdataring_enabled;
|
2016-06-17 00:51:55 +07:00
|
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|
2009-10-13 14:15:51 +07:00
|
|
|
struct work_struct work;
|
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|
|
unsigned long state; /* VMXNET3_STATE_BIT_xxx */
|
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|
|
2010-11-19 17:55:24 +07:00
|
|
|
int share_intr;
|
2013-08-23 23:33:49 +07:00
|
|
|
|
2016-06-17 00:51:57 +07:00
|
|
|
struct Vmxnet3_CoalesceScheme *coal_conf;
|
|
|
|
bool default_coal_mode;
|
|
|
|
|
2013-08-23 23:33:49 +07:00
|
|
|
dma_addr_t adapter_pa;
|
|
|
|
dma_addr_t pm_conf_pa;
|
|
|
|
dma_addr_t rss_conf_pa;
|
2009-10-13 14:15:51 +07:00
|
|
|
};
|
|
|
|
|
|
|
|
#define VMXNET3_WRITE_BAR0_REG(adapter, reg, val) \
|
2010-10-31 06:19:18 +07:00
|
|
|
writel((val), (adapter)->hw_addr0 + (reg))
|
2009-10-13 14:15:51 +07:00
|
|
|
#define VMXNET3_READ_BAR0_REG(adapter, reg) \
|
2010-10-31 06:19:18 +07:00
|
|
|
readl((adapter)->hw_addr0 + (reg))
|
2009-10-13 14:15:51 +07:00
|
|
|
|
|
|
|
#define VMXNET3_WRITE_BAR1_REG(adapter, reg, val) \
|
2010-10-31 06:19:18 +07:00
|
|
|
writel((val), (adapter)->hw_addr1 + (reg))
|
2009-10-13 14:15:51 +07:00
|
|
|
#define VMXNET3_READ_BAR1_REG(adapter, reg) \
|
2010-10-31 06:19:18 +07:00
|
|
|
readl((adapter)->hw_addr1 + (reg))
|
2009-10-13 14:15:51 +07:00
|
|
|
|
|
|
|
#define VMXNET3_WAKE_QUEUE_THRESHOLD(tq) (5)
|
|
|
|
#define VMXNET3_RX_ALLOC_THRESHOLD(rq, ring_idx, adapter) \
|
|
|
|
((rq)->rx_ring[ring_idx].size >> 3)
|
|
|
|
|
|
|
|
#define VMXNET3_GET_ADDR_LO(dma) ((u32)(dma))
|
|
|
|
#define VMXNET3_GET_ADDR_HI(dma) ((u32)(((u64)(dma)) >> 32))
|
|
|
|
|
2016-06-17 00:51:53 +07:00
|
|
|
#define VMXNET3_VERSION_GE_2(adapter) \
|
|
|
|
(adapter->version >= VMXNET3_REV_2 + 1)
|
|
|
|
#define VMXNET3_VERSION_GE_3(adapter) \
|
|
|
|
(adapter->version >= VMXNET3_REV_3 + 1)
|
|
|
|
|
2009-10-13 14:15:51 +07:00
|
|
|
/* must be a multiple of VMXNET3_RING_SIZE_ALIGN */
|
|
|
|
#define VMXNET3_DEF_TX_RING_SIZE 512
|
vmxnet3: increase default rx ring sizes
There are several reasons for increasing the receive ring sizes:
1. The original ring size of 256 was chosen about 10 years ago when
vmxnet3 was first created. At that time, 10Gbps Ethernet was not prevalent
and servers were dominated by 1Gbps Ethernet. Now 10Gbps is common place,
and higher bandwidth links -- 25Gbps, 40Gbps, 50Gbps -- are starting
to appear. 256 Rx ring entries are simply not enough to keep up with
higher link speed when there is a burst of network frames coming from
these high speed links. Even with full MTU size frames, they are gone
in a short time. It is also more common to have a mix of frame sizes,
and more likely bi-modal distribution of frame sizes so the average frame
size is not close to full MTU. If we consider average frame size of 800B,
1024 frames that come in a burst takes ~0.65 ms to arrive at 10Gbps. With
256 entires, it takes ~0.16 ms to arrive at 10Gbps. At 25Gbps or 40Gbps,
this time is reduced accordingly.
2. On a hypervisor where there are many VMs and CPU is over committed,
i.e. the number of VCPUs is more than the number of VCPUs, each PCPU is
in effect time shared between multiple VMs/VCPUs. The time granularity at
which this multiplexing occurs is typically coarser than between processes
on a guest OS. Trying to time slice more finely is not efficient, for
example, if memory cache is barely warmed up when switching from one VM
to another occurs. This CPU overcommit adds delay to when the driver
in a VM can service incoming packets. Whether CPU is over committed
really depends on customer workloads. For certain situations, it is very
common. For example, workloads of desktop VMs and product testing setups.
Consolidation and sharing is what drives efficiency of a customer setup
for such workloads. In these situations, the raw network bandwidth may
not be very high, but the delays between when a VM is running or not
running can also be relatively long.
Signed-off-by: Shrikrishna Khare <skhare@vmware.com>
Acked-by: Jin Heo <heoj@vmware.com>
Acked-by: Guolin Yang <gyang@vmware.com>
Acked-by: Boon Ang <bang@vmware.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2017-12-01 01:29:51 +07:00
|
|
|
#define VMXNET3_DEF_RX_RING_SIZE 1024
|
|
|
|
#define VMXNET3_DEF_RX_RING2_SIZE 256
|
2009-10-13 14:15:51 +07:00
|
|
|
|
2016-06-17 00:51:56 +07:00
|
|
|
#define VMXNET3_DEF_RXDATA_DESC_SIZE 128
|
|
|
|
|
2009-10-13 14:15:51 +07:00
|
|
|
#define VMXNET3_MAX_ETH_HDR_SIZE 22
|
|
|
|
#define VMXNET3_MAX_SKB_BUF_SIZE (3*1024)
|
|
|
|
|
2016-06-17 00:51:56 +07:00
|
|
|
#define VMXNET3_GET_RING_IDX(adapter, rqID) \
|
|
|
|
((rqID >= adapter->num_rx_queues && \
|
|
|
|
rqID < 2 * adapter->num_rx_queues) ? 1 : 0) \
|
|
|
|
|
|
|
|
#define VMXNET3_RX_DATA_RING(adapter, rqID) \
|
|
|
|
(rqID >= 2 * adapter->num_rx_queues && \
|
|
|
|
rqID < 3 * adapter->num_rx_queues) \
|
|
|
|
|
2016-06-17 00:51:57 +07:00
|
|
|
#define VMXNET3_COAL_STATIC_DEFAULT_DEPTH 64
|
|
|
|
|
|
|
|
#define VMXNET3_COAL_RBC_RATE(usecs) (1000000 / usecs)
|
|
|
|
#define VMXNET3_COAL_RBC_USECS(rbc_rate) (1000000 / rbc_rate)
|
|
|
|
|
2009-10-13 14:15:51 +07:00
|
|
|
int
|
|
|
|
vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter);
|
|
|
|
|
|
|
|
int
|
|
|
|
vmxnet3_activate_dev(struct vmxnet3_adapter *adapter);
|
|
|
|
|
|
|
|
void
|
|
|
|
vmxnet3_force_close(struct vmxnet3_adapter *adapter);
|
|
|
|
|
|
|
|
void
|
|
|
|
vmxnet3_reset_dev(struct vmxnet3_adapter *adapter);
|
|
|
|
|
|
|
|
void
|
2010-11-19 17:55:24 +07:00
|
|
|
vmxnet3_tq_destroy_all(struct vmxnet3_adapter *adapter);
|
2009-10-13 14:15:51 +07:00
|
|
|
|
|
|
|
void
|
2010-11-19 17:55:24 +07:00
|
|
|
vmxnet3_rq_destroy_all(struct vmxnet3_adapter *adapter);
|
2009-10-13 14:15:51 +07:00
|
|
|
|
2011-04-18 20:31:21 +07:00
|
|
|
int
|
2011-11-15 22:29:55 +07:00
|
|
|
vmxnet3_set_features(struct net_device *netdev, netdev_features_t features);
|
2011-04-18 20:31:21 +07:00
|
|
|
|
2009-10-13 14:15:51 +07:00
|
|
|
int
|
|
|
|
vmxnet3_create_queues(struct vmxnet3_adapter *adapter,
|
2016-06-17 00:51:55 +07:00
|
|
|
u32 tx_ring_size, u32 rx_ring_size, u32 rx_ring2_size,
|
2016-06-17 00:51:56 +07:00
|
|
|
u16 txdata_desc_size, u16 rxdata_desc_size);
|
2009-10-13 14:15:51 +07:00
|
|
|
|
2013-09-24 01:37:59 +07:00
|
|
|
void vmxnet3_set_ethtool_ops(struct net_device *netdev);
|
2011-06-08 21:53:57 +07:00
|
|
|
|
2017-01-07 10:12:52 +07:00
|
|
|
void vmxnet3_get_stats64(struct net_device *dev,
|
|
|
|
struct rtnl_link_stats64 *stats);
|
2009-10-13 14:15:51 +07:00
|
|
|
|
|
|
|
extern char vmxnet3_driver_name[];
|
|
|
|
#endif
|