License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 21:07:57 +07:00
|
|
|
/* SPDX-License-Identifier: GPL-2.0 */
|
2016-08-25 04:25:43 +07:00
|
|
|
#include <linux/atomic.h>
|
|
|
|
|
#include <linux/clk.h>
|
|
|
|
|
#include <linux/delay.h>
|
|
|
|
|
#include <linux/device.h>
|
|
|
|
|
#include <linux/i2c.h>
|
2016-08-25 04:25:45 +07:00
|
|
|
#include <linux/i2c-smbus.h>
|
2016-08-25 04:25:43 +07:00
|
|
|
#include <linux/io.h>
|
|
|
|
|
#include <linux/kernel.h>
|
|
|
|
|
|
|
|
|
|
/* Controller command patterns */
|
|
|
|
|
#define SW_TWSI_V BIT_ULL(63) /* Valid bit */
|
|
|
|
|
#define SW_TWSI_EIA BIT_ULL(61) /* Extended internal address */
|
|
|
|
|
#define SW_TWSI_R BIT_ULL(56) /* Result or read bit */
|
|
|
|
|
#define SW_TWSI_SOVR BIT_ULL(55) /* Size override */
|
|
|
|
|
#define SW_TWSI_SIZE_SHIFT 52
|
|
|
|
|
#define SW_TWSI_ADDR_SHIFT 40
|
|
|
|
|
#define SW_TWSI_IA_SHIFT 32 /* Internal address */
|
|
|
|
|
|
|
|
|
|
/* Controller opcode word (bits 60:57) */
|
|
|
|
|
#define SW_TWSI_OP_SHIFT 57
|
|
|
|
|
#define SW_TWSI_OP_7 (0ULL << SW_TWSI_OP_SHIFT)
|
|
|
|
|
#define SW_TWSI_OP_7_IA (1ULL << SW_TWSI_OP_SHIFT)
|
|
|
|
|
#define SW_TWSI_OP_10 (2ULL << SW_TWSI_OP_SHIFT)
|
|
|
|
|
#define SW_TWSI_OP_10_IA (3ULL << SW_TWSI_OP_SHIFT)
|
|
|
|
|
#define SW_TWSI_OP_TWSI_CLK (4ULL << SW_TWSI_OP_SHIFT)
|
|
|
|
|
#define SW_TWSI_OP_EOP (6ULL << SW_TWSI_OP_SHIFT) /* Extended opcode */
|
|
|
|
|
|
|
|
|
|
/* Controller extended opcode word (bits 34:32) */
|
|
|
|
|
#define SW_TWSI_EOP_SHIFT 32
|
|
|
|
|
#define SW_TWSI_EOP_TWSI_DATA (SW_TWSI_OP_EOP | 1ULL << SW_TWSI_EOP_SHIFT)
|
|
|
|
|
#define SW_TWSI_EOP_TWSI_CTL (SW_TWSI_OP_EOP | 2ULL << SW_TWSI_EOP_SHIFT)
|
|
|
|
|
#define SW_TWSI_EOP_TWSI_CLKCTL (SW_TWSI_OP_EOP | 3ULL << SW_TWSI_EOP_SHIFT)
|
|
|
|
|
#define SW_TWSI_EOP_TWSI_STAT (SW_TWSI_OP_EOP | 3ULL << SW_TWSI_EOP_SHIFT)
|
|
|
|
|
#define SW_TWSI_EOP_TWSI_RST (SW_TWSI_OP_EOP | 7ULL << SW_TWSI_EOP_SHIFT)
|
|
|
|
|
|
|
|
|
|
/* Controller command and status bits */
|
|
|
|
|
#define TWSI_CTL_CE 0x80 /* High level controller enable */
|
|
|
|
|
#define TWSI_CTL_ENAB 0x40 /* Bus enable */
|
|
|
|
|
#define TWSI_CTL_STA 0x20 /* Master-mode start, HW clears when done */
|
|
|
|
|
#define TWSI_CTL_STP 0x10 /* Master-mode stop, HW clears when done */
|
|
|
|
|
#define TWSI_CTL_IFLG 0x08 /* HW event, SW writes 0 to ACK */
|
|
|
|
|
#define TWSI_CTL_AAK 0x04 /* Assert ACK */
|
|
|
|
|
|
|
|
|
|
/* Status values */
|
2018-02-27 22:42:13 +07:00
|
|
|
#define STAT_BUS_ERROR 0x00
|
2016-08-25 04:25:43 +07:00
|
|
|
#define STAT_START 0x08
|
|
|
|
|
#define STAT_REP_START 0x10
|
|
|
|
|
#define STAT_TXADDR_ACK 0x18
|
|
|
|
|
#define STAT_TXADDR_NAK 0x20
|
|
|
|
|
#define STAT_TXDATA_ACK 0x28
|
|
|
|
|
#define STAT_TXDATA_NAK 0x30
|
|
|
|
|
#define STAT_LOST_ARB_38 0x38
|
|
|
|
|
#define STAT_RXADDR_ACK 0x40
|
|
|
|
|
#define STAT_RXADDR_NAK 0x48
|
|
|
|
|
#define STAT_RXDATA_ACK 0x50
|
|
|
|
|
#define STAT_RXDATA_NAK 0x58
|
|
|
|
|
#define STAT_SLAVE_60 0x60
|
|
|
|
|
#define STAT_LOST_ARB_68 0x68
|
|
|
|
|
#define STAT_SLAVE_70 0x70
|
|
|
|
|
#define STAT_LOST_ARB_78 0x78
|
|
|
|
|
#define STAT_SLAVE_80 0x80
|
|
|
|
|
#define STAT_SLAVE_88 0x88
|
|
|
|
|
#define STAT_GENDATA_ACK 0x90
|
|
|
|
|
#define STAT_GENDATA_NAK 0x98
|
|
|
|
|
#define STAT_SLAVE_A0 0xA0
|
|
|
|
|
#define STAT_SLAVE_A8 0xA8
|
|
|
|
|
#define STAT_LOST_ARB_B0 0xB0
|
|
|
|
|
#define STAT_SLAVE_LOST 0xB8
|
|
|
|
|
#define STAT_SLAVE_NAK 0xC0
|
|
|
|
|
#define STAT_SLAVE_ACK 0xC8
|
|
|
|
|
#define STAT_AD2W_ACK 0xD0
|
|
|
|
|
#define STAT_AD2W_NAK 0xD8
|
|
|
|
|
#define STAT_IDLE 0xF8
|
|
|
|
|
|
|
|
|
|
/* TWSI_INT values */
|
|
|
|
|
#define TWSI_INT_ST_INT BIT_ULL(0)
|
|
|
|
|
#define TWSI_INT_TS_INT BIT_ULL(1)
|
|
|
|
|
#define TWSI_INT_CORE_INT BIT_ULL(2)
|
|
|
|
|
#define TWSI_INT_ST_EN BIT_ULL(4)
|
|
|
|
|
#define TWSI_INT_TS_EN BIT_ULL(5)
|
|
|
|
|
#define TWSI_INT_CORE_EN BIT_ULL(6)
|
|
|
|
|
#define TWSI_INT_SDA_OVR BIT_ULL(8)
|
|
|
|
|
#define TWSI_INT_SCL_OVR BIT_ULL(9)
|
|
|
|
|
#define TWSI_INT_SDA BIT_ULL(10)
|
|
|
|
|
#define TWSI_INT_SCL BIT_ULL(11)
|
|
|
|
|
|
|
|
|
|
#define I2C_OCTEON_EVENT_WAIT 80 /* microseconds */
|
|
|
|
|
|
2016-08-25 04:25:46 +07:00
|
|
|
/* Register offsets */
|
|
|
|
|
struct octeon_i2c_reg_offset {
|
|
|
|
|
unsigned int sw_twsi;
|
|
|
|
|
unsigned int twsi_int;
|
|
|
|
|
unsigned int sw_twsi_ext;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
#define SW_TWSI(x) (x->roff.sw_twsi)
|
|
|
|
|
#define TWSI_INT(x) (x->roff.twsi_int)
|
|
|
|
|
#define SW_TWSI_EXT(x) (x->roff.sw_twsi_ext)
|
|
|
|
|
|
2016-08-25 04:25:43 +07:00
|
|
|
struct octeon_i2c {
|
|
|
|
|
wait_queue_head_t queue;
|
|
|
|
|
struct i2c_adapter adap;
|
2016-08-25 04:25:46 +07:00
|
|
|
struct octeon_i2c_reg_offset roff;
|
2016-08-25 04:25:44 +07:00
|
|
|
struct clk *clk;
|
2016-08-25 04:25:43 +07:00
|
|
|
int irq;
|
|
|
|
|
int hlc_irq; /* For cn7890 only */
|
|
|
|
|
u32 twsi_freq;
|
|
|
|
|
int sys_freq;
|
|
|
|
|
void __iomem *twsi_base;
|
|
|
|
|
struct device *dev;
|
|
|
|
|
bool hlc_enabled;
|
|
|
|
|
bool broken_irq_mode;
|
|
|
|
|
bool broken_irq_check;
|
|
|
|
|
void (*int_enable)(struct octeon_i2c *);
|
|
|
|
|
void (*int_disable)(struct octeon_i2c *);
|
|
|
|
|
void (*hlc_int_enable)(struct octeon_i2c *);
|
|
|
|
|
void (*hlc_int_disable)(struct octeon_i2c *);
|
|
|
|
|
atomic_t int_enable_cnt;
|
|
|
|
|
atomic_t hlc_int_enable_cnt;
|
2016-08-25 04:25:45 +07:00
|
|
|
struct i2c_smbus_alert_setup alert_data;
|
|
|
|
|
struct i2c_client *ara;
|
2016-08-25 04:25:43 +07:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static inline void octeon_i2c_writeq_flush(u64 val, void __iomem *addr)
|
|
|
|
|
{
|
|
|
|
|
__raw_writeq(val, addr);
|
|
|
|
|
__raw_readq(addr); /* wait for write to land */
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* octeon_i2c_reg_write - write an I2C core register
|
|
|
|
|
* @i2c: The struct octeon_i2c
|
|
|
|
|
* @eop_reg: Register selector
|
|
|
|
|
* @data: Value to be written
|
|
|
|
|
*
|
|
|
|
|
* The I2C core registers are accessed indirectly via the SW_TWSI CSR.
|
|
|
|
|
*/
|
|
|
|
|
static inline void octeon_i2c_reg_write(struct octeon_i2c *i2c, u64 eop_reg, u8 data)
|
|
|
|
|
{
|
2016-12-09 16:31:57 +07:00
|
|
|
int tries = 1000;
|
2016-08-25 04:25:43 +07:00
|
|
|
u64 tmp;
|
|
|
|
|
|
2016-08-25 04:25:46 +07:00
|
|
|
__raw_writeq(SW_TWSI_V | eop_reg | data, i2c->twsi_base + SW_TWSI(i2c));
|
2016-11-15 01:50:43 +07:00
|
|
|
do {
|
|
|
|
|
tmp = __raw_readq(i2c->twsi_base + SW_TWSI(i2c));
|
2016-12-09 16:31:57 +07:00
|
|
|
if (--tries < 0)
|
|
|
|
|
return;
|
2016-11-15 01:50:43 +07:00
|
|
|
} while ((tmp & SW_TWSI_V) != 0);
|
2016-08-25 04:25:43 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#define octeon_i2c_ctl_write(i2c, val) \
|
|
|
|
|
octeon_i2c_reg_write(i2c, SW_TWSI_EOP_TWSI_CTL, val)
|
|
|
|
|
#define octeon_i2c_data_write(i2c, val) \
|
|
|
|
|
octeon_i2c_reg_write(i2c, SW_TWSI_EOP_TWSI_DATA, val)
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* octeon_i2c_reg_read - read lower bits of an I2C core register
|
|
|
|
|
* @i2c: The struct octeon_i2c
|
|
|
|
|
* @eop_reg: Register selector
|
|
|
|
|
*
|
|
|
|
|
* Returns the data.
|
|
|
|
|
*
|
|
|
|
|
* The I2C core registers are accessed indirectly via the SW_TWSI CSR.
|
|
|
|
|
*/
|
2016-12-09 16:31:57 +07:00
|
|
|
static inline int octeon_i2c_reg_read(struct octeon_i2c *i2c, u64 eop_reg,
|
|
|
|
|
int *error)
|
2016-08-25 04:25:43 +07:00
|
|
|
{
|
2016-12-09 16:31:57 +07:00
|
|
|
int tries = 1000;
|
2016-08-25 04:25:43 +07:00
|
|
|
u64 tmp;
|
|
|
|
|
|
2016-08-25 04:25:46 +07:00
|
|
|
__raw_writeq(SW_TWSI_V | eop_reg | SW_TWSI_R, i2c->twsi_base + SW_TWSI(i2c));
|
2016-11-15 01:50:43 +07:00
|
|
|
do {
|
|
|
|
|
tmp = __raw_readq(i2c->twsi_base + SW_TWSI(i2c));
|
2016-12-09 16:31:57 +07:00
|
|
|
if (--tries < 0) {
|
|
|
|
|
/* signal that the returned data is invalid */
|
|
|
|
|
if (error)
|
|
|
|
|
*error = -EIO;
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
2016-11-15 01:50:43 +07:00
|
|
|
} while ((tmp & SW_TWSI_V) != 0);
|
2016-08-25 04:25:43 +07:00
|
|
|
|
|
|
|
|
return tmp & 0xFF;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#define octeon_i2c_ctl_read(i2c) \
|
2016-12-09 16:31:57 +07:00
|
|
|
octeon_i2c_reg_read(i2c, SW_TWSI_EOP_TWSI_CTL, NULL)
|
|
|
|
|
#define octeon_i2c_data_read(i2c, error) \
|
|
|
|
|
octeon_i2c_reg_read(i2c, SW_TWSI_EOP_TWSI_DATA, error)
|
2016-08-25 04:25:43 +07:00
|
|
|
#define octeon_i2c_stat_read(i2c) \
|
2016-12-09 16:31:57 +07:00
|
|
|
octeon_i2c_reg_read(i2c, SW_TWSI_EOP_TWSI_STAT, NULL)
|
2016-08-25 04:25:43 +07:00
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* octeon_i2c_read_int - read the TWSI_INT register
|
|
|
|
|
* @i2c: The struct octeon_i2c
|
|
|
|
|
*
|
|
|
|
|
* Returns the value of the register.
|
|
|
|
|
*/
|
|
|
|
|
static inline u64 octeon_i2c_read_int(struct octeon_i2c *i2c)
|
|
|
|
|
{
|
2016-08-25 04:25:46 +07:00
|
|
|
return __raw_readq(i2c->twsi_base + TWSI_INT(i2c));
|
2016-08-25 04:25:43 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* octeon_i2c_write_int - write the TWSI_INT register
|
|
|
|
|
* @i2c: The struct octeon_i2c
|
|
|
|
|
* @data: Value to be written
|
|
|
|
|
*/
|
|
|
|
|
static inline void octeon_i2c_write_int(struct octeon_i2c *i2c, u64 data)
|
|
|
|
|
{
|
2016-08-25 04:25:46 +07:00
|
|
|
octeon_i2c_writeq_flush(data, i2c->twsi_base + TWSI_INT(i2c));
|
2016-08-25 04:25:43 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Prototypes */
|
|
|
|
|
irqreturn_t octeon_i2c_isr(int irq, void *dev_id);
|
|
|
|
|
int octeon_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num);
|
|
|
|
|
int octeon_i2c_init_lowlevel(struct octeon_i2c *i2c);
|
|
|
|
|
void octeon_i2c_set_clock(struct octeon_i2c *i2c);
|
|
|
|
|
extern struct i2c_bus_recovery_info octeon_i2c_recovery_info;
|