License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 21:07:57 +07:00
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/* SPDX-License-Identifier: GPL-2.0 */
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[ARM] pxa: add MFP-alike pin configuration support for pxa{25x, 27x}
Pin configuration on pxa{25x,27x} has now separated from generic GPIO
into dedicated mfp-pxa2xx.c by this patch. The name "mfp" is borrowed
from pxa3xx and is used here to alert the difference between the two
concepts: pin configuration and generic GPIOs. A GPIO can be called
a "GPIO" _only_ when the corresponding pin is configured so.
A pin configuration on pxa{25x,27x} is composed of:
- alternate function selection (or pin mux as commonly called)
- low power state or sleep state
- wakeup enabling from low power mode
The following MFP_xxx bit definitions in mfp.h are re-used:
- MFP_PIN(x)
- MFP_AFx
- MFP_LPM_DRIVE_{LOW, HIGH}
- MFP_LPM_EDGE_*
Selecting alternate function on pxa{25x, 27x} involves configuration
of GPIO direction register GPDRx, so a new bit and MFP_DIR_{IN, OUT}
are introduced. And pin configurations are defined by the following
two macros:
- MFP_CFG_IN : for input alternate functions
- MFP_CFG_OUT : for output alternate functions
Every configuration should provide a low power state if it configured
as output using MFP_CFG_OUT(). As a general guideline, the low power
state should be decided to minimize the overall power dissipation. As
an example, it is better to drive the pin as high level in low power
mode if the GPIO is configured as an active low chip select.
Pins configured as GPIO are defined by MFP_CFG_IN(). This is to avoid
side effects when it is firstly configured as output. The actual
direction of the GPIO is configured by gpio_direction_{input, output}
Wakeup enabling on pxa{25x, 27x} is actually GPIO based wakeup, thus
the device based enable_irq_wake() mechanism is not applicable here.
E.g. invoking enable_irq_wake() with a GPIO IRQ as in the following
code to enable OTG wakeup is by no means portable and intuitive, and
it is valid _only_ when GPIO35 is configured as USB_P2_1:
enable_irq_wake( gpio_to_irq(35) );
To make things worse, not every GPIO is able to wakeup the system.
Only a small number of them can, on either rising or falling edge,
or when level is high (for keypad GPIOs).
Thus, another new bit is introduced to indicate that the GPIO will
wakeup the system:
- MFP_LPM_WAKEUP_ENABLE
The following macros can be used in platform code, and be OR'ed to
the GPIO configuration to enable its wakeup:
- WAKEUP_ON_EDGE_{RISE, FALL, BOTH}
- WAKEUP_ON_LEVEL_HIGH
The WAKEUP_ON_LEVEL_HIGH is used for keypad GPIOs _only_, there is
no edge settings for those GPIOs.
These WAKEUP_ON_* flags OR'ed on wrong GPIOs will be ignored in case
that platform code author is careless enough.
The tradeoff here is that the wakeup source is fully determined by
the platform configuration, instead of enable_irq_wake().
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-03-05 16:16:29 +07:00
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#ifndef __ASM_ARCH_MFP_PXA25X_H
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#define __ASM_ARCH_MFP_PXA25X_H
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2015-01-30 16:45:33 +07:00
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#include "mfp-pxa2xx.h"
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[ARM] pxa: add MFP-alike pin configuration support for pxa{25x, 27x}
Pin configuration on pxa{25x,27x} has now separated from generic GPIO
into dedicated mfp-pxa2xx.c by this patch. The name "mfp" is borrowed
from pxa3xx and is used here to alert the difference between the two
concepts: pin configuration and generic GPIOs. A GPIO can be called
a "GPIO" _only_ when the corresponding pin is configured so.
A pin configuration on pxa{25x,27x} is composed of:
- alternate function selection (or pin mux as commonly called)
- low power state or sleep state
- wakeup enabling from low power mode
The following MFP_xxx bit definitions in mfp.h are re-used:
- MFP_PIN(x)
- MFP_AFx
- MFP_LPM_DRIVE_{LOW, HIGH}
- MFP_LPM_EDGE_*
Selecting alternate function on pxa{25x, 27x} involves configuration
of GPIO direction register GPDRx, so a new bit and MFP_DIR_{IN, OUT}
are introduced. And pin configurations are defined by the following
two macros:
- MFP_CFG_IN : for input alternate functions
- MFP_CFG_OUT : for output alternate functions
Every configuration should provide a low power state if it configured
as output using MFP_CFG_OUT(). As a general guideline, the low power
state should be decided to minimize the overall power dissipation. As
an example, it is better to drive the pin as high level in low power
mode if the GPIO is configured as an active low chip select.
Pins configured as GPIO are defined by MFP_CFG_IN(). This is to avoid
side effects when it is firstly configured as output. The actual
direction of the GPIO is configured by gpio_direction_{input, output}
Wakeup enabling on pxa{25x, 27x} is actually GPIO based wakeup, thus
the device based enable_irq_wake() mechanism is not applicable here.
E.g. invoking enable_irq_wake() with a GPIO IRQ as in the following
code to enable OTG wakeup is by no means portable and intuitive, and
it is valid _only_ when GPIO35 is configured as USB_P2_1:
enable_irq_wake( gpio_to_irq(35) );
To make things worse, not every GPIO is able to wakeup the system.
Only a small number of them can, on either rising or falling edge,
or when level is high (for keypad GPIOs).
Thus, another new bit is introduced to indicate that the GPIO will
wakeup the system:
- MFP_LPM_WAKEUP_ENABLE
The following macros can be used in platform code, and be OR'ed to
the GPIO configuration to enable its wakeup:
- WAKEUP_ON_EDGE_{RISE, FALL, BOTH}
- WAKEUP_ON_LEVEL_HIGH
The WAKEUP_ON_LEVEL_HIGH is used for keypad GPIOs _only_, there is
no edge settings for those GPIOs.
These WAKEUP_ON_* flags OR'ed on wrong GPIOs will be ignored in case
that platform code author is careless enough.
The tradeoff here is that the wakeup source is fully determined by
the platform configuration, instead of enable_irq_wake().
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-03-05 16:16:29 +07:00
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/* GPIO */
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#define GPIO2_GPIO MFP_CFG_IN(GPIO2, AF0)
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#define GPIO3_GPIO MFP_CFG_IN(GPIO3, AF0)
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#define GPIO4_GPIO MFP_CFG_IN(GPIO4, AF0)
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#define GPIO5_GPIO MFP_CFG_IN(GPIO5, AF0)
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#define GPIO6_GPIO MFP_CFG_IN(GPIO6, AF0)
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#define GPIO7_GPIO MFP_CFG_IN(GPIO7, AF0)
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#define GPIO8_GPIO MFP_CFG_IN(GPIO8, AF0)
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#define GPIO1_RST MFP_CFG_IN(GPIO1, AF1)
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/* Crystal and Clock Signals */
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#define GPIO10_RTCCLK MFP_CFG_OUT(GPIO10, AF1, DRIVE_LOW)
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2008-07-21 15:20:54 +07:00
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#define GPIO70_RTCCLK MFP_CFG_OUT(GPIO70, AF1, DRIVE_LOW)
|
[ARM] pxa: add MFP-alike pin configuration support for pxa{25x, 27x}
Pin configuration on pxa{25x,27x} has now separated from generic GPIO
into dedicated mfp-pxa2xx.c by this patch. The name "mfp" is borrowed
from pxa3xx and is used here to alert the difference between the two
concepts: pin configuration and generic GPIOs. A GPIO can be called
a "GPIO" _only_ when the corresponding pin is configured so.
A pin configuration on pxa{25x,27x} is composed of:
- alternate function selection (or pin mux as commonly called)
- low power state or sleep state
- wakeup enabling from low power mode
The following MFP_xxx bit definitions in mfp.h are re-used:
- MFP_PIN(x)
- MFP_AFx
- MFP_LPM_DRIVE_{LOW, HIGH}
- MFP_LPM_EDGE_*
Selecting alternate function on pxa{25x, 27x} involves configuration
of GPIO direction register GPDRx, so a new bit and MFP_DIR_{IN, OUT}
are introduced. And pin configurations are defined by the following
two macros:
- MFP_CFG_IN : for input alternate functions
- MFP_CFG_OUT : for output alternate functions
Every configuration should provide a low power state if it configured
as output using MFP_CFG_OUT(). As a general guideline, the low power
state should be decided to minimize the overall power dissipation. As
an example, it is better to drive the pin as high level in low power
mode if the GPIO is configured as an active low chip select.
Pins configured as GPIO are defined by MFP_CFG_IN(). This is to avoid
side effects when it is firstly configured as output. The actual
direction of the GPIO is configured by gpio_direction_{input, output}
Wakeup enabling on pxa{25x, 27x} is actually GPIO based wakeup, thus
the device based enable_irq_wake() mechanism is not applicable here.
E.g. invoking enable_irq_wake() with a GPIO IRQ as in the following
code to enable OTG wakeup is by no means portable and intuitive, and
it is valid _only_ when GPIO35 is configured as USB_P2_1:
enable_irq_wake( gpio_to_irq(35) );
To make things worse, not every GPIO is able to wakeup the system.
Only a small number of them can, on either rising or falling edge,
or when level is high (for keypad GPIOs).
Thus, another new bit is introduced to indicate that the GPIO will
wakeup the system:
- MFP_LPM_WAKEUP_ENABLE
The following macros can be used in platform code, and be OR'ed to
the GPIO configuration to enable its wakeup:
- WAKEUP_ON_EDGE_{RISE, FALL, BOTH}
- WAKEUP_ON_LEVEL_HIGH
The WAKEUP_ON_LEVEL_HIGH is used for keypad GPIOs _only_, there is
no edge settings for those GPIOs.
These WAKEUP_ON_* flags OR'ed on wrong GPIOs will be ignored in case
that platform code author is careless enough.
The tradeoff here is that the wakeup source is fully determined by
the platform configuration, instead of enable_irq_wake().
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-03-05 16:16:29 +07:00
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#define GPIO7_48MHz MFP_CFG_OUT(GPIO7, AF1, DRIVE_LOW)
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#define GPIO11_3_6MHz MFP_CFG_OUT(GPIO11, AF1, DRIVE_LOW)
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#define GPIO71_3_6MHz MFP_CFG_OUT(GPIO71, AF1, DRIVE_LOW)
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#define GPIO12_32KHz MFP_CFG_OUT(GPIO12, AF1, DRIVE_LOW)
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#define GPIO72_32kHz MFP_CFG_OUT(GPIO72, AF1, DRIVE_LOW)
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/* SDRAM and Static Memory I/O Signals */
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#define GPIO15_nCS_1 MFP_CFG_OUT(GPIO15, AF2, DRIVE_HIGH)
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#define GPIO78_nCS_2 MFP_CFG_OUT(GPIO78, AF2, DRIVE_HIGH)
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#define GPIO79_nCS_3 MFP_CFG_OUT(GPIO79, AF2, DRIVE_HIGH)
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#define GPIO80_nCS_4 MFP_CFG_OUT(GPIO80, AF2, DRIVE_HIGH)
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#define GPIO33_nCS_5 MFP_CFG_OUT(GPIO33, AF2, DRIVE_HIGH)
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/* Miscellaneous I/O and DMA Signals */
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#define GPIO18_RDY MFP_CFG_IN(GPIO18, AF1)
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#define GPIO20_DREQ_0 MFP_CFG_IN(GPIO20, AF1)
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#define GPIO19_DREQ_1 MFP_CFG_IN(GPIO19, AF1)
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/* Alternate Bus Master Mode I/O Signals */
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#define GPIO13_MBGNT MFP_CFG_OUT(GPIO13, AF2, DRIVE_LOW)
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#define GPIO73_MBGNT MFP_CFG_OUT(GPIO73, AF1, DRIVE_LOW)
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#define GPIO14_MBREQ MFP_CFG_IN(GPIO14, AF1)
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#define GPIO66_MBREQ MFP_CFG_IN(GPIO66, AF1)
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/* PC CARD */
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#define GPIO52_nPCE_1 MFP_CFG_OUT(GPIO52, AF2, DRIVE_HIGH)
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#define GPIO53_nPCE_2 MFP_CFG_OUT(GPIO53, AF2, DRIVE_HIGH)
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#define GPIO55_nPREG MFP_CFG_OUT(GPIO55, AF2, DRIVE_HIGH)
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#define GPIO50_nPIOR MFP_CFG_OUT(GPIO50, AF2, DRIVE_HIGH)
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#define GPIO51_nPIOW MFP_CFG_OUT(GPIO51, AF2, DRIVE_HIGH)
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#define GPIO49_nPWE MFP_CFG_OUT(GPIO49, AF2, DRIVE_HIGH)
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#define GPIO48_nPOE MFP_CFG_OUT(GPIO48, AF2, DRIVE_HIGH)
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#define GPIO57_nIOIS16 MFP_CFG_IN(GPIO57, AF1)
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#define GPIO56_nPWAIT MFP_CFG_IN(GPIO56, AF1)
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#define GPIO54_nPSKTSEL MFP_CFG_OUT(GPIO54, AF2, DRIVE_HIGH)
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/* FFUART */
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#define GPIO34_FFUART_RXD MFP_CFG_IN(GPIO34, AF1)
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#define GPIO35_FFUART_CTS MFP_CFG_IN(GPIO35, AF1)
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#define GPIO36_FFUART_DCD MFP_CFG_IN(GPIO36, AF1)
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#define GPIO37_FFUART_DSR MFP_CFG_IN(GPIO37, AF1)
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#define GPIO38_FFUART_RI MFP_CFG_IN(GPIO38, AF1)
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#define GPIO39_FFUART_TXD MFP_CFG_OUT(GPIO39, AF2, DRIVE_HIGH)
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#define GPIO40_FFUART_DTR MFP_CFG_OUT(GPIO40, AF2, DRIVE_HIGH)
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#define GPIO41_FFUART_RTS MFP_CFG_OUT(GPIO41, AF2, DRIVE_HIGH)
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/* BTUART */
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#define GPIO42_BTUART_RXD MFP_CFG_IN(GPIO42, AF1)
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#define GPIO43_BTUART_TXD MFP_CFG_OUT(GPIO43, AF2, DRIVE_HIGH)
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#define GPIO44_BTUART_CTS MFP_CFG_IN(GPIO44, AF1)
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#define GPIO45_BTUART_RTS MFP_CFG_OUT(GPIO45, AF2, DRIVE_HIGH)
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/* STUART */
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#define GPIO46_STUART_RXD MFP_CFG_IN(GPIO46, AF2)
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#define GPIO47_STUART_TXD MFP_CFG_OUT(GPIO47, AF1, DRIVE_HIGH)
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/* HWUART */
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#define GPIO42_HWUART_RXD MFP_CFG_IN(GPIO42, AF3)
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#define GPIO43_HWUART_TXD MFP_CFG_OUT(GPIO43, AF3, DRIVE_HIGH)
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#define GPIO44_HWUART_CTS MFP_CFG_IN(GPIO44, AF3)
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#define GPIO45_HWUART_RTS MFP_CFG_OUT(GPIO45, AF3, DRIVE_HIGH)
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#define GPIO48_HWUART_TXD MFP_CFG_OUT(GPIO48, AF1, DRIVE_HIGH)
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#define GPIO49_HWUART_RXD MFP_CFG_IN(GPIO49, AF1)
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#define GPIO50_HWUART_CTS MFP_CFG_IN(GPIO50, AF1)
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#define GPIO51_HWUART_RTS MFP_CFG_OUT(GPIO51, AF1, DRIVE_HIGH)
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/* FICP */
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#define GPIO46_FICP_RXD MFP_CFG_IN(GPIO46, AF1)
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#define GPIO47_FICP_TXD MFP_CFG_OUT(GPIO47, AF2, DRIVE_HIGH)
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/* PWM 0/1 */
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#define GPIO16_PWM0_OUT MFP_CFG_OUT(GPIO16, AF2, DRIVE_LOW)
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#define GPIO17_PWM1_OUT MFP_CFG_OUT(GPIO17, AF2, DRIVE_LOW)
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/* AC97 */
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#define GPIO28_AC97_BITCLK MFP_CFG_IN(GPIO28, AF1)
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#define GPIO29_AC97_SDATA_IN_0 MFP_CFG_IN(GPIO29, AF1)
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#define GPIO30_AC97_SDATA_OUT MFP_CFG_OUT(GPIO30, AF2, DRIVE_LOW)
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#define GPIO31_AC97_SYNC MFP_CFG_OUT(GPIO31, AF2, DRIVE_LOW)
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#define GPIO32_AC97_SDATA_IN_1 MFP_CFG_IN(GPIO32, AF1)
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/* I2S */
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#define GPIO28_I2S_BITCLK_IN MFP_CFG_IN(GPIO28, AF2)
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#define GPIO28_I2S_BITCLK_OUT MFP_CFG_OUT(GPIO28, AF1, DRIVE_LOW)
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#define GPIO29_I2S_SDATA_IN MFP_CFG_IN(GPIO29, AF2)
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#define GPIO30_I2S_SDATA_OUT MFP_CFG_OUT(GPIO30, AF1, DRIVE_LOW)
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#define GPIO31_I2S_SYNC MFP_CFG_OUT(GPIO31, AF1, DRIVE_LOW)
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#define GPIO32_I2S_SYSCLK MFP_CFG_OUT(GPIO32, AF1, DRIVE_LOW)
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/* SSP 1 */
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#define GPIO23_SSP1_SCLK MFP_CFG_OUT(GPIO23, AF2, DRIVE_LOW)
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#define GPIO24_SSP1_SFRM MFP_CFG_OUT(GPIO24, AF2, DRIVE_LOW)
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#define GPIO25_SSP1_TXD MFP_CFG_OUT(GPIO25, AF2, DRIVE_LOW)
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#define GPIO26_SSP1_RXD MFP_CFG_IN(GPIO26, AF1)
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#define GPIO27_SSP1_EXTCLK MFP_CFG_IN(GPIO27, AF1)
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/* SSP 2 - NSSP */
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#define GPIO81_SSP2_CLK_OUT MFP_CFG_OUT(GPIO81, AF1, DRIVE_LOW)
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#define GPIO81_SSP2_CLK_IN MFP_CFG_IN(GPIO81, AF1)
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#define GPIO82_SSP2_FRM_OUT MFP_CFG_OUT(GPIO82, AF1, DRIVE_LOW)
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#define GPIO82_SSP2_FRM_IN MFP_CFG_IN(GPIO82, AF1)
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#define GPIO83_SSP2_TXD MFP_CFG_OUT(GPIO83, AF1, DRIVE_LOW)
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#define GPIO83_SSP2_RXD MFP_CFG_IN(GPIO83, AF2)
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#define GPIO84_SSP2_TXD MFP_CFG_OUT(GPIO84, AF1, DRIVE_LOW)
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#define GPIO84_SSP2_RXD MFP_CFG_IN(GPIO84, AF2)
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/* MMC */
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#define GPIO6_MMC_CLK MFP_CFG_OUT(GPIO6, AF1, DRIVE_LOW)
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#define GPIO8_MMC_CS0 MFP_CFG_OUT(GPIO8, AF1, DRIVE_LOW)
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#define GPIO9_MMC_CS1 MFP_CFG_OUT(GPIO9, AF1, DRIVE_LOW)
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#define GPIO34_MMC_CS0 MFP_CFG_OUT(GPIO34, AF2, DRIVE_LOW)
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#define GPIO39_MMC_CS1 MFP_CFG_OUT(GPIO39, AF1, DRIVE_LOW)
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#define GPIO53_MMC_CLK MFP_CFG_OUT(GPIO53, AF1, DRIVE_LOW)
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#define GPIO54_MMC_CLK MFP_CFG_OUT(GPIO54, AF1, DRIVE_LOW)
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#define GPIO69_MMC_CLK MFP_CFG_OUT(GPIO69, AF1, DRIVE_LOW)
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#define GPIO67_MMC_CS0 MFP_CFG_OUT(GPIO67, AF1, DRIVE_LOW)
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#define GPIO68_MMC_CS1 MFP_CFG_OUT(GPIO68, AF1, DRIVE_LOW)
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/* LCD */
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#define GPIO58_LCD_LDD_0 MFP_CFG_OUT(GPIO58, AF2, DRIVE_LOW)
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#define GPIO59_LCD_LDD_1 MFP_CFG_OUT(GPIO59, AF2, DRIVE_LOW)
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#define GPIO60_LCD_LDD_2 MFP_CFG_OUT(GPIO60, AF2, DRIVE_LOW)
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#define GPIO61_LCD_LDD_3 MFP_CFG_OUT(GPIO61, AF2, DRIVE_LOW)
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#define GPIO62_LCD_LDD_4 MFP_CFG_OUT(GPIO62, AF2, DRIVE_LOW)
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#define GPIO63_LCD_LDD_5 MFP_CFG_OUT(GPIO63, AF2, DRIVE_LOW)
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#define GPIO64_LCD_LDD_6 MFP_CFG_OUT(GPIO64, AF2, DRIVE_LOW)
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#define GPIO65_LCD_LDD_7 MFP_CFG_OUT(GPIO65, AF2, DRIVE_LOW)
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#define GPIO66_LCD_LDD_8 MFP_CFG_OUT(GPIO66, AF2, DRIVE_LOW)
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#define GPIO67_LCD_LDD_9 MFP_CFG_OUT(GPIO67, AF2, DRIVE_LOW)
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#define GPIO68_LCD_LDD_10 MFP_CFG_OUT(GPIO68, AF2, DRIVE_LOW)
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#define GPIO69_LCD_LDD_11 MFP_CFG_OUT(GPIO69, AF2, DRIVE_LOW)
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#define GPIO70_LCD_LDD_12 MFP_CFG_OUT(GPIO70, AF2, DRIVE_LOW)
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#define GPIO71_LCD_LDD_13 MFP_CFG_OUT(GPIO71, AF2, DRIVE_LOW)
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#define GPIO72_LCD_LDD_14 MFP_CFG_OUT(GPIO72, AF2, DRIVE_LOW)
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#define GPIO73_LCD_LDD_15 MFP_CFG_OUT(GPIO73, AF2, DRIVE_LOW)
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#define GPIO74_LCD_FCLK MFP_CFG_OUT(GPIO74, AF2, DRIVE_LOW)
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#define GPIO75_LCD_LCLK MFP_CFG_OUT(GPIO75, AF2, DRIVE_LOW)
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#define GPIO76_LCD_PCLK MFP_CFG_OUT(GPIO76, AF2, DRIVE_LOW)
|
2008-07-21 15:20:54 +07:00
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#define GPIO77_LCD_BIAS MFP_CFG_OUT(GPIO77, AF2, DRIVE_LOW)
|
[ARM] pxa: add MFP-alike pin configuration support for pxa{25x, 27x}
Pin configuration on pxa{25x,27x} has now separated from generic GPIO
into dedicated mfp-pxa2xx.c by this patch. The name "mfp" is borrowed
from pxa3xx and is used here to alert the difference between the two
concepts: pin configuration and generic GPIOs. A GPIO can be called
a "GPIO" _only_ when the corresponding pin is configured so.
A pin configuration on pxa{25x,27x} is composed of:
- alternate function selection (or pin mux as commonly called)
- low power state or sleep state
- wakeup enabling from low power mode
The following MFP_xxx bit definitions in mfp.h are re-used:
- MFP_PIN(x)
- MFP_AFx
- MFP_LPM_DRIVE_{LOW, HIGH}
- MFP_LPM_EDGE_*
Selecting alternate function on pxa{25x, 27x} involves configuration
of GPIO direction register GPDRx, so a new bit and MFP_DIR_{IN, OUT}
are introduced. And pin configurations are defined by the following
two macros:
- MFP_CFG_IN : for input alternate functions
- MFP_CFG_OUT : for output alternate functions
Every configuration should provide a low power state if it configured
as output using MFP_CFG_OUT(). As a general guideline, the low power
state should be decided to minimize the overall power dissipation. As
an example, it is better to drive the pin as high level in low power
mode if the GPIO is configured as an active low chip select.
Pins configured as GPIO are defined by MFP_CFG_IN(). This is to avoid
side effects when it is firstly configured as output. The actual
direction of the GPIO is configured by gpio_direction_{input, output}
Wakeup enabling on pxa{25x, 27x} is actually GPIO based wakeup, thus
the device based enable_irq_wake() mechanism is not applicable here.
E.g. invoking enable_irq_wake() with a GPIO IRQ as in the following
code to enable OTG wakeup is by no means portable and intuitive, and
it is valid _only_ when GPIO35 is configured as USB_P2_1:
enable_irq_wake( gpio_to_irq(35) );
To make things worse, not every GPIO is able to wakeup the system.
Only a small number of them can, on either rising or falling edge,
or when level is high (for keypad GPIOs).
Thus, another new bit is introduced to indicate that the GPIO will
wakeup the system:
- MFP_LPM_WAKEUP_ENABLE
The following macros can be used in platform code, and be OR'ed to
the GPIO configuration to enable its wakeup:
- WAKEUP_ON_EDGE_{RISE, FALL, BOTH}
- WAKEUP_ON_LEVEL_HIGH
The WAKEUP_ON_LEVEL_HIGH is used for keypad GPIOs _only_, there is
no edge settings for those GPIOs.
These WAKEUP_ON_* flags OR'ed on wrong GPIOs will be ignored in case
that platform code author is careless enough.
The tradeoff here is that the wakeup source is fully determined by
the platform configuration, instead of enable_irq_wake().
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-03-05 16:16:29 +07:00
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|
|
2008-11-26 17:12:04 +07:00
|
|
|
#ifdef CONFIG_CPU_PXA26x
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|
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/* GPIO */
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#define GPIO85_GPIO MFP_CFG_IN(GPIO85, AF0)
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#define GPIO86_GPIO MFP_CFG_IN(GPIO86, AF1)
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#define GPIO87_GPIO MFP_CFG_IN(GPIO87, AF1)
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#define GPIO88_GPIO MFP_CFG_IN(GPIO88, AF1)
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#define GPIO89_GPIO MFP_CFG_IN(GPIO89, AF1)
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|
|
/* SDRAM */
|
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|
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#define GPIO86_nSDCS2 MFP_CFG_OUT(GPIO86, AF0, DRIVE_HIGH)
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#define GPIO87_nSDCS3 MFP_CFG_OUT(GPIO87, AF0, DRIVE_HIGH)
|
|
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#define GPIO88_RDnWR MFP_CFG_OUT(GPIO88, AF0, DRIVE_HIGH)
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|
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/* USB */
|
|
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|
|
#define GPIO9_USB_RCV MFP_CFG_IN(GPIO9, AF1)
|
|
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|
|
#define GPIO32_USB_VP MFP_CFG_IN(GPIO32, AF2)
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|
|
|
|
#define GPIO34_USB_VM MFP_CFG_IN(GPIO34, AF2)
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|
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|
|
#define GPIO39_USB_VPO MFP_CFG_OUT(GPIO39, AF3, DRIVE_LOW)
|
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|
|
#define GPIO56_USB_VMO MFP_CFG_OUT(GPIO56, AF1, DRIVE_LOW)
|
|
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|
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#define GPIO57_USB_nOE MFP_CFG_OUT(GPIO57, AF1, DRIVE_HIGH)
|
|
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|
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|
|
/* ASSP */
|
|
|
|
|
#define GPIO28_ASSP_BITCLK_IN MFP_CFG_IN(GPIO28, AF3)
|
|
|
|
|
#define GPIO28_ASSP_BITCLK_OUT MFP_CFG_OUT(GPIO28, AF3, DRIVE_LOW)
|
|
|
|
|
#define GPIO29_ASSP_RXD MFP_CFG_IN(GPIO29, AF3)
|
|
|
|
|
#define GPIO30_ASSP_TXD MFP_CFG_OUT(GPIO30, AF3, DRIVE_LOW)
|
|
|
|
|
#define GPIO31_ASSP_SFRM_IN MFP_CFG_IN(GPIO31, AF1)
|
|
|
|
|
#define GPIO31_ASSP_SFRM_OUT MFP_CFG_OUT(GPIO31, AF3, DRIVE_LOW)
|
2010-01-04 14:22:18 +07:00
|
|
|
|
|
|
|
|
/* AC97 */
|
|
|
|
|
#define GPIO89_AC97_nRESET MFP_CFG_OUT(GPIO89, AF0, DRIVE_HIGH)
|
|
|
|
|
#endif /* CONFIG_CPU_PXA26x */
|
2008-11-26 17:12:04 +07:00
|
|
|
|
2010-01-04 10:25:10 +07:00
|
|
|
/* commonly used pin configurations */
|
|
|
|
|
#define GPIOxx_LCD_16BPP \
|
|
|
|
|
GPIO58_LCD_LDD_0, \
|
|
|
|
|
GPIO59_LCD_LDD_1, \
|
|
|
|
|
GPIO60_LCD_LDD_2, \
|
|
|
|
|
GPIO61_LCD_LDD_3, \
|
|
|
|
|
GPIO62_LCD_LDD_4, \
|
|
|
|
|
GPIO63_LCD_LDD_5, \
|
|
|
|
|
GPIO64_LCD_LDD_6, \
|
|
|
|
|
GPIO65_LCD_LDD_7, \
|
|
|
|
|
GPIO66_LCD_LDD_8, \
|
|
|
|
|
GPIO67_LCD_LDD_9, \
|
|
|
|
|
GPIO68_LCD_LDD_10, \
|
|
|
|
|
GPIO69_LCD_LDD_11, \
|
|
|
|
|
GPIO70_LCD_LDD_12, \
|
|
|
|
|
GPIO71_LCD_LDD_13, \
|
|
|
|
|
GPIO72_LCD_LDD_14, \
|
|
|
|
|
GPIO73_LCD_LDD_15
|
|
|
|
|
|
|
|
|
|
#define GPIOxx_LCD_DSTN_16BPP \
|
|
|
|
|
GPIOxx_LCD_16BPP, \
|
|
|
|
|
GPIO74_LCD_FCLK, \
|
|
|
|
|
GPIO75_LCD_LCLK, \
|
|
|
|
|
GPIO76_LCD_PCLK
|
|
|
|
|
|
|
|
|
|
#define GPIOxx_LCD_TFT_16BPP \
|
|
|
|
|
GPIOxx_LCD_16BPP, \
|
|
|
|
|
GPIO74_LCD_FCLK, \
|
|
|
|
|
GPIO75_LCD_LCLK, \
|
|
|
|
|
GPIO76_LCD_PCLK, \
|
|
|
|
|
GPIO77_LCD_BIAS
|
|
|
|
|
|
[ARM] pxa: add MFP-alike pin configuration support for pxa{25x, 27x}
Pin configuration on pxa{25x,27x} has now separated from generic GPIO
into dedicated mfp-pxa2xx.c by this patch. The name "mfp" is borrowed
from pxa3xx and is used here to alert the difference between the two
concepts: pin configuration and generic GPIOs. A GPIO can be called
a "GPIO" _only_ when the corresponding pin is configured so.
A pin configuration on pxa{25x,27x} is composed of:
- alternate function selection (or pin mux as commonly called)
- low power state or sleep state
- wakeup enabling from low power mode
The following MFP_xxx bit definitions in mfp.h are re-used:
- MFP_PIN(x)
- MFP_AFx
- MFP_LPM_DRIVE_{LOW, HIGH}
- MFP_LPM_EDGE_*
Selecting alternate function on pxa{25x, 27x} involves configuration
of GPIO direction register GPDRx, so a new bit and MFP_DIR_{IN, OUT}
are introduced. And pin configurations are defined by the following
two macros:
- MFP_CFG_IN : for input alternate functions
- MFP_CFG_OUT : for output alternate functions
Every configuration should provide a low power state if it configured
as output using MFP_CFG_OUT(). As a general guideline, the low power
state should be decided to minimize the overall power dissipation. As
an example, it is better to drive the pin as high level in low power
mode if the GPIO is configured as an active low chip select.
Pins configured as GPIO are defined by MFP_CFG_IN(). This is to avoid
side effects when it is firstly configured as output. The actual
direction of the GPIO is configured by gpio_direction_{input, output}
Wakeup enabling on pxa{25x, 27x} is actually GPIO based wakeup, thus
the device based enable_irq_wake() mechanism is not applicable here.
E.g. invoking enable_irq_wake() with a GPIO IRQ as in the following
code to enable OTG wakeup is by no means portable and intuitive, and
it is valid _only_ when GPIO35 is configured as USB_P2_1:
enable_irq_wake( gpio_to_irq(35) );
To make things worse, not every GPIO is able to wakeup the system.
Only a small number of them can, on either rising or falling edge,
or when level is high (for keypad GPIOs).
Thus, another new bit is introduced to indicate that the GPIO will
wakeup the system:
- MFP_LPM_WAKEUP_ENABLE
The following macros can be used in platform code, and be OR'ed to
the GPIO configuration to enable its wakeup:
- WAKEUP_ON_EDGE_{RISE, FALL, BOTH}
- WAKEUP_ON_LEVEL_HIGH
The WAKEUP_ON_LEVEL_HIGH is used for keypad GPIOs _only_, there is
no edge settings for those GPIOs.
These WAKEUP_ON_* flags OR'ed on wrong GPIOs will be ignored in case
that platform code author is careless enough.
The tradeoff here is that the wakeup source is fully determined by
the platform configuration, instead of enable_irq_wake().
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-03-05 16:16:29 +07:00
|
|
|
#endif /* __ASM_ARCH_MFP_PXA25X_H */
|