2016-10-21 17:38:39 +07:00
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/*
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* Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include "dra72-evm-common.dtsi"
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2017-08-16 20:45:08 +07:00
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#include "dra72x-mmc-iodelay.dtsi"
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2016-10-21 17:38:39 +07:00
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#include <dt-bindings/net/ti-dp83867.h>
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/ {
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compatible = "ti,dra718-evm", "ti,dra718", "ti,dra722", "ti,dra72", "ti,dra7";
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model = "TI DRA718 EVM";
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memory {
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device_type = "memory";
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reg = <0x0 0x80000000 0x0 0x80000000>; /* 2GB */
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};
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vpo_sd_1v8_3v3: gpio-regulator-TPS74801 {
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compatible = "regulator-gpio";
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regulator-name = "vddshv8";
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regulator-min-microvolt = <1800000>;
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2018-02-06 19:58:02 +07:00
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regulator-max-microvolt = <3300000>;
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2016-10-21 17:38:39 +07:00
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regulator-boot-on;
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vin-supply = <&evm_5v0>;
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gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
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states = <1800000 0x0
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2018-02-06 19:58:02 +07:00
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3300000 0x1>;
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2016-10-21 17:38:39 +07:00
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};
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2017-06-07 16:37:42 +07:00
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evm_1v8_sw: fixedregulator-evm_1v8 {
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compatible = "regulator-fixed";
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regulator-name = "evm_1v8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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vin-supply = <&lp8732_buck0_reg>;
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regulator-always-on;
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regulator-boot-on;
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};
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2016-10-21 17:38:39 +07:00
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poweroff: gpio-poweroff {
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compatible = "gpio-poweroff";
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gpios = <&gpio7 30 GPIO_ACTIVE_HIGH>;
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input;
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};
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};
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2018-02-06 19:58:03 +07:00
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&dra7_pmx_core {
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mmc1_pins_default: mmc1_pins_default {
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pinctrl-single,pins = <
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DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mmc1_clk.clk */
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DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
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DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
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DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
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DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
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DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
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>;
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};
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};
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2016-10-21 17:38:39 +07:00
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&i2c1 {
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status = "okay";
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clock-frequency = <400000>;
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lp8733: lp8733@60 {
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compatible = "ti,lp8733";
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reg = <0x60>;
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buck0-in-supply =<&vsys_3v3>;
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buck1-in-supply =<&vsys_3v3>;
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ldo0-in-supply =<&evm_5v0>;
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ldo1-in-supply =<&evm_5v0>;
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lp8733_regulators: regulators {
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lp8733_buck0_reg: buck0 {
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/* FB_B0 -> LP8733-BUCK1 - VPO_S1_AVS - VDD_CORE_AVS (core, mpu, gpu) */
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regulator-name = "lp8733-buck0";
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regulator-min-microvolt = <850000>;
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regulator-max-microvolt = <1250000>;
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regulator-always-on;
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regulator-boot-on;
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};
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lp8733_buck1_reg: buck1 {
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/* FB_B1 -> LP8733-BUCK2 - VPO_S2_AVS - VDD_DSP_AVS (DSP/eve/iva) */
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regulator-name = "lp8733-buck1";
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regulator-min-microvolt = <850000>;
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regulator-max-microvolt = <1250000>;
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regulator-boot-on;
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regulator-always-on;
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};
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lp8733_ldo0_reg: ldo0 {
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/* LDO0 -> LP8733-LDO1 - VPO_L1_3V3 - VDDSHV8 (optional) */
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regulator-name = "lp8733-ldo0";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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lp8733_ldo1_reg: ldo1 {
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/* LDO1 -> LP8733-LDO2 - VPO_L2_3V3 - VDDA_USB3V3 */
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regulator-name = "lp8733-ldo1";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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regulator-boot-on;
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};
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};
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};
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lp8732: lp8732@61 {
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compatible = "ti,lp8732";
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reg = <0x61>;
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buck0-in-supply =<&vsys_3v3>;
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buck1-in-supply =<&vsys_3v3>;
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ldo0-in-supply =<&vsys_3v3>;
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ldo1-in-supply =<&vsys_3v3>;
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lp8732_regulators: regulators {
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lp8732_buck0_reg: buck0 {
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/* FB_B0 -> LP8732-BUCK1 - VPO_S3_1V8 - VDDS_1V8 */
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regulator-name = "lp8732-buck0";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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regulator-boot-on;
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};
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lp8732_buck1_reg: buck1 {
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/* FB_B1 -> LP8732-BUCK2 - VPO_S4_DDR - VDD_DDR_1V35 */
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regulator-name = "lp8732-buck1";
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regulator-min-microvolt = <1350000>;
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regulator-max-microvolt = <1350000>;
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regulator-boot-on;
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regulator-always-on;
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};
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lp8732_ldo0_reg: ldo0 {
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/* LDO0 -> LP8732-LDO1 - VPO_L3_1V8 - VDA_1V8_PLL */
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regulator-name = "lp8732-ldo0";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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lp8732_ldo1_reg: ldo1 {
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/* LDO1 -> LP8732-LDO2 - VPO_L4_1V8 - VDA_1V8_PHY */
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regulator-name = "lp8732-ldo1";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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regulator-boot-on;
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};
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};
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};
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};
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2017-01-21 02:52:20 +07:00
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&pcf_lcd {
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interrupt-parent = <&gpio7>;
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interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
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};
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2016-10-21 17:38:39 +07:00
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&pcf_gpio_21 {
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interrupt-parent = <&gpio7>;
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interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
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};
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&pcf_hdmi {
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p0 {
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/*
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* PM_OEn to High: Disable routing I2C3 to PM_I2C
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* With this PM_SEL(p3) should not matter
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*/
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gpio-hog;
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gpios = <0 GPIO_ACTIVE_LOW>;
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output-high;
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line-name = "pm_oe_n";
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};
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};
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&mmc1 {
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2017-08-16 20:45:08 +07:00
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pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
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pinctrl-0 = <&mmc1_pins_default>;
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pinctrl-1 = <&mmc1_pins_hs>;
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pinctrl-2 = <&mmc1_pins_sdr12>;
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pinctrl-3 = <&mmc1_pins_sdr25>;
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pinctrl-4 = <&mmc1_pins_sdr50>;
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pinctrl-5 = <&mmc1_pins_ddr50_rev20 &mmc1_iodelay_ddr50_conf>;
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pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev20_conf>;
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2017-06-09 19:08:18 +07:00
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vqmmc-supply = <&vpo_sd_1v8_3v3>;
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2016-10-21 17:38:39 +07:00
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};
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2017-06-07 16:37:42 +07:00
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&mmc2 {
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2017-08-16 20:45:08 +07:00
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pinctrl-names = "default", "hs", "ddr_1_8v", "hs200_1_8v";
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pinctrl-0 = <&mmc2_pins_default>;
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pinctrl-1 = <&mmc2_pins_hs>;
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pinctrl-2 = <&mmc2_pins_ddr_rev20 &mmc2_iodelay_ddr_conf>;
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pinctrl-3 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_rev20_conf>;
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2017-06-07 16:37:42 +07:00
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vmmc-supply = <&evm_1v8_sw>;
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2016-10-21 17:38:39 +07:00
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};
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&mac {
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mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_LOW>,
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<&pcf_hdmi 9 GPIO_ACTIVE_LOW>, /* P11 */
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<&pcf_hdmi 10 GPIO_ACTIVE_LOW>; /* P12 */
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dual_emac;
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};
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&cpsw_emac0 {
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phy_id = <&davinci_mdio>, <2>;
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phy-mode = "rgmii-id";
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dual_emac_res_vlan = <1>;
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};
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&cpsw_emac1 {
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phy_id = <&davinci_mdio>, <3>;
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phy-mode = "rgmii-id";
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dual_emac_res_vlan = <2>;
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};
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&davinci_mdio {
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dp83867_0: ethernet-phy@2 {
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reg = <2>;
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ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
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ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
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ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
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2017-07-05 14:54:52 +07:00
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ti,min-output-impedance;
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2017-08-09 21:02:47 +07:00
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ti,dp83867-rxctrl-strap-quirk;
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2016-10-21 17:38:39 +07:00
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};
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dp83867_1: ethernet-phy@3 {
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reg = <3>;
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ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
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ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
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ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
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2017-07-05 14:54:52 +07:00
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ti,min-output-impedance;
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2017-08-09 21:02:47 +07:00
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ti,dp83867-rxctrl-strap-quirk;
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2016-10-21 17:38:39 +07:00
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};
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};
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/* No Sata on this device */
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&sata_phy {
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status = "disabled";
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};
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&sata {
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status = "disabled";
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};
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/* No RTC on this device */
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&rtc {
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status = "disabled";
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};
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&usb2_phy1 {
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phy-supply = <&lp8733_ldo1_reg>;
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};
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&usb2_phy2 {
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phy-supply = <&lp8733_ldo1_reg>;
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};
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&dss {
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/* Supplied by VDA_1V8_PLL */
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vdda_video-supply = <&lp8732_ldo0_reg>;
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};
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&hdmi {
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/* Supplied by VDA_1V8_PHY */
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vdda_video-supply = <&lp8732_ldo1_reg>;
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};
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