mirror of
https://github.com/AuxXxilium/redpill-lkm5.git
synced 2024-11-23 23:11:02 +07:00
244 lines
9.4 KiB
C
244 lines
9.4 KiB
C
#define SHIM_NAME "PCI devices"
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#include "pci_shim.h"
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#include "shim_base.h"
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#include "../common.h"
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#include "../config/vpci_types.h" //MAX_VPCI_DEVS, pci_shim_device_type
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#include "../config/platform_types.h" //hw_config
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#include "../internal/virtual_pci.h"
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#include <linux/pci_ids.h>
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unsigned int free_dev_idx = 0;
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static void *devices[MAX_VPCI_DEVS] = { NULL };
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static struct pci_dev_descriptor *allocate_vpci_dev_dsc(void) {
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if (free_dev_idx >= MAX_VPCI_DEVS) {
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/*index has to be at max MAX_VPCI_DEVS-1*/
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pr_loc_bug("No more device indexes are available (max devs: %d)", MAX_VPCI_DEVS);
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return ERR_PTR(-ENOMEM);
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}
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struct pci_dev_descriptor *dev_dsc;
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kmalloc_or_exit_ptr(dev_dsc, sizeof(struct pci_dev_descriptor));
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memcpy(dev_dsc, &pci_dev_conf_default_normal_dev, sizeof(struct pci_dev_descriptor));
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devices[free_dev_idx++] = dev_dsc;
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return dev_dsc;
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}
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#define allocate_vpci_dev_dsc_var() \
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struct pci_dev_descriptor *dev_dsc = allocate_vpci_dev_dsc(); \
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if (IS_ERR(dev_dsc)) return PTR_ERR(dev_dsc);
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static int
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add_vdev(struct pci_dev_descriptor *dev_dsc, unsigned char bus_no, unsigned char dev_no, unsigned char fn_no,
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bool is_mf)
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{
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const struct virtual_device *vpci_vdev;
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if (is_mf) {
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vpci_vdev = vpci_add_multifunction_device(bus_no, dev_no, fn_no, dev_dsc);
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} else if(unlikely(fn_no != 0x00)) {
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//Making such config will either cause the device to not show up at all or only fn_no=0 one will show u
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pr_loc_bug("%s called with non-MF device but non-zero fn_no", __FUNCTION__);
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return -EINVAL;
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} else {
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vpci_vdev = vpci_add_single_device(bus_no, dev_no, dev_dsc);
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}
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return IS_ERR(vpci_vdev) ? PTR_ERR(vpci_vdev) : 0;
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}
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/**
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* Adds a fake Marvell controller
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*
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* These errors in kernlog are normal (as we don't emulate the behavior of the controller as it's not needed):
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* pci 0001:0a:00.0: Can't map mv9235 registers
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* ahci: probe of 0001:0a:00.0 failed with error -22
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*
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* @return 0 on success or -E
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*/
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static inline int
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vdev_add_generic_marvell_ahci(u16 dev, unsigned char bus_no, unsigned char dev_no, unsigned char fn_no, bool is_mf)
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{
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allocate_vpci_dev_dsc_var();
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dev_dsc->vid = PCI_VENDOR_ID_MARVELL_EXT;
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dev_dsc->dev = dev;
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dev_dsc->rev_id = 0x11; //All Marvells so far use revision 11
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dev_dsc->class = U24_CLASS_TO_U8_CLASS(PCI_CLASS_STORAGE_SATA_AHCI);
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dev_dsc->subclass = U24_CLASS_TO_U8_SUBCLASS(PCI_CLASS_STORAGE_SATA_AHCI);
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dev_dsc->prog_if = U24_CLASS_TO_U8_PROGIF(PCI_CLASS_STORAGE_SATA_AHCI);
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return add_vdev(dev_dsc, bus_no, dev_no, fn_no, is_mf);
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}
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static int vdev_add_MARVELL_88SE9235(unsigned char bus_no, unsigned char dev_no, unsigned char fn_no, bool is_mf)
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{
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return vdev_add_generic_marvell_ahci(0x9235, bus_no, dev_no, fn_no, is_mf);
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}
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static int vdev_add_MARVELL_88SE9215(unsigned char bus_no, unsigned char dev_no, unsigned char fn_no, bool is_mf)
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{
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return vdev_add_generic_marvell_ahci(0x9215, bus_no, dev_no, fn_no, is_mf);
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}
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static int vdev_add_INTEL_I211(unsigned char bus_no, unsigned char dev_no, unsigned char fn_no, bool is_mf)
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{
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allocate_vpci_dev_dsc_var();
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dev_dsc->vid = PCI_VENDOR_ID_INTEL;
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dev_dsc->dev = 0x1539;
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dev_dsc->rev_id = 0x03; //Not confirmed
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dev_dsc->class = U16_CLASS_TO_U8_CLASS(PCI_CLASS_NETWORK_ETHERNET);
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dev_dsc->subclass = U16_CLASS_TO_U8_SUBCLASS(PCI_CLASS_NETWORK_ETHERNET);
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return add_vdev(dev_dsc, bus_no, dev_no, fn_no, is_mf);
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}
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static int vdev_add_INTEL_X552(unsigned char bus_no, unsigned char dev_no, unsigned char fn_no, bool is_mf)
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{
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allocate_vpci_dev_dsc_var();
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dev_dsc->vid = PCI_VENDOR_ID_INTEL;
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dev_dsc->dev = 0x15ad;
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dev_dsc->rev_id = 0x03; //Not confirmed
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dev_dsc->class = U16_CLASS_TO_U8_CLASS(PCI_CLASS_NETWORK_ETHERNET);
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dev_dsc->subclass = U16_CLASS_TO_U8_SUBCLASS(PCI_CLASS_NETWORK_ETHERNET);
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return add_vdev(dev_dsc, bus_no, dev_no, fn_no, is_mf);
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}
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static int vdev_add_INTEL_CPU_AHCI_CTRL(unsigned char bus_no, unsigned char dev_no, unsigned char fn_no, bool is_mf)
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{
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allocate_vpci_dev_dsc_var();
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dev_dsc->vid = PCI_VENDOR_ID_INTEL;
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dev_dsc->dev = 0x5ae3;
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dev_dsc->class = U24_CLASS_TO_U8_CLASS(PCI_CLASS_STORAGE_SATA_AHCI);
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dev_dsc->subclass = U24_CLASS_TO_U8_SUBCLASS(PCI_CLASS_STORAGE_SATA_AHCI);
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dev_dsc->prog_if = U24_CLASS_TO_U8_PROGIF(PCI_CLASS_STORAGE_SATA_AHCI);
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return add_vdev(dev_dsc, bus_no, dev_no, fn_no, is_mf);
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}
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//This technically should be a bridge but we don't have the info to recreate full tree
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static inline int
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vdev_add_generic_intel_pcie(u16 dev, unsigned char bus_no, unsigned char dev_no, unsigned char fn_no, bool is_mf) {
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allocate_vpci_dev_dsc_var();
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dev_dsc->vid = PCI_VENDOR_ID_INTEL;
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dev_dsc->dev = dev;
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dev_dsc->class = U16_CLASS_TO_U8_CLASS(PCI_CLASS_BRIDGE_PCI);
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dev_dsc->subclass = U16_CLASS_TO_U8_SUBCLASS(PCI_CLASS_BRIDGE_PCI);
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return add_vdev(dev_dsc, bus_no, dev_no, fn_no, is_mf);
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}
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static int vdev_add_INTEL_CPU_PCIE_PA(unsigned char bus_no, unsigned char dev_no, unsigned char fn_no, bool is_mf)
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{
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return vdev_add_generic_intel_pcie(0x5ad8, bus_no, dev_no, fn_no, is_mf);
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}
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static int vdev_add_INTEL_CPU_PCIE_PB(unsigned char bus_no, unsigned char dev_no, unsigned char fn_no, bool is_mf)
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{
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return vdev_add_generic_intel_pcie(0x5ad6, bus_no, dev_no, fn_no, is_mf);
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}
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static int vdev_add_INTEL_CPU_USB_XHCI(unsigned char bus_no, unsigned char dev_no, unsigned char fn_no, bool is_mf)
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{
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allocate_vpci_dev_dsc_var();
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dev_dsc->vid = PCI_VENDOR_ID_INTEL;
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dev_dsc->dev = 0x5aa8;
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dev_dsc->class = U24_CLASS_TO_U8_CLASS(PCI_CLASS_SERIAL_USB_XHCI);
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dev_dsc->subclass = U24_CLASS_TO_U8_SUBCLASS(PCI_CLASS_SERIAL_USB_XHCI);
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dev_dsc->prog_if = U24_CLASS_TO_U8_PROGIF(PCI_CLASS_SERIAL_USB_XHCI);
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return add_vdev(dev_dsc, bus_no, dev_no, fn_no, is_mf);
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}
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static inline int
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vdev_add_generic_intel_io(u16 dev, unsigned char bus_no, unsigned char dev_no, unsigned char fn_no, bool is_mf)
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{
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allocate_vpci_dev_dsc_var();
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dev_dsc->vid = PCI_VENDOR_ID_INTEL;
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dev_dsc->dev = dev;
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dev_dsc->class = U16_CLASS_TO_U8_CLASS(PCI_CLASS_SP_OTHER);
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dev_dsc->subclass = U16_CLASS_TO_U8_SUBCLASS(PCI_CLASS_SP_OTHER);
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return add_vdev(dev_dsc, bus_no, dev_no, fn_no, is_mf);
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}
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static int vdev_add_INTEL_CPU_I2C(unsigned char bus_no, unsigned char dev_no, unsigned char fn_no, bool is_mf)
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{
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return vdev_add_generic_intel_io(0x5aac, bus_no, dev_no, fn_no, is_mf);
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}
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static int vdev_add_INTEL_CPU_HSUART(unsigned char bus_no, unsigned char dev_no, unsigned char fn_no, bool is_mf)
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{
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return vdev_add_generic_intel_io(0x5abc, bus_no, dev_no, fn_no, is_mf);
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}
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static int vdev_add_INTEL_CPU_SPI(unsigned char bus_no, unsigned char dev_no, unsigned char fn_no, bool is_mf)
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{
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return vdev_add_generic_intel_io(0x5ac6, bus_no, dev_no, fn_no, is_mf);
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}
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static int vdev_add_INTEL_CPU_SMBUS(unsigned char bus_no, unsigned char dev_no, unsigned char fn_no, bool is_mf)
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{
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allocate_vpci_dev_dsc_var();
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dev_dsc->vid = PCI_VENDOR_ID_INTEL;
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dev_dsc->dev = 0x5ad4;
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dev_dsc->class = U16_CLASS_TO_U8_CLASS(PCI_CLASS_SERIAL_SMBUS);
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dev_dsc->subclass = U16_CLASS_TO_U8_SUBCLASS(PCI_CLASS_SERIAL_SMBUS);
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return add_vdev(dev_dsc, bus_no, dev_no, fn_no, is_mf);
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}
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static int (*dev_type_handler_map[])(unsigned char bus_no, unsigned char dev_no, unsigned char fn_no, bool is_mf) = {
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[VPD_MARVELL_88SE9235] = vdev_add_MARVELL_88SE9235,
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[VPD_MARVELL_88SE9215] = vdev_add_MARVELL_88SE9215,
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[VPD_INTEL_I211] = vdev_add_INTEL_I211,
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[VPD_INTEL_X552] = vdev_add_INTEL_X552,
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[VPD_INTEL_CPU_AHCI_CTRL] = vdev_add_INTEL_CPU_AHCI_CTRL,
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[VPD_INTEL_CPU_PCIE_PA] = vdev_add_INTEL_CPU_PCIE_PA,
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[VPD_INTEL_CPU_PCIE_PB] = vdev_add_INTEL_CPU_PCIE_PB,
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[VPD_INTEL_CPU_USB_XHCI] = vdev_add_INTEL_CPU_USB_XHCI,
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[VPD_INTEL_CPU_I2C] = vdev_add_INTEL_CPU_I2C,
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[VPD_INTEL_CPU_HSUART] = vdev_add_INTEL_CPU_HSUART,
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[VPD_INTEL_CPU_SPI] = vdev_add_INTEL_CPU_SPI,
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[VPD_INTEL_CPU_SMBUS] = vdev_add_INTEL_CPU_SMBUS,
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};
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int register_pci_shim(const struct hw_config *hw)
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{
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shim_reg_in();
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pr_loc_dbg("Creating vPCI devices for %s", hw->name);
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int out;
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for (int i = 0; i < MAX_VPCI_DEVS; i++) {
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if (hw->pci_stubs[i].type == __VPD_TERMINATOR__)
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break;
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pr_loc_dbg("Calling %ps with B:D:F=%02x:%02x:%02x mf=%d", dev_type_handler_map[hw->pci_stubs[i].type],
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hw->pci_stubs[i].bus, hw->pci_stubs[i].dev, hw->pci_stubs[i].fn,
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hw->pci_stubs[i].multifunction ? 1 : 0);
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out = dev_type_handler_map[hw->pci_stubs[i].type](hw->pci_stubs[i].bus, hw->pci_stubs[i].dev,
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hw->pci_stubs[i].fn, hw->pci_stubs[i].multifunction);
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if (out != 0) {
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pr_loc_err("Failed to create vPCI device B:D:F=%02x:%02x:%02x - error=%d", hw->pci_stubs[i].bus,
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hw->pci_stubs[i].dev, hw->pci_stubs[i].fn, out);
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return out;
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}
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pr_loc_dbg("vPCI device %d created successfully", i+1);
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}
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shim_reg_ok();
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return 0;
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}
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int unregister_pci_shim(void)
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{
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shim_ureg_in();
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vpci_remove_all_devices_and_buses();
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for (int i = 0; i < free_dev_idx; i++) {
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pr_loc_dbg("Free PCI dev %d @ %p", i, devices[i]);
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kfree(devices[i]);
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}
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shim_ureg_ok();
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return -EIO; //vpci_remove_all_devices_and_buses has a bug - this is a canary to not forget
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}
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