mirror of
https://github.com/AuxXxilium/r8169.git
synced 2024-11-23 15:00:58 +07:00
update to linux tree
Signed-off-by: AuxXxilium <info@auxxxilium.tech>
This commit is contained in:
AuxXxilium
parent
ffebd251be
commit
4358d30037
2
r8169.h
2
r8169.h
@ -76,4 +76,4 @@ void r8169_apply_firmware(struct rtl8169_private *tp);
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u16 rtl8168h_2_get_adc_bias_ioffset(struct rtl8169_private *tp);
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u8 rtl8168d_efuse_read(struct rtl8169_private *tp, int reg_addr);
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void r8169_hw_phy_config(struct rtl8169_private *tp, struct phy_device *phydev,
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enum mac_version ver);
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enum mac_version ver);
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@ -233,4 +233,4 @@ out:
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dev_err(rtl_fw->dev, "Unable to load firmware %s (%d)\n",
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rtl_fw->fw_name, rc);
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return rc;
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}
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}
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@ -36,4 +36,4 @@ struct rtl_fw {
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int rtl_fw_request_firmware(struct rtl_fw *rtl_fw);
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void rtl_fw_release_firmware(struct rtl_fw *rtl_fw);
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void rtl_fw_write_firmware(struct rtl8169_private *tp, struct rtl_fw *rtl_fw);
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void rtl_fw_write_firmware(struct rtl8169_private *tp, struct rtl_fw *rtl_fw);
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287
r8169_main.c
287
r8169_main.c
@ -30,6 +30,7 @@
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#include <linux/ipv6.h>
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#include <asm/unaligned.h>
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#include <net/ip6_checksum.h>
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#include <net/netdev_queues.h>
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#include "r8169.h"
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#include "r8169_firmware.h"
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@ -68,6 +69,8 @@
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#define NUM_RX_DESC 256 /* Number of Rx descriptor registers */
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#define R8169_TX_RING_BYTES (NUM_TX_DESC * sizeof(struct TxDesc))
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#define R8169_RX_RING_BYTES (NUM_RX_DESC * sizeof(struct RxDesc))
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#define R8169_TX_STOP_THRS (MAX_SKB_FRAGS + 1)
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#define R8169_TX_START_THRS (2 * R8169_TX_STOP_THRS)
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#define OCP_STD_PHY_BASE 0xa400
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@ -147,10 +150,8 @@ static const struct pci_device_id rtl8169_pci_tbl[] = {
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{ PCI_VDEVICE(REALTEK, 0x8161) },
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{ PCI_VDEVICE(REALTEK, 0x8162) },
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{ PCI_VDEVICE(REALTEK, 0x8167) },
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#ifdef INCLUDE_R8168
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{ PCI_VDEVICE(REALTEK, 0x8168) },
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{ PCI_VDEVICE(NCUBE, 0x8168) },
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#endif
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{ PCI_VDEVICE(REALTEK, 0x8169) },
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{ PCI_VENDOR_ID_DLINK, 0x4300,
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PCI_VENDOR_ID_DLINK, 0x4b10, 0, 0 },
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@ -160,9 +161,7 @@ static const struct pci_device_id rtl8169_pci_tbl[] = {
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{ PCI_VDEVICE(USR, 0x0116) },
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{ PCI_VENDOR_ID_LINKSYS, 0x1032, PCI_ANY_ID, 0x0024 },
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{ 0x0001, 0x8168, PCI_ANY_ID, 0x2410 },
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#ifdef INCLUDE_R8125
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{ PCI_VDEVICE(REALTEK, 0x8125) },
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#endif
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{ PCI_VDEVICE(REALTEK, 0x3000) },
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{}
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};
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@ -580,6 +579,7 @@ struct rtl8169_tc_offsets {
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enum rtl_flag {
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RTL_FLAG_TASK_ENABLED = 0,
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RTL_FLAG_TASK_RESET_PENDING,
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RTL_FLAG_TASK_TX_TIMEOUT,
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RTL_FLAG_MAX
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};
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@ -616,6 +616,12 @@ struct rtl8169_private {
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struct work_struct work;
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} wk;
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raw_spinlock_t config25_lock;
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raw_spinlock_t mac_ocp_lock;
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raw_spinlock_t cfg9346_usage_lock;
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int cfg9346_usage_count;
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unsigned supports_gmii:1;
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unsigned aspm_manageable:1;
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dma_addr_t counters_phys_addr;
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@ -664,12 +670,22 @@ static inline struct device *tp_to_dev(struct rtl8169_private *tp)
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static void rtl_lock_config_regs(struct rtl8169_private *tp)
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{
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RTL_W8(tp, Cfg9346, Cfg9346_Lock);
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unsigned long flags;
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raw_spin_lock_irqsave(&tp->cfg9346_usage_lock, flags);
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if (!--tp->cfg9346_usage_count)
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RTL_W8(tp, Cfg9346, Cfg9346_Lock);
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raw_spin_unlock_irqrestore(&tp->cfg9346_usage_lock, flags);
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}
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static void rtl_unlock_config_regs(struct rtl8169_private *tp)
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{
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RTL_W8(tp, Cfg9346, Cfg9346_Unlock);
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unsigned long flags;
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raw_spin_lock_irqsave(&tp->cfg9346_usage_lock, flags);
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if (!tp->cfg9346_usage_count++)
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RTL_W8(tp, Cfg9346, Cfg9346_Unlock);
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raw_spin_unlock_irqrestore(&tp->cfg9346_usage_lock, flags);
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}
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static void rtl_pci_commit(struct rtl8169_private *tp)
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@ -678,6 +694,28 @@ static void rtl_pci_commit(struct rtl8169_private *tp)
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RTL_R8(tp, ChipCmd);
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}
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static void rtl_mod_config2(struct rtl8169_private *tp, u8 clear, u8 set)
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{
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unsigned long flags;
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u8 val;
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raw_spin_lock_irqsave(&tp->config25_lock, flags);
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val = RTL_R8(tp, Config2);
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RTL_W8(tp, Config2, (val & ~clear) | set);
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raw_spin_unlock_irqrestore(&tp->config25_lock, flags);
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}
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static void rtl_mod_config5(struct rtl8169_private *tp, u8 clear, u8 set)
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{
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unsigned long flags;
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u8 val;
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raw_spin_lock_irqsave(&tp->config25_lock, flags);
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val = RTL_R8(tp, Config5);
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RTL_W8(tp, Config5, (val & ~clear) | set);
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raw_spin_unlock_irqrestore(&tp->config25_lock, flags);
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}
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static bool rtl_is_8125(struct rtl8169_private *tp)
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{
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return tp->mac_version >= RTL_GIGA_MAC_VER_61;
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@ -850,7 +888,7 @@ static int r8168_phy_ocp_read(struct rtl8169_private *tp, u32 reg)
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(RTL_R32(tp, GPHY_OCP) & 0xffff) : -ETIMEDOUT;
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}
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static void r8168_mac_ocp_write(struct rtl8169_private *tp, u32 reg, u32 data)
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static void __r8168_mac_ocp_write(struct rtl8169_private *tp, u32 reg, u32 data)
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{
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if (rtl_ocp_reg_failure(reg))
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return;
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@ -858,7 +896,16 @@ static void r8168_mac_ocp_write(struct rtl8169_private *tp, u32 reg, u32 data)
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RTL_W32(tp, OCPDR, OCPAR_FLAG | (reg << 15) | data);
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}
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static u16 r8168_mac_ocp_read(struct rtl8169_private *tp, u32 reg)
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static void r8168_mac_ocp_write(struct rtl8169_private *tp, u32 reg, u32 data)
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{
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unsigned long flags;
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raw_spin_lock_irqsave(&tp->mac_ocp_lock, flags);
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__r8168_mac_ocp_write(tp, reg, data);
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raw_spin_unlock_irqrestore(&tp->mac_ocp_lock, flags);
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}
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static u16 __r8168_mac_ocp_read(struct rtl8169_private *tp, u32 reg)
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{
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if (rtl_ocp_reg_failure(reg))
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return 0;
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@ -868,12 +915,28 @@ static u16 r8168_mac_ocp_read(struct rtl8169_private *tp, u32 reg)
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return RTL_R32(tp, OCPDR);
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}
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static u16 r8168_mac_ocp_read(struct rtl8169_private *tp, u32 reg)
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{
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unsigned long flags;
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u16 val;
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raw_spin_lock_irqsave(&tp->mac_ocp_lock, flags);
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val = __r8168_mac_ocp_read(tp, reg);
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raw_spin_unlock_irqrestore(&tp->mac_ocp_lock, flags);
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return val;
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}
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static void r8168_mac_ocp_modify(struct rtl8169_private *tp, u32 reg, u16 mask,
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u16 set)
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{
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u16 data = r8168_mac_ocp_read(tp, reg);
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unsigned long flags;
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u16 data;
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r8168_mac_ocp_write(tp, reg, (data & ~mask) | set);
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raw_spin_lock_irqsave(&tp->mac_ocp_lock, flags);
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data = __r8168_mac_ocp_read(tp, reg);
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__r8168_mac_ocp_write(tp, reg, (data & ~mask) | set);
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raw_spin_unlock_irqrestore(&tp->mac_ocp_lock, flags);
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}
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/* Work around a hw issue with RTL8168g PHY, the quirk disables
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@ -1339,6 +1402,7 @@ static void __rtl8169_set_wol(struct rtl8169_private *tp, u32 wolopts)
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{ WAKE_MAGIC, Config3, MagicPacket }
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};
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unsigned int i, tmp = ARRAY_SIZE(cfg);
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unsigned long flags;
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u8 options;
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rtl_unlock_config_regs(tp);
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@ -1357,12 +1421,14 @@ static void __rtl8169_set_wol(struct rtl8169_private *tp, u32 wolopts)
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r8168_mac_ocp_modify(tp, 0xc0b6, BIT(0), 0);
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}
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raw_spin_lock_irqsave(&tp->config25_lock, flags);
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for (i = 0; i < tmp; i++) {
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options = RTL_R8(tp, cfg[i].reg) & ~cfg[i].mask;
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if (wolopts & cfg[i].opt)
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options |= cfg[i].mask;
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RTL_W8(tp, cfg[i].reg, options);
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}
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raw_spin_unlock_irqrestore(&tp->config25_lock, flags);
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switch (tp->mac_version) {
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case RTL_GIGA_MAC_VER_02 ... RTL_GIGA_MAC_VER_06:
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@ -1374,10 +1440,10 @@ static void __rtl8169_set_wol(struct rtl8169_private *tp, u32 wolopts)
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case RTL_GIGA_MAC_VER_34:
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case RTL_GIGA_MAC_VER_37:
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case RTL_GIGA_MAC_VER_39 ... RTL_GIGA_MAC_VER_63:
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options = RTL_R8(tp, Config2) & ~PME_SIGNAL;
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if (wolopts)
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options |= PME_SIGNAL;
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RTL_W8(tp, Config2, options);
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rtl_mod_config2(tp, 0, PME_SIGNAL);
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else
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rtl_mod_config2(tp, PME_SIGNAL, 0);
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break;
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default:
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break;
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@ -2678,10 +2744,20 @@ static void rtl_disable_exit_l1(struct rtl8169_private *tp)
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static void rtl_hw_aspm_clkreq_enable(struct rtl8169_private *tp, bool enable)
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{
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if (tp->mac_version < RTL_GIGA_MAC_VER_32)
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return;
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/* Don't enable ASPM in the chip if OS can't control ASPM */
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if (enable && tp->aspm_manageable) {
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RTL_W8(tp, Config5, RTL_R8(tp, Config5) | ASPM_en);
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RTL_W8(tp, Config2, RTL_R8(tp, Config2) | ClkReqEn);
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/* On these chip versions ASPM can even harm
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* bus communication of other PCI devices.
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*/
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if (tp->mac_version == RTL_GIGA_MAC_VER_42 ||
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tp->mac_version == RTL_GIGA_MAC_VER_43)
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return;
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rtl_mod_config5(tp, 0, ASPM_en);
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rtl_mod_config2(tp, 0, ClkReqEn);
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switch (tp->mac_version) {
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case RTL_GIGA_MAC_VER_46 ... RTL_GIGA_MAC_VER_48:
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@ -2704,11 +2780,9 @@ static void rtl_hw_aspm_clkreq_enable(struct rtl8169_private *tp, bool enable)
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break;
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}
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RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~ClkReqEn);
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RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~ASPM_en);
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rtl_mod_config2(tp, ClkReqEn, 0);
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rtl_mod_config5(tp, ASPM_en, 0);
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}
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udelay(10);
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}
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static void rtl_set_fifo_size(struct rtl8169_private *tp, u16 rx_stat,
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@ -2866,7 +2940,7 @@ static void rtl_hw_start_8168e_1(struct rtl8169_private *tp)
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RTL_W32(tp, MISC, RTL_R32(tp, MISC) | TXPLA_RST);
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RTL_W32(tp, MISC, RTL_R32(tp, MISC) & ~TXPLA_RST);
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RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~Spi_en);
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rtl_mod_config5(tp, Spi_en, 0);
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}
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static void rtl_hw_start_8168e_2(struct rtl8169_private *tp)
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@ -2899,9 +2973,7 @@ static void rtl_hw_start_8168e_2(struct rtl8169_private *tp)
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RTL_W8(tp, DLLPR, RTL_R8(tp, DLLPR) | PFM_EN);
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RTL_W32(tp, MISC, RTL_R32(tp, MISC) | PWM_EN);
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RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~Spi_en);
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rtl_hw_aspm_clkreq_enable(tp, true);
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rtl_mod_config5(tp, Spi_en, 0);
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}
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static void rtl_hw_start_8168f(struct rtl8169_private *tp)
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@ -2922,7 +2994,7 @@ static void rtl_hw_start_8168f(struct rtl8169_private *tp)
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RTL_W8(tp, MCU, RTL_R8(tp, MCU) & ~NOW_IS_OOB);
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RTL_W8(tp, DLLPR, RTL_R8(tp, DLLPR) | PFM_EN);
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RTL_W32(tp, MISC, RTL_R32(tp, MISC) | PWM_EN);
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RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~Spi_en);
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rtl_mod_config5(tp, Spi_en, 0);
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rtl8168_config_eee_mac(tp);
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}
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@ -2992,11 +3064,7 @@ static void rtl_hw_start_8168g_1(struct rtl8169_private *tp)
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};
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rtl_hw_start_8168g(tp);
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/* disable aspm and clock request before access ephy */
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rtl_hw_aspm_clkreq_enable(tp, false);
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rtl_ephy_init(tp, e_info_8168g_1);
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rtl_hw_aspm_clkreq_enable(tp, true);
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}
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static void rtl_hw_start_8168g_2(struct rtl8169_private *tp)
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@ -3014,9 +3082,6 @@ static void rtl_hw_start_8168g_2(struct rtl8169_private *tp)
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};
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rtl_hw_start_8168g(tp);
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/* disable aspm and clock request before access ephy */
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rtl_hw_aspm_clkreq_enable(tp, false);
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rtl_ephy_init(tp, e_info_8168g_2);
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}
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@ -3037,8 +3102,6 @@ static void rtl_hw_start_8411_2(struct rtl8169_private *tp)
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rtl_hw_start_8168g(tp);
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/* disable aspm and clock request before access ephy */
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rtl_hw_aspm_clkreq_enable(tp, false);
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rtl_ephy_init(tp, e_info_8411_2);
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/* The following Realtek-provided magic fixes an issue with the RX unit
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@ -3176,8 +3239,6 @@ static void rtl_hw_start_8411_2(struct rtl8169_private *tp)
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r8168_mac_ocp_write(tp, 0xFC32, 0x0C25);
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r8168_mac_ocp_write(tp, 0xFC34, 0x00A9);
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r8168_mac_ocp_write(tp, 0xFC36, 0x012D);
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rtl_hw_aspm_clkreq_enable(tp, true);
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}
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static void rtl_hw_start_8168h_1(struct rtl8169_private *tp)
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@ -3192,8 +3253,6 @@ static void rtl_hw_start_8168h_1(struct rtl8169_private *tp)
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};
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int rg_saw_cnt;
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/* disable aspm and clock request before access ephy */
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rtl_hw_aspm_clkreq_enable(tp, false);
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rtl_ephy_init(tp, e_info_8168h_1);
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rtl_set_fifo_size(tp, 0x08, 0x10, 0x02, 0x06);
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@ -3241,8 +3300,6 @@ static void rtl_hw_start_8168h_1(struct rtl8169_private *tp)
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r8168_mac_ocp_write(tp, 0xe63e, 0x0000);
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r8168_mac_ocp_write(tp, 0xc094, 0x0000);
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r8168_mac_ocp_write(tp, 0xc09e, 0x0000);
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rtl_hw_aspm_clkreq_enable(tp, true);
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}
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static void rtl_hw_start_8168ep(struct rtl8169_private *tp)
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@ -3281,8 +3338,6 @@ static void rtl_hw_start_8168ep_3(struct rtl8169_private *tp)
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{ 0x1e, 0x0000, 0x2000 },
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};
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/* disable aspm and clock request before access ephy */
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rtl_hw_aspm_clkreq_enable(tp, false);
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rtl_ephy_init(tp, e_info_8168ep_3);
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rtl_hw_start_8168ep(tp);
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@ -3293,8 +3348,6 @@ static void rtl_hw_start_8168ep_3(struct rtl8169_private *tp)
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r8168_mac_ocp_modify(tp, 0xd3e2, 0x0fff, 0x0271);
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r8168_mac_ocp_modify(tp, 0xd3e4, 0x00ff, 0x0000);
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r8168_mac_ocp_modify(tp, 0xe860, 0x0000, 0x0080);
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rtl_hw_aspm_clkreq_enable(tp, true);
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}
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static void rtl_hw_start_8117(struct rtl8169_private *tp)
|
||||
@ -3306,9 +3359,6 @@ static void rtl_hw_start_8117(struct rtl8169_private *tp)
|
||||
int rg_saw_cnt;
|
||||
|
||||
rtl8168ep_stop_cmac(tp);
|
||||
|
||||
/* disable aspm and clock request before access ephy */
|
||||
rtl_hw_aspm_clkreq_enable(tp, false);
|
||||
rtl_ephy_init(tp, e_info_8117);
|
||||
|
||||
rtl_set_fifo_size(tp, 0x08, 0x10, 0x02, 0x06);
|
||||
@ -3358,8 +3408,6 @@ static void rtl_hw_start_8117(struct rtl8169_private *tp)
|
||||
|
||||
/* firmware is for MAC only */
|
||||
r8169_apply_firmware(tp);
|
||||
|
||||
rtl_hw_aspm_clkreq_enable(tp, true);
|
||||
}
|
||||
|
||||
static void rtl_hw_start_8102e_1(struct rtl8169_private *tp)
|
||||
@ -3482,8 +3530,6 @@ static void rtl_hw_start_8402(struct rtl8169_private *tp)
|
||||
|
||||
static void rtl_hw_start_8106(struct rtl8169_private *tp)
|
||||
{
|
||||
rtl_hw_aspm_clkreq_enable(tp, false);
|
||||
|
||||
/* Force LAN exit from ASPM if Rx/Tx are not idle */
|
||||
RTL_W32(tp, FuncEvent, RTL_R32(tp, FuncEvent) | 0x002800);
|
||||
|
||||
@ -3500,7 +3546,6 @@ static void rtl_hw_start_8106(struct rtl8169_private *tp)
|
||||
rtl_eri_write(tp, 0x1b0, ERIAR_MASK_0011, 0x0000);
|
||||
|
||||
rtl_pcie_state_l2l3_disable(tp);
|
||||
rtl_hw_aspm_clkreq_enable(tp, true);
|
||||
}
|
||||
|
||||
DECLARE_RTL_COND(rtl_mac_ocp_e00e_cond)
|
||||
@ -3588,13 +3633,8 @@ static void rtl_hw_start_8125a_2(struct rtl8169_private *tp)
|
||||
};
|
||||
|
||||
rtl_set_def_aspm_entry_latency(tp);
|
||||
|
||||
/* disable aspm and clock request before access ephy */
|
||||
rtl_hw_aspm_clkreq_enable(tp, false);
|
||||
rtl_ephy_init(tp, e_info_8125a_2);
|
||||
|
||||
rtl_hw_start_8125_common(tp);
|
||||
rtl_hw_aspm_clkreq_enable(tp, true);
|
||||
}
|
||||
|
||||
static void rtl_hw_start_8125b(struct rtl8169_private *tp)
|
||||
@ -3609,12 +3649,8 @@ static void rtl_hw_start_8125b(struct rtl8169_private *tp)
|
||||
};
|
||||
|
||||
rtl_set_def_aspm_entry_latency(tp);
|
||||
rtl_hw_aspm_clkreq_enable(tp, false);
|
||||
|
||||
rtl_ephy_init(tp, e_info_8125b);
|
||||
rtl_hw_start_8125_common(tp);
|
||||
|
||||
rtl_hw_aspm_clkreq_enable(tp, true);
|
||||
}
|
||||
|
||||
static void rtl_hw_config(struct rtl8169_private *tp)
|
||||
@ -3710,7 +3746,8 @@ static void rtl_hw_start_8169(struct rtl8169_private *tp)
|
||||
static void rtl_hw_start(struct rtl8169_private *tp)
|
||||
{
|
||||
rtl_unlock_config_regs(tp);
|
||||
|
||||
/* disable aspm and clock request before ephy access */
|
||||
rtl_hw_aspm_clkreq_enable(tp, false);
|
||||
RTL_W16(tp, CPlusCmd, tp->cp_cmd);
|
||||
|
||||
if (tp->mac_version <= RTL_GIGA_MAC_VER_06)
|
||||
@ -3721,6 +3758,7 @@ static void rtl_hw_start(struct rtl8169_private *tp)
|
||||
rtl_hw_start_8168(tp);
|
||||
|
||||
rtl_enable_exit_l1(tp);
|
||||
rtl_hw_aspm_clkreq_enable(tp, true);
|
||||
rtl_set_rx_max_size(tp);
|
||||
rtl_set_rx_tx_desc_registers(tp);
|
||||
rtl_lock_config_regs(tp);
|
||||
@ -3932,7 +3970,7 @@ static void rtl8169_tx_timeout(struct net_device *dev, unsigned int txqueue)
|
||||
{
|
||||
struct rtl8169_private *tp = netdev_priv(dev);
|
||||
|
||||
rtl_schedule_task(tp, RTL_FLAG_TASK_RESET_PENDING);
|
||||
rtl_schedule_task(tp, RTL_FLAG_TASK_TX_TIMEOUT);
|
||||
}
|
||||
|
||||
static int rtl8169_tx_map(struct rtl8169_private *tp, const u32 *opts, u32 len,
|
||||
@ -4136,13 +4174,9 @@ static bool rtl8169_tso_csum_v2(struct rtl8169_private *tp,
|
||||
return true;
|
||||
}
|
||||
|
||||
static bool rtl_tx_slots_avail(struct rtl8169_private *tp)
|
||||
static unsigned int rtl_tx_slots_avail(struct rtl8169_private *tp)
|
||||
{
|
||||
unsigned int slots_avail = READ_ONCE(tp->dirty_tx) + NUM_TX_DESC
|
||||
- READ_ONCE(tp->cur_tx);
|
||||
|
||||
/* A skbuff with nr_frags needs nr_frags+1 entries in the tx queue */
|
||||
return slots_avail > MAX_SKB_FRAGS;
|
||||
return READ_ONCE(tp->dirty_tx) + NUM_TX_DESC - READ_ONCE(tp->cur_tx);
|
||||
}
|
||||
|
||||
/* Versions RTL8102e and from RTL8168c onwards support csum_v2 */
|
||||
@ -4219,27 +4253,10 @@ static netdev_tx_t rtl8169_start_xmit(struct sk_buff *skb,
|
||||
|
||||
WRITE_ONCE(tp->cur_tx, tp->cur_tx + frags + 1);
|
||||
|
||||
stop_queue = !rtl_tx_slots_avail(tp);
|
||||
if (unlikely(stop_queue)) {
|
||||
/* Avoid wrongly optimistic queue wake-up: rtl_tx thread must
|
||||
* not miss a ring update when it notices a stopped queue.
|
||||
*/
|
||||
smp_wmb();
|
||||
netif_stop_queue(dev);
|
||||
/* Sync with rtl_tx:
|
||||
* - publish queue status and cur_tx ring index (write barrier)
|
||||
* - refresh dirty_tx ring index (read barrier).
|
||||
* May the current thread have a pessimistic view of the ring
|
||||
* status and forget to wake up queue, a racing rtl_tx thread
|
||||
* can't.
|
||||
*/
|
||||
smp_mb__after_atomic();
|
||||
if (rtl_tx_slots_avail(tp))
|
||||
netif_start_queue(dev);
|
||||
door_bell = true;
|
||||
}
|
||||
|
||||
if (door_bell)
|
||||
stop_queue = !netif_subqueue_maybe_stop(dev, 0, rtl_tx_slots_avail(tp),
|
||||
R8169_TX_STOP_THRS,
|
||||
R8169_TX_START_THRS);
|
||||
if (door_bell || stop_queue)
|
||||
rtl8169_doorbell(tp);
|
||||
|
||||
return NETDEV_TX_OK;
|
||||
@ -4363,19 +4380,12 @@ static void rtl_tx(struct net_device *dev, struct rtl8169_private *tp,
|
||||
}
|
||||
|
||||
if (tp->dirty_tx != dirty_tx) {
|
||||
netdev_completed_queue(dev, pkts_compl, bytes_compl);
|
||||
dev_sw_netstats_tx_add(dev, pkts_compl, bytes_compl);
|
||||
WRITE_ONCE(tp->dirty_tx, dirty_tx);
|
||||
|
||||
/* Sync with rtl8169_start_xmit:
|
||||
* - publish dirty_tx ring index (write barrier)
|
||||
* - refresh cur_tx ring index and queue status (read barrier)
|
||||
* May the current thread miss the stopped queue condition,
|
||||
* a racing xmit thread can only have a right view of the
|
||||
* ring status.
|
||||
*/
|
||||
smp_store_mb(tp->dirty_tx, dirty_tx);
|
||||
if (netif_queue_stopped(dev) && rtl_tx_slots_avail(tp))
|
||||
netif_wake_queue(dev);
|
||||
netif_subqueue_completed_wake(dev, 0, pkts_compl, bytes_compl,
|
||||
rtl_tx_slots_avail(tp),
|
||||
R8169_TX_START_THRS);
|
||||
/*
|
||||
* 8168 hack: TxPoll requests are lost when the Tx packets are
|
||||
* too close. Let's kick an extra TxPoll request when a burst
|
||||
@ -4526,6 +4536,7 @@ static void rtl_task(struct work_struct *work)
|
||||
{
|
||||
struct rtl8169_private *tp =
|
||||
container_of(work, struct rtl8169_private, wk.work);
|
||||
int ret;
|
||||
|
||||
rtnl_lock();
|
||||
|
||||
@ -4533,7 +4544,27 @@ static void rtl_task(struct work_struct *work)
|
||||
!test_bit(RTL_FLAG_TASK_ENABLED, tp->wk.flags))
|
||||
goto out_unlock;
|
||||
|
||||
if (test_and_clear_bit(RTL_FLAG_TASK_TX_TIMEOUT, tp->wk.flags)) {
|
||||
/* if chip isn't accessible, reset bus to revive it */
|
||||
if (RTL_R32(tp, TxConfig) == ~0) {
|
||||
ret = pci_reset_bus(tp->pci_dev);
|
||||
if (ret < 0) {
|
||||
netdev_err(tp->dev, "Can't reset secondary PCI bus, detach NIC\n");
|
||||
netif_device_detach(tp->dev);
|
||||
goto out_unlock;
|
||||
}
|
||||
}
|
||||
|
||||
/* ASPM compatibility issues are a typical reason for tx timeouts */
|
||||
ret = pci_disable_link_state(tp->pci_dev, PCIE_LINK_STATE_L1 |
|
||||
PCIE_LINK_STATE_L0S);
|
||||
if (!ret)
|
||||
netdev_warn_once(tp->dev, "ASPM disabled on Tx timeout\n");
|
||||
goto reset;
|
||||
}
|
||||
|
||||
if (test_and_clear_bit(RTL_FLAG_TASK_RESET_PENDING, tp->wk.flags)) {
|
||||
reset:
|
||||
rtl_reset_work(tp);
|
||||
netif_wake_queue(tp->dev);
|
||||
}
|
||||
@ -4560,12 +4591,13 @@ static int rtl8169_poll(struct napi_struct *napi, int budget)
|
||||
static void r8169_phylink_handler(struct net_device *ndev)
|
||||
{
|
||||
struct rtl8169_private *tp = netdev_priv(ndev);
|
||||
struct device *d = tp_to_dev(tp);
|
||||
|
||||
if (netif_carrier_ok(ndev)) {
|
||||
rtl_link_chg_patch(tp);
|
||||
pm_request_resume(&tp->pci_dev->dev);
|
||||
pm_request_resume(d);
|
||||
} else {
|
||||
pm_runtime_idle(&tp->pci_dev->dev);
|
||||
pm_runtime_idle(d);
|
||||
}
|
||||
|
||||
phy_print_status(tp->phydev);
|
||||
@ -5019,7 +5051,7 @@ static int r8169_mdio_register(struct rtl8169_private *tp)
|
||||
return -EUNATCH;
|
||||
}
|
||||
|
||||
tp->phydev->mac_managed_pm = 1;
|
||||
tp->phydev->mac_managed_pm = true;
|
||||
|
||||
phy_support_asym_pause(tp->phydev);
|
||||
|
||||
@ -5142,6 +5174,7 @@ static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
|
||||
int jumbo_max, region, rc;
|
||||
enum mac_version chipset;
|
||||
struct net_device *dev;
|
||||
u32 txconfig;
|
||||
u16 xid;
|
||||
|
||||
dev = devm_alloc_etherdev(&pdev->dev, sizeof (*tp));
|
||||
@ -5157,6 +5190,10 @@ static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
|
||||
tp->eee_adv = -1;
|
||||
tp->ocp_base = OCP_STD_PHY_BASE;
|
||||
|
||||
raw_spin_lock_init(&tp->cfg9346_usage_lock);
|
||||
raw_spin_lock_init(&tp->config25_lock);
|
||||
raw_spin_lock_init(&tp->mac_ocp_lock);
|
||||
|
||||
dev->tstats = devm_netdev_alloc_pcpu_stats(&pdev->dev,
|
||||
struct pcpu_sw_netstats);
|
||||
if (!dev->tstats)
|
||||
@ -5169,38 +5206,35 @@ static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
|
||||
|
||||
/* enable device (incl. PCI PM wakeup and hotplug setup) */
|
||||
rc = pcim_enable_device(pdev);
|
||||
if (rc < 0) {
|
||||
dev_err(&pdev->dev, "enable failure\n");
|
||||
return rc;
|
||||
}
|
||||
if (rc < 0)
|
||||
return dev_err_probe(&pdev->dev, rc, "enable failure\n");
|
||||
|
||||
if (pcim_set_mwi(pdev) < 0)
|
||||
dev_info(&pdev->dev, "Mem-Wr-Inval unavailable\n");
|
||||
|
||||
/* use first MMIO region */
|
||||
region = ffs(pci_select_bars(pdev, IORESOURCE_MEM)) - 1;
|
||||
if (region < 0) {
|
||||
dev_err(&pdev->dev, "no MMIO resource found\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
if (region < 0)
|
||||
return dev_err_probe(&pdev->dev, -ENODEV, "no MMIO resource found\n");
|
||||
|
||||
rc = pcim_iomap_regions(pdev, BIT(region), KBUILD_MODNAME);
|
||||
if (rc < 0) {
|
||||
dev_err(&pdev->dev, "cannot remap MMIO, aborting\n");
|
||||
return rc;
|
||||
}
|
||||
if (rc < 0)
|
||||
return dev_err_probe(&pdev->dev, rc, "cannot remap MMIO, aborting\n");
|
||||
|
||||
tp->mmio_addr = pcim_iomap_table(pdev)[region];
|
||||
|
||||
xid = (RTL_R32(tp, TxConfig) >> 20) & 0xfcf;
|
||||
txconfig = RTL_R32(tp, TxConfig);
|
||||
if (txconfig == ~0U)
|
||||
return dev_err_probe(&pdev->dev, -EIO, "PCI read failed\n");
|
||||
|
||||
xid = (txconfig >> 20) & 0xfcf;
|
||||
|
||||
/* Identify chip attached to board */
|
||||
chipset = rtl8169_get_mac_version(xid, tp->supports_gmii);
|
||||
if (chipset == RTL_GIGA_MAC_NONE) {
|
||||
dev_err(&pdev->dev, "unknown chip XID %03x, contact r8169 maintainers (see MAINTAINERS file)\n", xid);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
if (chipset == RTL_GIGA_MAC_NONE)
|
||||
return dev_err_probe(&pdev->dev, -ENODEV,
|
||||
"unknown chip XID %03x, contact r8169 maintainers (see MAINTAINERS file)\n",
|
||||
xid);
|
||||
tp->mac_version = chipset;
|
||||
|
||||
/* Disable ASPM L1 as that cause random device stop working
|
||||
@ -5233,10 +5267,9 @@ static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
|
||||
rtl_hw_reset(tp);
|
||||
|
||||
rc = rtl_alloc_irq(tp);
|
||||
if (rc < 0) {
|
||||
dev_err(&pdev->dev, "Can't allocate interrupt\n");
|
||||
return rc;
|
||||
}
|
||||
if (rc < 0)
|
||||
return dev_err_probe(&pdev->dev, rc, "Can't allocate interrupt\n");
|
||||
|
||||
tp->irq = pci_irq_vector(pdev, 0);
|
||||
|
||||
INIT_WORK(&tp->wk.work, rtl_task);
|
||||
@ -5283,6 +5316,8 @@ static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
|
||||
dev->hw_features |= NETIF_F_RXALL;
|
||||
dev->hw_features |= NETIF_F_RXFCS;
|
||||
|
||||
netdev_sw_irq_coalesce_default_on(dev);
|
||||
|
||||
/* configure chip for default features */
|
||||
rtl8169_set_features(dev, dev->features);
|
||||
|
||||
@ -5345,4 +5380,4 @@ static struct pci_driver rtl8169_pci_driver = {
|
||||
.driver.pm = pm_ptr(&rtl8169_pm_ops),
|
||||
};
|
||||
|
||||
module_pci_driver(rtl8169_pci_driver);
|
||||
module_pci_driver(rtl8169_pci_driver);
|
||||
@ -1156,4 +1156,4 @@ void r8169_hw_phy_config(struct rtl8169_private *tp, struct phy_device *phydev,
|
||||
|
||||
if (phy_configs[ver])
|
||||
phy_configs[ver](tp, phydev);
|
||||
}
|
||||
}
|
||||
Loading…
Reference in New Issue
Block a user