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r8126: update to 10.013.00

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Signed-off-by: AuxXxilium <info@auxxxilium.tech>
This commit is contained in:
AuxXxilium 2024-03-04 21:59:03 +01:00
parent 3ef36b7514
commit c15092717f
16 changed files with 4388 additions and 7875 deletions
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28
Makefile
View File

@ -1,10 +1,10 @@
# SPDX-License-Identifier: GPL-2.0-only
################################################################################
#
# r8125 is the Linux device driver released for Realtek 2.5/5 Gigabit Ethernet
# r8126 is the Linux device driver released for Realtek 5 Gigabit Ethernet
# controllers with PCI-Express interface.
#
# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
# Copyright(c) 2024 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free
@ -41,7 +41,7 @@ ENABLE_S5_KEEP_CURR_MAC = n
ENABLE_EEE = y
ENABLE_S0_MAGIC_PACKET = n
ENABLE_TX_NO_CLOSE = y
ENABLE_MULTIPLE_TX_QUEUE = n
ENABLE_MULTIPLE_TX_QUEUE = y
ENABLE_PTP_SUPPORT = n
ENABLE_PTP_MASTER_MODE = n
ENABLE_RSS_SUPPORT = n
@ -54,25 +54,25 @@ ENABLE_PAGE_REUSE = n
ENABLE_RX_PACKET_FRAGMENT = n
ifneq ($(KERNELRELEASE),)
obj-m := r8125.o
r8125-objs := r8125_n.o rtl_eeprom.o rtltool.o
obj-m := r8126.o
r8126-objs := r8126_n.o rtl_eeprom.o rtltool.o
ifeq ($(CONFIG_SOC_LAN), y)
EXTRA_CFLAGS += -DCONFIG_SOC_LAN
endif
ifeq ($(ENABLE_REALWOW_SUPPORT), y)
r8125-objs += r8125_realwow.o
r8126-objs += r8126_realwow.o
EXTRA_CFLAGS += -DENABLE_REALWOW_SUPPORT
endif
ifeq ($(ENABLE_DASH_SUPPORT), y)
r8125-objs += r8125_dash.o
r8126-objs += r8126_dash.o
EXTRA_CFLAGS += -DENABLE_DASH_SUPPORT
endif
ifeq ($(ENABLE_DASH_PRINTER_SUPPORT), y)
r8125-objs += r8125_dash.o
r8126-objs += r8126_dash.o
EXTRA_CFLAGS += -DENABLE_DASH_SUPPORT -DENABLE_DASH_PRINTER_SUPPORT
endif
EXTRA_CFLAGS += -DCONFIG_R8125_NAPI
EXTRA_CFLAGS += -DCONFIG_R8125_VLAN
EXTRA_CFLAGS += -DCONFIG_R8126_NAPI
EXTRA_CFLAGS += -DCONFIG_R8126_VLAN
ifeq ($(CONFIG_DOWN_SPEED_100), y)
EXTRA_CFLAGS += -DCONFIG_DOWN_SPEED_100
endif
@ -98,22 +98,22 @@ ifneq ($(KERNELRELEASE),)
EXTRA_CFLAGS += -DENABLE_MULTIPLE_TX_QUEUE
endif
ifeq ($(ENABLE_PTP_SUPPORT), y)
r8125-objs += r8125_ptp.o
r8126-objs += r8126_ptp.o
EXTRA_CFLAGS += -DENABLE_PTP_SUPPORT
endif
ifeq ($(ENABLE_PTP_MASTER_MODE), y)
EXTRA_CFLAGS += -DENABLE_PTP_MASTER_MODE
endif
ifeq ($(ENABLE_RSS_SUPPORT), y)
r8125-objs += r8125_rss.o
r8126-objs += r8126_rss.o
EXTRA_CFLAGS += -DENABLE_RSS_SUPPORT
endif
ifeq ($(ENABLE_LIB_SUPPORT), y)
r8125-objs += r8125_lib.o
r8126-objs += r8126_lib.o
EXTRA_CFLAGS += -DENABLE_LIB_SUPPORT
endif
ifeq ($(ENABLE_USE_FIRMWARE_FILE), y)
r8125-objs += r8125_firmware.o
r8126-objs += r8126_firmware.o
EXTRA_CFLAGS += -DENABLE_USE_FIRMWARE_FILE
endif
ifeq ($(DISABLE_WOL_SUPPORT), y)

12
Makefile_linux24x
View File

@ -1,10 +1,10 @@
# SPDX-License-Identifier: GPL-2.0-only
################################################################################
#
# r8125 is the Linux device driver released for Realtek 2.5/5 Gigabit Ethernet
# r8126 is the Linux device driver released for Realtek 5 Gigabit Ethernet
# controllers with PCI-Express interface.
#
# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
# Copyright(c) 2024 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free
@ -46,7 +46,7 @@ endif
MODCFLAGS += -DLINUX -D__KERNEL__ -DMODULE -O2 -pipe -Wall
MODCFLAGS += -I$(KSRC)/include -I.
MODCFLAGS += -DMODVERSIONS -DEXPORT_SYMTAB -include $(KSRC)/include/linux/modversions.h
SOURCE := r8125_n.c rtl_eeprom.c rtltool.c
SOURCE := r8126_n.c rtl_eeprom.c rtltool.c
OBJS := $(SOURCE:.c=.o)
@ -62,8 +62,8 @@ ifeq ($(SMP),1)
endif
modules: $(OBJS)
$(LD) -r $^ -o r8125.o
strip --strip-debug r8125.o
$(LD) -r $^ -o r8126.o
strip --strip-debug r8126.o
%.o: %.c
$(CC) $(MODCFLAGS) -c $< -o $@
@ -72,4 +72,4 @@ clean:
rm *.o -f
install:
install -m 744 -c r8125.o $(KMISC)
install -m 744 -c r8126.o $(KMISC)

479
r8125.h → r8126.h
View File

@ -2,10 +2,10 @@
/*
################################################################################
#
# r8125 is the Linux device driver released for Realtek 2.5/5 Gigabit Ethernet
# r8126 is the Linux device driver released for Realtek 5 Gigabit Ethernet
# controllers with PCI-Express interface.
#
# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
# Copyright(c) 2024 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free
@ -32,19 +32,23 @@
* US6,570,884, US6,115,776, and US6,327,625.
***********************************************************************************/
#ifndef __R8125_H
#define __R8125_H
#ifndef __R8126_H
#define __R8126_H
//#include <linux/pci.h>
#include <linux/ethtool.h>
#include <linux/interrupt.h>
#include <linux/version.h>
#include "r8125_dash.h"
#include "r8125_realwow.h"
#include "r8125_ptp.h"
#include "r8125_rss.h"
#include "r8126_dash.h"
#include "r8126_realwow.h"
#include "r8126_ptp.h"
#include "r8126_rss.h"
#ifdef ENABLE_LIB_SUPPORT
#include "r8125_lib.h"
#include "r8126_lib.h"
#endif
#ifndef fallthrough
#define fallthrough
#endif
#if LINUX_VERSION_CODE < KERNEL_VERSION(4,3,0)
@ -229,18 +233,18 @@ do { \
#endif //LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0)
#define RTL_ALLOC_SKB_INTR(napi, length) dev_alloc_skb(length)
#define R8125_USE_NAPI_ALLOC_SKB 0
#ifdef CONFIG_R8125_NAPI
#define R8126_USE_NAPI_ALLOC_SKB 0
#ifdef CONFIG_R8126_NAPI
#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,19,0)
#undef RTL_ALLOC_SKB_INTR
#define RTL_ALLOC_SKB_INTR(napi, length) napi_alloc_skb(napi, length)
#undef R8125_USE_NAPI_ALLOC_SKB
#define R8125_USE_NAPI_ALLOC_SKB 1
#undef R8126_USE_NAPI_ALLOC_SKB
#define R8126_USE_NAPI_ALLOC_SKB 1
#endif
#endif
#define RTL_BUILD_SKB_INTR(data, frag_size) build_skb(data, frag_size)
#ifdef CONFIG_R8125_NAPI
#ifdef CONFIG_R8126_NAPI
#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,12,0)
#undef RTL_BUILD_SKB_INTR
#define RTL_BUILD_SKB_INTR(data, frag_size) napi_build_skb(data, frag_size)
@ -266,11 +270,11 @@ do { \
#endif
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,37)
#define ENABLE_R8125_PROCFS
#define ENABLE_R8126_PROCFS
#endif
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
#define ENABLE_R8125_SYSFS
#define ENABLE_R8126_SYSFS
#endif
#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
@ -380,28 +384,36 @@ do { \
#define MDIO_EEE_1000T 0x0004
#endif
#ifndef MDIO_EEE_2_5GT
#define MDIO_EEE_2_5GT 0x0001
#endif
#ifndef MDIO_EEE_5GT
#define MDIO_EEE_5GT 0x0002
#endif
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29)
#ifdef CONFIG_NET_POLL_CONTROLLER
#define RTL_NET_POLL_CONTROLLER dev->poll_controller=rtl8125_netpoll
#define RTL_NET_POLL_CONTROLLER dev->poll_controller=rtl8126_netpoll
#else
#define RTL_NET_POLL_CONTROLLER
#endif
#ifdef CONFIG_R8125_VLAN
#define RTL_SET_VLAN dev->vlan_rx_register=rtl8125_vlan_rx_register
#ifdef CONFIG_R8126_VLAN
#define RTL_SET_VLAN dev->vlan_rx_register=rtl8126_vlan_rx_register
#else
#define RTL_SET_VLAN
#endif
#define RTL_NET_DEVICE_OPS(ops) dev->open=rtl8125_open; \
dev->hard_start_xmit=rtl8125_start_xmit; \
dev->get_stats=rtl8125_get_stats; \
dev->stop=rtl8125_close; \
dev->tx_timeout=rtl8125_tx_timeout; \
dev->set_multicast_list=rtl8125_set_rx_mode; \
dev->change_mtu=rtl8125_change_mtu; \
dev->set_mac_address=rtl8125_set_mac_address; \
dev->do_ioctl=rtl8125_do_ioctl; \
#define RTL_NET_DEVICE_OPS(ops) dev->open=rtl8126_open; \
dev->hard_start_xmit=rtl8126_start_xmit; \
dev->get_stats=rtl8126_get_stats; \
dev->stop=rtl8126_close; \
dev->tx_timeout=rtl8126_tx_timeout; \
dev->set_multicast_list=rtl8126_set_rx_mode; \
dev->change_mtu=rtl8126_change_mtu; \
dev->set_mac_address=rtl8126_set_mac_address; \
dev->do_ioctl=rtl8126_do_ioctl; \
RTL_NET_POLL_CONTROLLER; \
RTL_SET_VLAN;
#else
@ -431,9 +443,9 @@ do { \
#ifndef NET_IP_ALIGN
#define NET_IP_ALIGN 2
#endif
#define R8125_RX_ALIGN NET_IP_ALIGN
#define R8126_RX_ALIGN NET_IP_ALIGN
#ifdef CONFIG_R8125_NAPI
#ifdef CONFIG_R8126_NAPI
#define NAPI_SUFFIX "-NAPI"
#else
#define NAPI_SUFFIX ""
@ -464,16 +476,16 @@ do { \
#define RSS_SUFFIX ""
#endif
#define RTL8125_VERSION "9.012.04" NAPI_SUFFIX DASH_SUFFIX REALWOW_SUFFIX PTP_SUFFIX RSS_SUFFIX
#define MODULENAME "r8125"
#define RTL8126_VERSION "10.013.00" NAPI_SUFFIX DASH_SUFFIX REALWOW_SUFFIX PTP_SUFFIX RSS_SUFFIX
#define MODULENAME "r8126"
#define PFX MODULENAME ": "
#define GPL_CLAIM "\
r8125 Copyright (C) 2023 Realtek NIC software team <nicfae@realtek.com> \n \
r8126 Copyright (C) 2024 Realtek NIC software team <nicfae@realtek.com> \n \
This program comes with ABSOLUTELY NO WARRANTY; for details, please see <http://www.gnu.org/licenses/>. \n \
This is free software, and you are welcome to redistribute it under certain conditions; see <http://www.gnu.org/licenses/>. \n"
#ifdef RTL8125_DEBUG
#ifdef RTL8126_DEBUG
#define assert(expr) \
if(!(expr)) { \
printk( "Assertion failed! %s,%s,%s,line=%d\n", \
@ -483,17 +495,17 @@ This is free software, and you are welcome to redistribute it under certain cond
#else
#define assert(expr) do {} while (0)
#define dprintk(fmt, args...) do {} while (0)
#endif /* RTL8125_DEBUG */
#endif /* RTL8126_DEBUG */
#define R8125_MSG_DEFAULT \
#define R8126_MSG_DEFAULT \
(NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN)
#ifdef CONFIG_R8125_NAPI
#define rtl8125_rx_hwaccel_skb vlan_hwaccel_receive_skb
#define rtl8125_rx_quota(count, quota) min(count, quota)
#ifdef CONFIG_R8126_NAPI
#define rtl8126_rx_hwaccel_skb vlan_hwaccel_receive_skb
#define rtl8126_rx_quota(count, quota) min(count, quota)
#else
#define rtl8125_rx_hwaccel_skb vlan_hwaccel_rx
#define rtl8125_rx_quota(count, quota) count
#define rtl8126_rx_hwaccel_skb vlan_hwaccel_rx
#define rtl8126_rx_quota(count, quota) count
#endif
/* MAC address length */
@ -516,6 +528,7 @@ This is free software, and you are welcome to redistribute it under certain cond
#define Reserved2_data 7
#define RX_DMA_BURST_unlimited 7 /* Maximum PCI burst, '7' is unlimited */
#define RX_DMA_BURST_512 5
#define RX_DMA_BURST_256 4
#define TX_DMA_BURST_unlimited 7
#define TX_DMA_BURST_1024 6
#define TX_DMA_BURST_512 5
@ -542,26 +555,29 @@ This is free software, and you are welcome to redistribute it under certain cond
#define Rx_Close_Multiple (1 << 21)
#define Rx_Fetch_Number_8 (1 << 30)
#define R8125_REGS_SIZE (256)
#define R8125_MAC_REGS_SIZE (256)
#define R8125_PHY_REGS_SIZE (16*2)
#define R8125_EPHY_REGS_SIZE (31*2)
#define R8125_ERI_REGS_SIZE (0x100)
#define R8125_REGS_DUMP_SIZE (0x400)
#define R8125_PCI_REGS_SIZE (0x100)
#define R8125_NAPI_WEIGHT 64
#define R8126_REGS_SIZE (256)
#define R8126_MAC_REGS_SIZE (256)
#define R8126_PHY_REGS_SIZE (16*2)
#define R8126_EPHY_REGS_SIZE (31*2)
#define R8126_ERI_REGS_SIZE (0x100)
#define R8126_REGS_DUMP_SIZE (0x400)
#define R8126_PCI_REGS_SIZE (0x100)
#define R8126_NAPI_WEIGHT 64
#define R8125_MAX_MSIX_VEC_8125A 4
#define R8125_MAX_MSIX_VEC_8125B 32
#define R8125_MIN_MSIX_VEC_8125B 22
#define R8125_MAX_MSIX_VEC 32
#define R8125_MAX_RX_QUEUES_VEC_V3 (16)
#define R8126_MAX_MSIX_VEC_8125A 4
#define R8126_MAX_MSIX_VEC_8125B 32
#define R8126_MAX_MSIX_VEC_8125D 32
#define R8126_MIN_MSIX_VEC_8125B 22
#define R8126_MIN_MSIX_VEC_8125BP 31
#define R8126_MIN_MSIX_VEC_8125D 20
#define R8126_MAX_MSIX_VEC 32
#define R8126_MAX_RX_QUEUES_VEC_V3 (16)
#define RTL8125_TX_TIMEOUT (6 * HZ)
#define RTL8125_LINK_TIMEOUT (1 * HZ)
#define RTL8125_ESD_TIMEOUT (2 * HZ)
#define RTL8126_TX_TIMEOUT (6 * HZ)
#define RTL8126_LINK_TIMEOUT (1 * HZ)
#define RTL8126_ESD_TIMEOUT (2 * HZ)
#define rtl8125_rx_page_size(order) (PAGE_SIZE << order)
#define rtl8126_rx_page_size(order) (PAGE_SIZE << order)
#define MAX_NUM_TX_DESC 1024 /* Maximum number of Tx descriptor registers */
#define MAX_NUM_RX_DESC 1024 /* Maximum number of Rx descriptor registers */
@ -580,21 +596,21 @@ This is free software, and you are welcome to redistribute it under certain cond
#define RT_VALN_HLEN 4 /* 4(single vlan) bytes */
#endif
#define R8125_MAX_TX_QUEUES (2)
#define R8125_MAX_RX_QUEUES (4)
#define R8125_MAX_QUEUES R8125_MAX_RX_QUEUES
#define R8126_MAX_TX_QUEUES (2)
#define R8126_MAX_RX_QUEUES (4)
#define R8126_MAX_QUEUES R8126_MAX_RX_QUEUES
#define OCP_STD_PHY_BASE 0xa400
//Channel Wait Count
#define R8125_CHANNEL_WAIT_COUNT (20000)
#define R8125_CHANNEL_WAIT_TIME (1) // 1us
#define R8125_CHANNEL_EXIT_DELAY_TIME (20) //20us
#define R8126_CHANNEL_WAIT_COUNT (20000)
#define R8126_CHANNEL_WAIT_TIME (1) // 1us
#define R8126_CHANNEL_EXIT_DELAY_TIME (20) //20us
#ifdef ENABLE_LIB_SUPPORT
#define R8125_MULTI_RX_Q(tp) 0
#define R8126_MULTI_RX_Q(tp) 0
#else
#define R8125_MULTI_RX_Q(tp) (tp->num_rx_rings > 1)
#define R8126_MULTI_RX_Q(tp) (tp->num_rx_rings > 1)
#endif
#define NODE_ADDRESS_SIZE 6
@ -694,7 +710,7 @@ This is free software, and you are welcome to redistribute it under certain cond
#define D0_SPEED_UP_SPEED_2500 2
#define D0_SPEED_UP_SPEED_5000 3
#define RTL8125_MAC_MCU_PAGE_SIZE 256 //256 words
#define RTL8126_MAC_MCU_PAGE_SIZE 256 //256 words
#ifndef WRITE_ONCE
#define WRITE_ONCE(var, val) (*((volatile typeof(val) *)(&(var))) = (val))
@ -798,7 +814,7 @@ typedef int napi_budget;
#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27)
/*****************************************************************************/
#ifdef CONFIG_R8125_NAPI
#ifdef CONFIG_R8126_NAPI
#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,6,0)
#define RTL_NAPI_CONSUME_SKB_ANY(skb, budget) napi_consume_skb(skb, budget)
#elif LINUX_VERSION_CODE >= KERNEL_VERSION(3,14,0)
@ -806,13 +822,13 @@ typedef int napi_budget;
#else
#define RTL_NAPI_CONSUME_SKB_ANY(skb, budget) dev_kfree_skb_any(skb);
#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(4,6,0)
#else //CONFIG_R8125_NAPI
#else //CONFIG_R8126_NAPI
#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,14,0)
#define RTL_NAPI_CONSUME_SKB_ANY(skb, budget) dev_consume_skb_any(skb);
#else
#define RTL_NAPI_CONSUME_SKB_ANY(skb, budget) dev_kfree_skb_any(skb);
#endif
#endif //CONFIG_R8125_NAPI
#endif //CONFIG_R8126_NAPI
/*****************************************************************************/
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,9)
@ -1258,7 +1274,7 @@ struct _kc_ethtool_pauseparam {
/*****************************************************************************/
enum RTL8125_registers {
enum RTL8126_registers {
MAC0 = 0x00, /* Ethernet hardware address. */
MAC4 = 0x04,
MAR0 = 0x08, /* Multicast filter. */
@ -1357,6 +1373,13 @@ enum RTL8125_registers {
IMR_V2_SET_REG_8125 = 0x0D0C,
TDU_STA_8125 = 0x0D08,
RDU_STA_8125 = 0x0D0A,
IMR_V4_L2_CLEAR_REG_8125 = 0x0D10,
IMR_V4_L2_SET_REG_8125 = 0x0D18,
ISR_V4_L2_8125 = 0x0D14,
SW_TAIL_PTR0_8125BP = 0x0D30,
SW_TAIL_PTR1_8125BP = 0x0D38,
HW_CLO_PTR0_8125BP = 0x0D34,
HW_CLO_PTR1_8125BP = 0x0D3C,
DOUBLE_VLAN_CONFIG = 0x1000,
TX_NEW_CTRL = 0x203E,
TNPDS_Q1_LOW_8125 = 0x2100,
@ -1401,7 +1424,7 @@ enum RTL8125_registers {
TCAM_VLAN_TAG_V2 = 0x03,
};
enum RTL8125_register_content {
enum RTL8126_register_content {
/* InterruptStatusBits */
SYSErr = 0x8000,
PCSTimeout = 0x4000,
@ -1469,6 +1492,7 @@ enum RTL8125_register_content {
RxCfg_half_refetch = (1 << 13),
RxCfg_pause_slot_en = (1 << 11),
RxCfg_9356SEL = (1 << 6),
EnableRxDescV4_0 = (1 << 1), //not in rcr
/* TxConfigBits */
TxInterFrameGapShift = 24,
@ -1525,7 +1549,7 @@ enum RTL8125_register_content {
INTT_2 = 0x0002,
INTT_3 = 0x0003,
/* rtl8125_PHYstatus */
/* rtl8126_PHYstatus */
PowerSaveStatus = 0x80,
_5000bpsF = 0x1000,
_2500bpsF = 0x400,
@ -1637,13 +1661,22 @@ enum RTL8125_register_content {
INT_CFG0_TIMEOUT0_BYPASS_8125 = (1 << 1),
INT_CFG0_MITIGATION_BYPASS_8125 = (1 << 2),
INT_CFG0_RDU_BYPASS_8126 = (1 << 4),
INT_CFG0_MSIX_ENTRY_NUM_MODE = (1 << 5),
ISRIMR_V2_ROK_Q0 = (1 << 0),
ISRIMR_TOK_Q0 = (1 << 16),
ISRIMR_TOK_Q1 = (1 << 18),
ISRIMR_V2_LINKCHG = (1 << 21),
ISRIMR_V4_ROK_Q0 = (1 << 0),
ISRIMR_V4_LINKCHG = (1 << 29),
ISRIMR_V5_ROK_Q0 = (1 << 0),
ISRIMR_V5_TOK_Q0 = (1 << 16),
ISRIMR_V5_TOK_Q1 = (1 << 17),
ISRIMR_V5_LINKCHG = (1 << 18),
/* Magic Number */
RTL8125_MAGIC_NUMBER = 0x0badbadbadbadbadull,
RTL8126_MAGIC_NUMBER = 0x0badbadbadbadbadull,
};
enum _DescStatusBit {
@ -1776,15 +1809,15 @@ enum bits {
BIT_31 = (1 << 31)
};
#define RTL8125_CP_NUM 4
#define RTL8125_MAX_SUPPORT_CP_LEN 110
#define RTL8126_CP_NUM 4
#define RTL8126_MAX_SUPPORT_CP_LEN 110
enum rtl8125_cp_status {
rtl8125_cp_normal = 0,
rtl8125_cp_short,
rtl8125_cp_open,
rtl8125_cp_mismatch,
rtl8125_cp_unknown
enum rtl8126_cp_status {
rtl8126_cp_normal = 0,
rtl8126_cp_short,
rtl8126_cp_open,
rtl8126_cp_mismatch,
rtl8126_cp_unknown
};
enum efuse {
@ -1875,6 +1908,7 @@ enum rx_desc_ring_type {
RX_DESC_RING_TYPE_1,
RX_DESC_RING_TYPE_2,
RX_DESC_RING_TYPE_3,
RX_DESC_RING_TYPE_4,
RX_DESC_RING_TYPE_MAX
};
@ -1911,20 +1945,20 @@ struct pci_resource {
u32 pci_sn_h;
};
enum r8125_flag {
R8125_FLAG_DOWN = 0,
R8125_FLAG_TASK_RESET_PENDING,
R8125_FLAG_TASK_ESD_CHECK_PENDING,
R8125_FLAG_TASK_LINKCHG_CHECK_PENDING,
R8125_FLAG_MAX
enum r8126_flag {
R8126_FLAG_DOWN = 0,
R8126_FLAG_TASK_RESET_PENDING,
R8126_FLAG_TASK_ESD_CHECK_PENDING,
R8126_FLAG_TASK_LINKCHG_CHECK_PENDING,
R8126_FLAG_MAX
};
enum r8125_sysfs_flag {
R8125_SYSFS_RTL_ADV = 0,
R8125_SYSFS_FLAG_MAX
enum r8126_sysfs_flag {
R8126_SYSFS_RTL_ADV = 0,
R8126_SYSFS_FLAG_MAX
};
struct rtl8125_tx_ring {
struct rtl8126_tx_ring {
void* priv;
struct net_device *netdev;
u32 index;
@ -1945,7 +1979,7 @@ struct rtl8125_tx_ring {
u16 tdsar_reg; /* Transmit Descriptor Start Address */
};
struct rtl8125_rx_buffer {
struct rtl8126_rx_buffer {
struct page *page;
u32 page_offset;
dma_addr_t dma;
@ -1953,7 +1987,7 @@ struct rtl8125_rx_buffer {
struct sk_buff *skb;
};
struct rtl8125_rx_ring {
struct rtl8126_rx_ring {
void* priv;
struct net_device *netdev;
u32 index;
@ -1965,7 +1999,7 @@ struct rtl8125_rx_ring {
u64 RxDescPhyAddr[MAX_NUM_RX_DESC]; /* Rx desc physical address*/
dma_addr_t RxPhyAddr;
#ifdef ENABLE_PAGE_REUSE
struct rtl8125_rx_buffer rx_buffer[MAX_NUM_RX_DESC];
struct rtl8126_rx_buffer rx_buffer[MAX_NUM_RX_DESC];
u16 rx_offset;
#else
struct sk_buff *Rx_skbuff[MAX_NUM_RX_DESC]; /* Rx data buffers */
@ -1974,8 +2008,8 @@ struct rtl8125_rx_ring {
u16 rdsar_reg; /* Receive Descriptor Start Address */
};
struct r8125_napi {
#ifdef CONFIG_R8125_NAPI
struct r8126_napi {
#ifdef CONFIG_R8126_NAPI
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)
struct napi_struct napi;
#endif
@ -1984,7 +2018,7 @@ struct r8125_napi {
int index;
};
struct r8125_irq {
struct r8126_irq {
irq_handler_t handler;
unsigned int vector;
u8 requested;
@ -1992,7 +2026,7 @@ struct r8125_irq {
};
#pragma pack(1)
struct rtl8125_regs {
struct rtl8126_regs {
//00
u8 mac_id[6];
u16 reg_06;
@ -2100,18 +2134,18 @@ struct rtl8125_regs {
};
#pragma pack()
struct rtl8125_regs_save {
struct rtl8126_regs_save {
union {
u8 mac_io[R8125_MAC_REGS_SIZE];
u8 mac_io[R8126_MAC_REGS_SIZE];
struct rtl8125_regs mac_reg;
struct rtl8126_regs mac_reg;
};
u16 pcie_phy[R8125_EPHY_REGS_SIZE/2];
u16 eth_phy[R8125_PHY_REGS_SIZE/2];
u32 eri_reg[R8125_ERI_REGS_SIZE/4];
u32 pci_reg[R8125_PCI_REGS_SIZE/4];
u16 sw_tail_ptr_reg[R8125_MAX_TX_QUEUES];
u16 hw_clo_ptr_reg[R8125_MAX_TX_QUEUES];
u16 pcie_phy[R8126_EPHY_REGS_SIZE/2];
u16 eth_phy[R8126_PHY_REGS_SIZE/2];
u32 eri_reg[R8126_ERI_REGS_SIZE/4];
u32 pci_reg[R8126_PCI_REGS_SIZE/4];
u16 sw_tail_ptr_reg[R8126_MAX_TX_QUEUES];
u16 hw_clo_ptr_reg[R8126_MAX_TX_QUEUES];
//ktime_t begin_ktime;
//ktime_t end_ktime;
@ -2145,12 +2179,12 @@ struct rtl8125_regs_save {
u32 rxq1_dsc_st_addr_2;
u32 rss_ctrl;
u8 rss_key[RTL8125_RSS_KEY_SIZE];
u8 rss_i_table[RTL8125_MAX_INDIRECTION_TABLE_ENTRIES];
u8 rss_key[RTL8126_RSS_KEY_SIZE];
u8 rss_i_table[RTL8126_MAX_INDIRECTION_TABLE_ENTRIES];
u16 rss_queue_num_sel_r;
};
struct rtl8125_counters {
struct rtl8126_counters {
/* legacy */
u64 tx_packets;
u64 rx_packets;
@ -2196,32 +2230,32 @@ struct rtl8125_counters {
};
/* Flow Control Settings */
enum rtl8125_fc_mode {
rtl8125_fc_none = 0,
rtl8125_fc_rx_pause,
rtl8125_fc_tx_pause,
rtl8125_fc_full,
rtl8125_fc_default
enum rtl8126_fc_mode {
rtl8126_fc_none = 0,
rtl8126_fc_rx_pause,
rtl8126_fc_tx_pause,
rtl8126_fc_full,
rtl8126_fc_default
};
enum rtl8125_state_t {
__RTL8125_TESTING = 0,
__RTL8125_RESETTING,
__RTL8125_DOWN,
__RTL8125_PTP_TX_IN_PROGRESS,
enum rtl8126_state_t {
__RTL8126_TESTING = 0,
__RTL8126_RESETTING,
__RTL8126_DOWN,
__RTL8126_PTP_TX_IN_PROGRESS,
};
struct rtl8125_private {
struct rtl8126_private {
void __iomem *mmio_addr; /* memory map physical address */
struct pci_dev *pci_dev; /* Index of PCI device */
struct net_device *dev;
struct r8125_napi r8125napi[R8125_MAX_MSIX_VEC];
struct r8125_irq irq_tbl[R8125_MAX_MSIX_VEC];
struct r8126_napi r8126napi[R8126_MAX_MSIX_VEC];
struct r8126_irq irq_tbl[R8126_MAX_MSIX_VEC];
unsigned int irq_nvecs;
unsigned int max_irq_nvecs;
unsigned int min_irq_nvecs;
unsigned int hw_supp_irq_nvecs;
//struct msix_entry msix_entries[R8125_MAX_MSIX_VEC];
//struct msix_entry msix_entries[R8126_MAX_MSIX_VEC];
struct net_device_stats stats; /* statistics of net device */
unsigned long state;
@ -2253,33 +2287,33 @@ struct rtl8125_private {
u16 HwSuppNumRxQueues;
unsigned int num_tx_rings;
unsigned int num_rx_rings;
struct rtl8125_tx_ring tx_ring[R8125_MAX_TX_QUEUES];
struct rtl8125_rx_ring rx_ring[R8125_MAX_RX_QUEUES];
struct rtl8126_tx_ring tx_ring[R8126_MAX_TX_QUEUES];
struct rtl8126_rx_ring rx_ring[R8126_MAX_RX_QUEUES];
#ifdef ENABLE_LIB_SUPPORT
struct blocking_notifier_head lib_nh;
struct rtl8125_ring lib_tx_ring[R8125_MAX_TX_QUEUES];
struct rtl8125_ring lib_rx_ring[R8125_MAX_RX_QUEUES];
struct rtl8126_ring lib_tx_ring[R8126_MAX_TX_QUEUES];
struct rtl8126_ring lib_rx_ring[R8126_MAX_RX_QUEUES];
#endif
//struct timer_list esd_timer;
//struct timer_list link_timer;
struct pci_resource pci_cfg_space;
unsigned int esd_flag;
unsigned int pci_cfg_is_read;
unsigned int rtl8125_rx_config;
unsigned int rtl8126_rx_config;
u16 rms;
u16 cp_cmd;
u32 intr_mask;
u32 timer_intr_mask;
u16 isr_reg[R8125_MAX_QUEUES];
u16 imr_reg[R8125_MAX_QUEUES];
u16 isr_reg[R8126_MAX_QUEUES];
u16 imr_reg[R8126_MAX_QUEUES];
int phy_auto_nego_reg;
int phy_1000_ctrl_reg;
int phy_2500_ctrl_reg;
u8 org_mac_addr[NODE_ADDRESS_SIZE];
struct rtl8125_counters *tally_vaddr;
struct rtl8126_counters *tally_vaddr;
dma_addr_t tally_paddr;
#ifdef CONFIG_R8125_VLAN
#ifdef CONFIG_R8126_VLAN
struct vlan_group *vlgrp;
#endif
u8 wol_enabled;
@ -2290,7 +2324,7 @@ struct rtl8125_private {
u8 duplex;
u32 speed;
u64 advertising;
enum rtl8125_fc_mode fcpause;
enum rtl8126_fc_mode fcpause;
u32 HwSuppMaxPhyLinkSpeed;
u16 eeprom_len;
u16 cur_page;
@ -2314,7 +2348,7 @@ struct rtl8125_private {
struct delayed_work esd_task;
struct delayed_work linkchg_task;
#endif
DECLARE_BITMAP(task_flags, R8125_FLAG_MAX);
DECLARE_BITMAP(task_flags, R8126_FLAG_MAX);
unsigned features;
u8 org_pci_offset_99;
@ -2353,8 +2387,6 @@ struct rtl8125_private {
u8 RequirePhyMdiSwapPatch;
u8 RequireLSOPatch;
u32 HwFiberModeVer;
u32 HwFiberStat;
u8 HwSwitchMdiToFiber;
@ -2396,7 +2428,7 @@ struct rtl8125_private {
u8 ring_lib_enabled;
const char *fw_name;
struct rtl8125_fw *rtl_fw;
struct rtl8126_fw *rtl_fw;
u32 ocp_base;
//Dash+++++++++++++++++
@ -2404,6 +2436,7 @@ struct rtl8125_private {
u8 DASH;
u8 dash_printer_enabled;
u8 HwPkgDet;
u8 AllowAccessDashOcp;
void __iomem *mapped_cmac_ioaddr; /* mapped cmac memory map physical address */
void __iomem *cmac_ioaddr; /* cmac memory map physical address */
@ -2490,15 +2523,15 @@ struct rtl8125_private {
struct ethtool_eee eee;
#ifdef ENABLE_R8125_PROCFS
#ifdef ENABLE_R8126_PROCFS
//Procfs support
struct proc_dir_entry *proc_dir;
struct proc_dir_entry *proc_dir_debug;
struct proc_dir_entry *proc_dir_test;
#endif
#ifdef ENABLE_R8125_SYSFS
#ifdef ENABLE_R8126_SYSFS
//sysfs support
DECLARE_BITMAP(sysfs_flag, R8125_SYSFS_FLAG_MAX);
DECLARE_BITMAP(sysfs_flag, R8126_SYSFS_FLAG_MAX);
u32 testmode;
#endif
u8 InitRxDescType;
@ -2524,8 +2557,8 @@ struct rtl8125_private {
#ifdef ENABLE_RSS_SUPPORT
u32 rss_flags;
/* Receive Side Scaling settings */
u8 rss_key[RTL8125_RSS_KEY_SIZE];
u8 rss_indir_tbl[RTL8125_MAX_INDIRECTION_TABLE_ENTRIES];
u8 rss_key[RTL8126_RSS_KEY_SIZE];
u8 rss_indir_tbl[RTL8126_MAX_INDIRECTION_TABLE_ENTRIES];
u32 rss_options;
#endif
@ -2542,7 +2575,7 @@ struct rtl8125_private {
#ifdef ENABLE_LIB_SUPPORT
static inline unsigned int
rtl8125_num_lib_tx_rings(struct rtl8125_private *tp)
rtl8126_num_lib_tx_rings(struct rtl8126_private *tp)
{
int count, i;
@ -2554,7 +2587,7 @@ rtl8125_num_lib_tx_rings(struct rtl8125_private *tp)
}
static inline unsigned int
rtl8125_num_lib_rx_rings(struct rtl8125_private *tp)
rtl8126_num_lib_rx_rings(struct rtl8126_private *tp)
{
int count, i;
@ -2567,31 +2600,31 @@ rtl8125_num_lib_rx_rings(struct rtl8125_private *tp)
#else
static inline unsigned int
rtl8125_num_lib_tx_rings(struct rtl8125_private *tp)
rtl8126_num_lib_tx_rings(struct rtl8126_private *tp)
{
return 0;
}
static inline unsigned int
rtl8125_num_lib_rx_rings(struct rtl8125_private *tp)
rtl8126_num_lib_rx_rings(struct rtl8126_private *tp)
{
return 0;
}
#endif
static inline unsigned int
rtl8125_tot_tx_rings(struct rtl8125_private *tp)
rtl8126_tot_tx_rings(struct rtl8126_private *tp)
{
return tp->num_tx_rings + rtl8125_num_lib_tx_rings(tp);
return tp->num_tx_rings + rtl8126_num_lib_tx_rings(tp);
}
static inline unsigned int
rtl8125_tot_rx_rings(struct rtl8125_private *tp)
rtl8126_tot_rx_rings(struct rtl8126_private *tp)
{
return tp->num_rx_rings + rtl8125_num_lib_rx_rings(tp);
return tp->num_rx_rings + rtl8126_num_lib_rx_rings(tp);
}
static inline struct netdev_queue *txring_txq(const struct rtl8125_tx_ring *ring)
static inline struct netdev_queue *txring_txq(const struct rtl8126_tx_ring *ring)
{
return netdev_get_tx_queue(ring->netdev, ring->index);
}
@ -2604,15 +2637,9 @@ enum eetype {
};
enum mcfg {
CFG_METHOD_2=2,
CFG_METHOD_1=1,
CFG_METHOD_2,
CFG_METHOD_3,
CFG_METHOD_4,
CFG_METHOD_5,
CFG_METHOD_6,
CFG_METHOD_7,
CFG_METHOD_8,
CFG_METHOD_9,
CFG_METHOD_10,
CFG_METHOD_DEFAULT,
CFG_METHOD_MAX
};
@ -2643,13 +2670,9 @@ enum mcfg {
#define WAKEUP_MAGIC_PACKET_V3 (3)
//Ram Code Version
#define NIC_RAMCODE_VERSION_CFG_METHOD_2 (0x0b11)
#define NIC_RAMCODE_VERSION_CFG_METHOD_3 (0x0b33)
#define NIC_RAMCODE_VERSION_CFG_METHOD_4 (0x0b17)
#define NIC_RAMCODE_VERSION_CFG_METHOD_5 (0x0b74)
#define NIC_RAMCODE_VERSION_CFG_METHOD_8 (0x0023)
#define NIC_RAMCODE_VERSION_CFG_METHOD_9 (0x0033)
#define NIC_RAMCODE_VERSION_CFG_METHOD_10 (0x0001)
#define NIC_RAMCODE_VERSION_CFG_METHOD_1 (0x0023)
#define NIC_RAMCODE_VERSION_CFG_METHOD_2 (0x0033)
#define NIC_RAMCODE_VERSION_CFG_METHOD_3 (0x0048)
//hwoptimize
#define HW_PATCH_SOC_LAN (BIT_0)
@ -2657,93 +2680,93 @@ enum mcfg {
static const u16 other_q_intr_mask = (RxOK1 | RxDU1);
void rtl8125_mdio_write(struct rtl8125_private *tp, u16 RegAddr, u16 value);
void rtl8125_mdio_prot_write(struct rtl8125_private *tp, u32 RegAddr, u32 value);
void rtl8125_mdio_prot_direct_write_phy_ocp(struct rtl8125_private *tp, u32 RegAddr, u32 value);
u32 rtl8125_mdio_read(struct rtl8125_private *tp, u16 RegAddr);
u32 rtl8125_mdio_prot_read(struct rtl8125_private *tp, u32 RegAddr);
u32 rtl8125_mdio_prot_direct_read_phy_ocp(struct rtl8125_private *tp, u32 RegAddr);
void rtl8125_ephy_write(struct rtl8125_private *tp, int RegAddr, int value);
void rtl8125_mac_ocp_write(struct rtl8125_private *tp, u16 reg_addr, u16 value);
u16 rtl8125_mac_ocp_read(struct rtl8125_private *tp, u16 reg_addr);
void rtl8125_clear_eth_phy_bit(struct rtl8125_private *tp, u8 addr, u16 mask);
void rtl8125_set_eth_phy_bit(struct rtl8125_private *tp, u8 addr, u16 mask);
void rtl8125_ocp_write(struct rtl8125_private *tp, u16 addr, u8 len, u32 data);
void rtl8125_oob_notify(struct rtl8125_private *tp, u8 cmd);
void rtl8125_init_ring_indexes(struct rtl8125_private *tp);
void rtl8125_oob_mutex_lock(struct rtl8125_private *tp);
u32 rtl8125_ocp_read(struct rtl8125_private *tp, u16 addr, u8 len);
u32 rtl8125_ocp_read_with_oob_base_address(struct rtl8125_private *tp, u16 addr, u8 len, u32 base_address);
u32 rtl8125_ocp_write_with_oob_base_address(struct rtl8125_private *tp, u16 addr, u8 len, u32 value, u32 base_address);
u32 rtl8125_eri_read(struct rtl8125_private *tp, int addr, int len, int type);
u32 rtl8125_eri_read_with_oob_base_address(struct rtl8125_private *tp, int addr, int len, int type, u32 base_address);
int rtl8125_eri_write(struct rtl8125_private *tp, int addr, int len, u32 value, int type);
int rtl8125_eri_write_with_oob_base_address(struct rtl8125_private *tp, int addr, int len, u32 value, int type, u32 base_address);
u16 rtl8125_ephy_read(struct rtl8125_private *tp, int RegAddr);
void rtl8125_wait_txrx_fifo_empty(struct net_device *dev);
void rtl8125_enable_now_is_oob(struct rtl8125_private *tp);
void rtl8125_disable_now_is_oob(struct rtl8125_private *tp);
void rtl8125_oob_mutex_unlock(struct rtl8125_private *tp);
void rtl8125_dash2_disable_tx(struct rtl8125_private *tp);
void rtl8125_dash2_enable_tx(struct rtl8125_private *tp);
void rtl8125_dash2_disable_rx(struct rtl8125_private *tp);
void rtl8125_dash2_enable_rx(struct rtl8125_private *tp);
void rtl8125_hw_disable_mac_mcu_bps(struct net_device *dev);
void rtl8125_mark_to_asic(struct rtl8125_private *tp, struct RxDesc *desc, u32 rx_buf_sz);
void rtl8126_mdio_write(struct rtl8126_private *tp, u16 RegAddr, u16 value);
void rtl8126_mdio_prot_write(struct rtl8126_private *tp, u32 RegAddr, u32 value);
void rtl8126_mdio_prot_direct_write_phy_ocp(struct rtl8126_private *tp, u32 RegAddr, u32 value);
u32 rtl8126_mdio_read(struct rtl8126_private *tp, u16 RegAddr);
u32 rtl8126_mdio_prot_read(struct rtl8126_private *tp, u32 RegAddr);
u32 rtl8126_mdio_prot_direct_read_phy_ocp(struct rtl8126_private *tp, u32 RegAddr);
void rtl8126_ephy_write(struct rtl8126_private *tp, int RegAddr, int value);
void rtl8126_mac_ocp_write(struct rtl8126_private *tp, u16 reg_addr, u16 value);
u16 rtl8126_mac_ocp_read(struct rtl8126_private *tp, u16 reg_addr);
void rtl8126_clear_eth_phy_bit(struct rtl8126_private *tp, u8 addr, u16 mask);
void rtl8126_set_eth_phy_bit(struct rtl8126_private *tp, u8 addr, u16 mask);
void rtl8126_ocp_write(struct rtl8126_private *tp, u16 addr, u8 len, u32 data);
void rtl8126_oob_notify(struct rtl8126_private *tp, u8 cmd);
void rtl8126_init_ring_indexes(struct rtl8126_private *tp);
void rtl8126_oob_mutex_lock(struct rtl8126_private *tp);
u32 rtl8126_ocp_read(struct rtl8126_private *tp, u16 addr, u8 len);
u32 rtl8126_ocp_read_with_oob_base_address(struct rtl8126_private *tp, u16 addr, u8 len, u32 base_address);
u32 rtl8126_ocp_write_with_oob_base_address(struct rtl8126_private *tp, u16 addr, u8 len, u32 value, u32 base_address);
u32 rtl8126_eri_read(struct rtl8126_private *tp, int addr, int len, int type);
u32 rtl8126_eri_read_with_oob_base_address(struct rtl8126_private *tp, int addr, int len, int type, u32 base_address);
int rtl8126_eri_write(struct rtl8126_private *tp, int addr, int len, u32 value, int type);
int rtl8126_eri_write_with_oob_base_address(struct rtl8126_private *tp, int addr, int len, u32 value, int type, u32 base_address);
u16 rtl8126_ephy_read(struct rtl8126_private *tp, int RegAddr);
void rtl8126_wait_txrx_fifo_empty(struct net_device *dev);
void rtl8126_enable_now_is_oob(struct rtl8126_private *tp);
void rtl8126_disable_now_is_oob(struct rtl8126_private *tp);
void rtl8126_oob_mutex_unlock(struct rtl8126_private *tp);
void rtl8126_dash2_disable_tx(struct rtl8126_private *tp);
void rtl8126_dash2_enable_tx(struct rtl8126_private *tp);
void rtl8126_dash2_disable_rx(struct rtl8126_private *tp);
void rtl8126_dash2_enable_rx(struct rtl8126_private *tp);
void rtl8126_hw_disable_mac_mcu_bps(struct net_device *dev);
void rtl8126_mark_to_asic(struct rtl8126_private *tp, struct RxDesc *desc, u32 rx_buf_sz);
static inline void
rtl8125_make_unusable_by_asic(struct rtl8125_private *tp,
rtl8126_make_unusable_by_asic(struct rtl8126_private *tp,
struct RxDesc *desc)
{
if (tp->InitRxDescType == RX_DESC_RING_TYPE_3) {
((struct RxDescV3 *)desc)->addr = RTL8125_MAGIC_NUMBER;
((struct RxDescV3 *)desc)->addr = RTL8126_MAGIC_NUMBER;
((struct RxDescV3 *)desc)->RxDescNormalDDWord4.opts1 &= ~cpu_to_le32(DescOwn | RsvdMaskV3);
} else {
desc->addr = RTL8125_MAGIC_NUMBER;
desc->addr = RTL8126_MAGIC_NUMBER;
desc->opts1 &= ~cpu_to_le32(DescOwn | RsvdMask);
}
}
static inline struct RxDesc*
rtl8125_get_rxdesc(struct rtl8125_private *tp, struct RxDesc *RxDescBase, u32 const cur_rx)
rtl8126_get_rxdesc(struct rtl8126_private *tp, struct RxDesc *RxDescBase, u32 const cur_rx)
{
return (struct RxDesc*)((u8*)RxDescBase + (cur_rx * tp->RxDescLength));
}
static inline void
rtl8125_disable_hw_interrupt_v2(struct rtl8125_private *tp,
rtl8126_disable_hw_interrupt_v2(struct rtl8126_private *tp,
u32 message_id)
{
RTL_W32(tp, IMR_V2_CLEAR_REG_8125, BIT(message_id));
}
static inline void
rtl8125_enable_hw_interrupt_v2(struct rtl8125_private *tp, u32 message_id)
rtl8126_enable_hw_interrupt_v2(struct rtl8126_private *tp, u32 message_id)
{
RTL_W32(tp, IMR_V2_SET_REG_8125, BIT(message_id));
}
int rtl8125_open(struct net_device *dev);
int rtl8125_close(struct net_device *dev);
void rtl8125_hw_config(struct net_device *dev);
void rtl8125_hw_set_timer_int_8125(struct rtl8125_private *tp, u32 message_id, u8 timer_intmiti_val);
void rtl8125_set_rx_q_num(struct rtl8125_private *tp, unsigned int num_rx_queues);
void rtl8125_set_tx_q_num(struct rtl8125_private *tp, unsigned int num_tx_queues);
void rtl8125_enable_mcu(struct rtl8125_private *tp, bool enable);
void rtl8125_hw_start(struct net_device *dev);
void rtl8125_hw_reset(struct net_device *dev);
void rtl8125_tx_clear(struct rtl8125_private *tp);
void rtl8125_rx_clear(struct rtl8125_private *tp);
int rtl8125_init_ring(struct net_device *dev);
void rtl8125_hw_set_rx_packet_filter(struct net_device *dev);
void rtl8125_enable_hw_linkchg_interrupt(struct rtl8125_private *tp);
int rtl8125_dump_tally_counter(struct rtl8125_private *tp, dma_addr_t paddr);
void rtl8125_enable_napi(struct rtl8125_private *tp);
void _rtl8125_wait_for_quiescence(struct net_device *dev);
int rtl8126_open(struct net_device *dev);
int rtl8126_close(struct net_device *dev);
void rtl8126_hw_config(struct net_device *dev);
void rtl8126_hw_set_timer_int_8125(struct rtl8126_private *tp, u32 message_id, u8 timer_intmiti_val);
void rtl8126_set_rx_q_num(struct rtl8126_private *tp, unsigned int num_rx_queues);
void rtl8126_set_tx_q_num(struct rtl8126_private *tp, unsigned int num_tx_queues);
void rtl8126_enable_mcu(struct rtl8126_private *tp, bool enable);
void rtl8126_hw_start(struct net_device *dev);
void rtl8126_hw_reset(struct net_device *dev);
void rtl8126_tx_clear(struct rtl8126_private *tp);
void rtl8126_rx_clear(struct rtl8126_private *tp);
int rtl8126_init_ring(struct net_device *dev);
void rtl8126_hw_set_rx_packet_filter(struct net_device *dev);
void rtl8126_enable_hw_linkchg_interrupt(struct rtl8126_private *tp);
int rtl8126_dump_tally_counter(struct rtl8126_private *tp, dma_addr_t paddr);
void rtl8126_enable_napi(struct rtl8126_private *tp);
void _rtl8126_wait_for_quiescence(struct net_device *dev);
#ifndef ENABLE_LIB_SUPPORT
static inline void rtl8125_lib_reset_prepare(struct rtl8125_private *tp) { }
static inline void rtl8125_lib_reset_complete(struct rtl8125_private *tp) { }
static inline void rtl8126_lib_reset_prepare(struct rtl8126_private *tp) { }
static inline void rtl8126_lib_reset_complete(struct rtl8126_private *tp) { }
#endif
#define HW_SUPPORT_CHECK_PHY_DISABLE_MODE(_M) ((_M)->HwSuppCheckPhyDisableModeVer > 0 )
@ -2763,4 +2786,4 @@ static inline void rtl8125_lib_reset_complete(struct rtl8125_private *tp) { }
for (mclist = dev->mc_list; mclist; mclist = mclist->next)
#endif
#endif /* __R8125_H */
#endif /* __R8126_H */

12
r8125_dash.h → r8126_dash.h
View File

@ -2,10 +2,10 @@
/*
################################################################################
#
# r8125 is the Linux device driver released for Realtek 2.5/5 Gigabit Ethernet
# r8126 is the Linux device driver released for Realtek 5 Gigabit Ethernet
# controllers with PCI-Express interface.
#
# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
# Copyright(c) 2024 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free
@ -32,8 +32,8 @@
* US6,570,884, US6,115,776, and US6,327,625.
***********************************************************************************/
#ifndef _LINUX_R8125_DASH_H
#define _LINUX_R8125_DASH_H
#ifndef _LINUX_R8126_DASH_H
#define _LINUX_R8126_DASH_H
#include <linux/if.h>
@ -251,11 +251,11 @@ RX_DASH_BUFFER_TYPE_2, *PRX_DASH_BUFFER_TYPE_2;
#define RTL_CMAC_R16(tp, reg) readw (tp->cmac_ioaddr + (reg))
#define RTL_CMAC_R32(tp, reg) ((unsigned long) readl (tp->cmac_ioaddr + (reg)))
int rtl8125_dash_ioctl(struct net_device *dev, struct ifreq *ifr);
int rtl8126_dash_ioctl(struct net_device *dev, struct ifreq *ifr);
void HandleDashInterrupt(struct net_device *dev);
int AllocateDashShareMemory(struct net_device *dev);
void FreeAllocatedDashShareMemory(struct net_device *dev);
void DashHwInit(struct net_device *dev);
#endif /* _LINUX_R8125_DASH_H */
#endif /* _LINUX_R8126_DASH_H */

36
r8125_firmware.c → r8126_firmware.c
View File

@ -2,10 +2,10 @@
/*
################################################################################
#
# r8125 is the Linux device driver released for Realtek 2.5/5 Gigabit Ethernet
# r8126 is the Linux device driver released for Realtek 5 Gigabit Ethernet
# controllers with PCI-Express interface.
#
# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
# Copyright(c) 2024 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free
@ -36,7 +36,7 @@
#include <linux/delay.h>
#include <linux/firmware.h>
#include "r8125_firmware.h"
#include "r8126_firmware.h"
enum rtl_fw_opcode {
PHY_READ = 0x0,
@ -56,7 +56,7 @@ enum rtl_fw_opcode {
struct fw_info {
u32 magic;
char version[RTL8125_VER_SIZE];
char version[RTL8126_VER_SIZE];
__le32 fw_start;
__le32 fw_len;
u8 chksum;
@ -65,13 +65,13 @@ struct fw_info {
#if LINUX_VERSION_CODE < KERNEL_VERSION(4,16,0)
#define sizeof_field(TYPE, MEMBER) sizeof((((TYPE *)0)->MEMBER))
#endif
#define FW_OPCODE_SIZE sizeof_field(struct rtl8125_fw_phy_action, code[0])
#define FW_OPCODE_SIZE sizeof_field(struct rtl8126_fw_phy_action, code[0])
static bool rtl8125_fw_format_ok(struct rtl8125_fw *rtl_fw)
static bool rtl8126_fw_format_ok(struct rtl8126_fw *rtl_fw)
{
const struct firmware *fw = rtl_fw->fw;
struct fw_info *fw_info = (struct fw_info *)fw->data;
struct rtl8125_fw_phy_action *pa = &rtl_fw->phy_action;
struct rtl8126_fw_phy_action *pa = &rtl_fw->phy_action;
if (fw->size < FW_OPCODE_SIZE)
return false;
@ -96,7 +96,7 @@ static bool rtl8125_fw_format_ok(struct rtl8125_fw *rtl_fw)
if (size > (fw->size - start) / FW_OPCODE_SIZE)
return false;
strscpy(rtl_fw->version, fw_info->version, RTL8125_VER_SIZE);
strscpy(rtl_fw->version, fw_info->version, RTL8126_VER_SIZE);
pa->code = (__le32 *)(fw->data + start);
pa->size = size;
@ -104,7 +104,7 @@ static bool rtl8125_fw_format_ok(struct rtl8125_fw *rtl_fw)
if (fw->size % FW_OPCODE_SIZE)
return false;
strscpy(rtl_fw->version, rtl_fw->fw_name, RTL8125_VER_SIZE);
strscpy(rtl_fw->version, rtl_fw->fw_name, RTL8126_VER_SIZE);
pa->code = (__le32 *)fw->data;
pa->size = fw->size / FW_OPCODE_SIZE;
@ -113,9 +113,9 @@ static bool rtl8125_fw_format_ok(struct rtl8125_fw *rtl_fw)
return true;
}
static bool rtl8125_fw_data_ok(struct rtl8125_fw *rtl_fw)
static bool rtl8126_fw_data_ok(struct rtl8126_fw *rtl_fw)
{
struct rtl8125_fw_phy_action *pa = &rtl_fw->phy_action;
struct rtl8126_fw_phy_action *pa = &rtl_fw->phy_action;
size_t index;
for (index = 0; index < pa->size; index++) {
@ -165,11 +165,11 @@ out:
return false;
}
void rtl8125_fw_write_firmware(struct rtl8125_private *tp, struct rtl8125_fw *rtl_fw)
void rtl8126_fw_write_firmware(struct rtl8126_private *tp, struct rtl8126_fw *rtl_fw)
{
struct rtl8125_fw_phy_action *pa = &rtl_fw->phy_action;
rtl8125_fw_write_t fw_write = rtl_fw->phy_write;
rtl8125_fw_read_t fw_read = rtl_fw->phy_read;
struct rtl8126_fw_phy_action *pa = &rtl_fw->phy_action;
rtl8126_fw_write_t fw_write = rtl_fw->phy_write;
rtl8126_fw_read_t fw_read = rtl_fw->phy_read;
int predata = 0, count = 0;
size_t index;
@ -237,12 +237,12 @@ void rtl8125_fw_write_firmware(struct rtl8125_private *tp, struct rtl8125_fw *rt
}
}
void rtl8125_fw_release_firmware(struct rtl8125_fw *rtl_fw)
void rtl8126_fw_release_firmware(struct rtl8126_fw *rtl_fw)
{
release_firmware(rtl_fw->fw);
}
int rtl8125_fw_request_firmware(struct rtl8125_fw *rtl_fw)
int rtl8126_fw_request_firmware(struct rtl8126_fw *rtl_fw)
{
int rc;
@ -250,7 +250,7 @@ int rtl8125_fw_request_firmware(struct rtl8125_fw *rtl_fw)
if (rc < 0)
goto out;
if (!rtl8125_fw_format_ok(rtl_fw) || !rtl8125_fw_data_ok(rtl_fw)) {
if (!rtl8126_fw_format_ok(rtl_fw) || !rtl8126_fw_data_ok(rtl_fw)) {
release_firmware(rtl_fw->fw);
rc = -EINVAL;
goto out;

38
r8125_firmware.h → r8126_firmware.h
View File

@ -2,10 +2,10 @@
/*
################################################################################
#
# r8125 is the Linux device driver released for Realtek 2.5/5 Gigabit Ethernet
# r8126 is the Linux device driver released for Realtek 5 Gigabit Ethernet
# controllers with PCI-Express interface.
#
# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
# Copyright(c) 2024 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free
@ -32,37 +32,37 @@
* US6,570,884, US6,115,776, and US6,327,625.
***********************************************************************************/
#ifndef _LINUX_rtl8125_FIRMWARE_H
#define _LINUX_rtl8125_FIRMWARE_H
#ifndef _LINUX_R8126_FIRMWARE_H
#define _LINUX_R8126_FIRMWARE_H
#include <linux/device.h>
#include <linux/firmware.h>
struct rtl8125_private;
typedef void (*rtl8125_fw_write_t)(struct rtl8125_private *tp, u16 reg, u16 val);
typedef u32 (*rtl8125_fw_read_t)(struct rtl8125_private *tp, u16 reg);
struct rtl8126_private;
typedef void (*rtl8126_fw_write_t)(struct rtl8126_private *tp, u16 reg, u16 val);
typedef u32 (*rtl8126_fw_read_t)(struct rtl8126_private *tp, u16 reg);
#define RTL8125_VER_SIZE 32
#define RTL8126_VER_SIZE 32
struct rtl8125_fw {
rtl8125_fw_write_t phy_write;
rtl8125_fw_read_t phy_read;
rtl8125_fw_write_t mac_mcu_write;
rtl8125_fw_read_t mac_mcu_read;
struct rtl8126_fw {
rtl8126_fw_write_t phy_write;
rtl8126_fw_read_t phy_read;
rtl8126_fw_write_t mac_mcu_write;
rtl8126_fw_read_t mac_mcu_read;
const struct firmware *fw;
const char *fw_name;
struct device *dev;
char version[RTL8125_VER_SIZE];
char version[RTL8126_VER_SIZE];
struct rtl8125_fw_phy_action {
struct rtl8126_fw_phy_action {
__le32 *code;
size_t size;
} phy_action;
};
int rtl8125_fw_request_firmware(struct rtl8125_fw *rtl_fw);
void rtl8125_fw_release_firmware(struct rtl8125_fw *rtl_fw);
void rtl8125_fw_write_firmware(struct rtl8125_private *tp, struct rtl8125_fw *rtl_fw);
int rtl8126_fw_request_firmware(struct rtl8126_fw *rtl_fw);
void rtl8126_fw_release_firmware(struct rtl8126_fw *rtl_fw);
void rtl8126_fw_write_firmware(struct rtl8126_private *tp, struct rtl8126_fw *rtl_fw);
#endif /* _LINUX_rtl8125_FIRMWARE_H */
#endif /* _LINUX_R8126_FIRMWARE_H */

11127
r8125_n.c → r8126_n.c
View File

File diff suppressed because it is too large Load Diff

138
r8125_ptp.c → r8126_ptp.c
View File

@ -2,10 +2,10 @@
/*
################################################################################
#
# r8125 is the Linux device driver released for Realtek 2.5/5 Gigabit Ethernet
# r8126 is the Linux device driver released for Realtek 5 Gigabit Ethernet
# controllers with PCI-Express interface.
#
# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
# Copyright(c) 2024 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free
@ -42,8 +42,8 @@
#include <linux/ethtool.h>
#include <linux/rtnetlink.h>
#include "r8125.h"
#include "r8125_ptp.h"
#include "r8126.h"
#include "r8126_ptp.h"
#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,6,0)
static inline struct timespec timespec64_to_timespec(const struct timespec64 ts64)
@ -57,7 +57,7 @@ static inline struct timespec64 timespec_to_timespec64(const struct timespec ts)
}
#endif
static int _rtl8125_phc_gettime(struct rtl8125_private *tp, struct timespec64 *ts64)
static int _rtl8126_phc_gettime(struct rtl8126_private *tp, struct timespec64 *ts64)
{
//get local time
RTL_W16(tp, PTP_TIME_CORRECT_CMD_8125, (PTP_CMD_LATCHED_LOCAL_TIME | PTP_EXEC_CMD));
@ -75,7 +75,7 @@ static int _rtl8125_phc_gettime(struct rtl8125_private *tp, struct timespec64 *t
return 0;
}
static int _rtl8125_phc_settime(struct rtl8125_private *tp, const struct timespec64 *ts64)
static int _rtl8126_phc_settime(struct rtl8126_private *tp, const struct timespec64 *ts64)
{
/* nanoseconds */
//0x6808[29:0]
@ -92,7 +92,7 @@ static int _rtl8125_phc_settime(struct rtl8125_private *tp, const struct timespe
return 0;
}
static int _rtl8125_phc_adjtime(struct rtl8125_private *tp, s64 delta)
static int _rtl8126_phc_adjtime(struct rtl8126_private *tp, s64 delta)
{
struct timespec64 d;
bool negative = false;
@ -141,15 +141,15 @@ static int _rtl8125_phc_adjtime(struct rtl8125_private *tp, s64 delta)
return 0;
}
static int rtl8125_phc_adjtime(struct ptp_clock_info *ptp, s64 delta)
static int rtl8126_phc_adjtime(struct ptp_clock_info *ptp, s64 delta)
{
struct rtl8125_private *tp = container_of(ptp, struct rtl8125_private, ptp_clock_info);
struct rtl8126_private *tp = container_of(ptp, struct rtl8126_private, ptp_clock_info);
int ret;
//netif_info(tp, drv, tp->dev, "phc adjust time\n");
rtnl_lock();
ret = _rtl8125_phc_adjtime(tp, delta);
ret = _rtl8126_phc_adjtime(tp, delta);
rtnl_unlock();
return ret;
@ -169,9 +169,9 @@ static int rtl8125_phc_adjtime(struct ptp_clock_info *ptp, s64 delta)
8ns*10^(-9) = 8 * 2^30 sub_ns * 10^(-9) = 2^33 sub_ns * 10^(-9) = 8.59 sub_ns = 9 sub_ns
*/
static int _rtl8125_phc_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
static int _rtl8126_phc_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
{
struct rtl8125_private *tp = container_of(ptp, struct rtl8125_private, ptp_clock_info);
struct rtl8126_private *tp = container_of(ptp, struct rtl8126_private, ptp_clock_info);
bool negative = false;
u32 sub_ns;
@ -199,54 +199,54 @@ static int _rtl8125_phc_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
return 0;
}
static int rtl8125_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta)
static int rtl8126_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta)
{
//struct rtl8125_private *tp = container_of(ptp, struct rtl8125_private, ptp_clock_info);
//struct rtl8126_private *tp = container_of(ptp, struct rtl8126_private, ptp_clock_info);
//netif_info(tp, drv, tp->dev, "phc adjust freq\n");
if (delta > ptp->max_adj || delta < -ptp->max_adj)
return -EINVAL;
_rtl8125_phc_adjfreq(ptp, delta);
_rtl8126_phc_adjfreq(ptp, delta);
return 0;
}
#endif //LINUX_VERSION_CODE < KERNEL_VERSION(6,2,0)
static int rtl8125_phc_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts64)
static int rtl8126_phc_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts64)
{
struct rtl8125_private *tp = container_of(ptp, struct rtl8125_private, ptp_clock_info);
struct rtl8126_private *tp = container_of(ptp, struct rtl8126_private, ptp_clock_info);
int ret;
//netif_info(tp, drv, tp->dev, "phc get ts\n");
rtnl_lock();
ret = _rtl8125_phc_gettime(tp, ts64);
ret = _rtl8126_phc_gettime(tp, ts64);
rtnl_unlock();
return ret;
}
static int rtl8125_phc_settime(struct ptp_clock_info *ptp,
static int rtl8126_phc_settime(struct ptp_clock_info *ptp,
const struct timespec64 *ts64)
{
struct rtl8125_private *tp = container_of(ptp, struct rtl8125_private, ptp_clock_info);
struct rtl8126_private *tp = container_of(ptp, struct rtl8126_private, ptp_clock_info);
int ret;
//netif_info(tp, drv, tp->dev, "phc set ts\n");
rtnl_lock();
ret = _rtl8125_phc_settime(tp, ts64);
ret = _rtl8126_phc_settime(tp, ts64);
rtnl_unlock();
return ret;
}
static int rtl8125_phc_enable(struct ptp_clock_info *ptp,
static int rtl8126_phc_enable(struct ptp_clock_info *ptp,
struct ptp_clock_request *rq, int on)
{
struct rtl8125_private *tp = container_of(ptp, struct rtl8125_private, ptp_clock_info);
struct rtl8126_private *tp = container_of(ptp, struct rtl8126_private, ptp_clock_info);
u16 ptp_ctrl;
//netif_info(tp, drv, tp->dev, "phc enable type %x on %d\n", rq->type, on);
@ -268,10 +268,10 @@ static int rtl8125_phc_enable(struct ptp_clock_info *ptp,
}
}
int rtl8125_get_ts_info(struct net_device *netdev,
int rtl8126_get_ts_info(struct net_device *netdev,
struct ethtool_ts_info *info)
{
struct rtl8125_private *tp = netdev_priv(netdev);
struct rtl8126_private *tp = netdev_priv(netdev);
/* we always support timestamping disabled */
info->rx_filters = BIT(HWTSTAMP_FILTER_NONE);
@ -312,36 +312,36 @@ static const struct ptp_clock_info rtl_ptp_clock_info = {
.n_pins = 0,
.pps = 1,
#if LINUX_VERSION_CODE < KERNEL_VERSION(6,2,0)
.adjfreq = rtl8125_phc_adjfreq,
.adjfreq = rtl8126_phc_adjfreq,
#endif //LINUX_VERSION_CODE < KERNEL_VERSION(6,2,0)
.adjtime = rtl8125_phc_adjtime,
.gettime64 = rtl8125_phc_gettime,
.settime64 = rtl8125_phc_settime,
.enable = rtl8125_phc_enable,
.adjtime = rtl8126_phc_adjtime,
.gettime64 = rtl8126_phc_gettime,
.settime64 = rtl8126_phc_settime,
.enable = rtl8126_phc_enable,
};
static int rtl8125_ptp_egresstime(struct rtl8125_private *tp, struct timespec64 *ts64, u32 regnum)
static int rtl8126_ptp_egresstime(struct rtl8126_private *tp, struct timespec64 *ts64, u32 regnum)
{
/* nanoseconds */
//[29:0]
ts64->tv_nsec = rtl8125_mac_ocp_read(tp, PTP_EGRESS_TIME_BASE_NS_8125 + regnum * 16 + 2);
ts64->tv_nsec = rtl8126_mac_ocp_read(tp, PTP_EGRESS_TIME_BASE_NS_8125 + regnum * 16 + 2);
ts64->tv_nsec <<= 16;
ts64->tv_nsec |= rtl8125_mac_ocp_read(tp, PTP_EGRESS_TIME_BASE_NS_8125 + regnum * 16);
ts64->tv_nsec |= rtl8126_mac_ocp_read(tp, PTP_EGRESS_TIME_BASE_NS_8125 + regnum * 16);
ts64->tv_nsec &= 0x3fffffff;
/* seconds */
//[47:0]
ts64->tv_sec = rtl8125_mac_ocp_read(tp, PTP_EGRESS_TIME_BASE_S_8125 + regnum * 16 + 4);
ts64->tv_sec = rtl8126_mac_ocp_read(tp, PTP_EGRESS_TIME_BASE_S_8125 + regnum * 16 + 4);
ts64->tv_sec <<= 16;
ts64->tv_sec |= rtl8125_mac_ocp_read(tp, PTP_EGRESS_TIME_BASE_S_8125 + regnum * 16 + 2);
ts64->tv_sec |= rtl8126_mac_ocp_read(tp, PTP_EGRESS_TIME_BASE_S_8125 + regnum * 16 + 2);
ts64->tv_sec <<= 16;
ts64->tv_sec |= rtl8125_mac_ocp_read(tp, PTP_EGRESS_TIME_BASE_S_8125 + regnum * 16);
ts64->tv_sec |= rtl8126_mac_ocp_read(tp, PTP_EGRESS_TIME_BASE_S_8125 + regnum * 16);
ts64->tv_sec &= 0x0000ffffffffffff;
return 0;
}
static void rtl8125_ptp_tx_hwtstamp(struct rtl8125_private *tp)
static void rtl8126_ptp_tx_hwtstamp(struct rtl8126_private *tp)
{
struct sk_buff *skb = tp->ptp_tx_skb;
struct skb_shared_hwtstamps shhwtstamps = {0};
@ -356,7 +356,7 @@ static void rtl8125_ptp_tx_hwtstamp(struct rtl8125_private *tp)
regnum = (regnum + 3) % 4;
rtnl_lock();
rtl8125_ptp_egresstime(tp, &ts64, regnum);
rtl8126_ptp_egresstime(tp, &ts64, regnum);
rtnl_unlock();
/* Upper 32 bits contain s, lower 32 bits contain ns. */
@ -369,27 +369,27 @@ static void rtl8125_ptp_tx_hwtstamp(struct rtl8125_private *tp)
* while we're notifying the stack.
*/
tp->ptp_tx_skb = NULL;
clear_bit_unlock(__RTL8125_PTP_TX_IN_PROGRESS, &tp->state);
clear_bit_unlock(__RTL8126_PTP_TX_IN_PROGRESS, &tp->state);
/* Notify the stack and free the skb after we've unlocked */
skb_tstamp_tx(skb, &shhwtstamps);
dev_kfree_skb_any(skb);
}
#define RTL8125_PTP_TX_TIMEOUT (HZ * 15)
static void rtl8125_ptp_tx_work(struct work_struct *work)
#define RTL8126_PTP_TX_TIMEOUT (HZ * 15)
static void rtl8126_ptp_tx_work(struct work_struct *work)
{
struct rtl8125_private *tp = container_of(work, struct rtl8125_private,
struct rtl8126_private *tp = container_of(work, struct rtl8126_private,
ptp_tx_work);
if (!tp->ptp_tx_skb)
return;
if (time_is_before_jiffies(tp->ptp_tx_start +
RTL8125_PTP_TX_TIMEOUT)) {
RTL8126_PTP_TX_TIMEOUT)) {
dev_kfree_skb_any(tp->ptp_tx_skb);
tp->ptp_tx_skb = NULL;
clear_bit_unlock(__RTL8125_PTP_TX_IN_PROGRESS, &tp->state);
clear_bit_unlock(__RTL8126_PTP_TX_IN_PROGRESS, &tp->state);
tp->tx_hwtstamp_timeouts++;
/* Clear the tx valid bit in TSYNCTXCTL register to enable
* interrupt
@ -399,14 +399,14 @@ static void rtl8125_ptp_tx_work(struct work_struct *work)
}
if (RTL_R8(tp, PTP_ISR_8125) & (PTP_ISR_TOK))
rtl8125_ptp_tx_hwtstamp(tp);
rtl8126_ptp_tx_hwtstamp(tp);
else
/* reschedule to check later */
schedule_work(&tp->ptp_tx_work);
}
static int rtl8125_hwtstamp_enable(struct rtl8125_private *tp, bool enable)
static int rtl8126_hwtstamp_enable(struct rtl8126_private *tp, bool enable)
{
RTL_W16(tp, PTP_CTRL_8125, 0);
if (enable) {
@ -416,7 +416,7 @@ static int rtl8125_hwtstamp_enable(struct rtl8125_private *tp, bool enable)
//clear ptp isr
RTL_W8(tp, PTP_ISR_8125, 0xff);
//ptp source 0:gphy 1:mac
rtl8125_mac_ocp_write(tp, 0xDC00, rtl8125_mac_ocp_read(tp, 0xDC00) | BIT_6);
rtl8126_mac_ocp_write(tp, 0xDC00, rtl8126_mac_ocp_read(tp, 0xDC00) | BIT_6);
//enable ptp
ptp_ctrl = (BIT_0 | BIT_3 | BIT_4 | BIT_6 | BIT_10 | BIT_12);
if (tp->ptp_master_mode)
@ -426,16 +426,16 @@ static int rtl8125_hwtstamp_enable(struct rtl8125_private *tp, bool enable)
//set system time
/*
if (ktime_to_timespec64_cond(ktime_get_real(), &ts64))
_rtl8125_phc_settime(tp, timespec64_to_timespec(ts64));
_rtl8126_phc_settime(tp, timespec64_to_timespec(ts64));
*/
ktime_get_real_ts64(&ts64);
_rtl8125_phc_settime(tp, &ts64);
_rtl8126_phc_settime(tp, &ts64);
}
return 0;
}
static long rtl8125_ptp_create_clock(struct rtl8125_private *tp)
static long rtl8126_ptp_create_clock(struct rtl8126_private *tp)
{
struct net_device *netdev = tp->dev;
long err;
@ -464,52 +464,52 @@ static long rtl8125_ptp_create_clock(struct rtl8125_private *tp)
return 0;
}
void rtl8125_ptp_reset(struct rtl8125_private *tp)
void rtl8126_ptp_reset(struct rtl8126_private *tp)
{
if (!tp->ptp_clock)
return;
netif_info(tp, drv, tp->dev, "reset PHC clock\n");
rtl8125_hwtstamp_enable(tp, false);
rtl8126_hwtstamp_enable(tp, false);
}
void rtl8125_ptp_init(struct rtl8125_private *tp)
void rtl8126_ptp_init(struct rtl8126_private *tp)
{
/* obtain a PTP device, or re-use an existing device */
if (rtl8125_ptp_create_clock(tp))
if (rtl8126_ptp_create_clock(tp))
return;
/* we have a clock so we can initialize work now */
INIT_WORK(&tp->ptp_tx_work, rtl8125_ptp_tx_work);
INIT_WORK(&tp->ptp_tx_work, rtl8126_ptp_tx_work);
/* reset the PTP related hardware bits */
rtl8125_ptp_reset(tp);
rtl8126_ptp_reset(tp);
return;
}
void rtl8125_ptp_suspend(struct rtl8125_private *tp)
void rtl8126_ptp_suspend(struct rtl8126_private *tp)
{
if (!tp->ptp_clock)
return;
netif_info(tp, drv, tp->dev, "suspend PHC clock\n");
rtl8125_hwtstamp_enable(tp, false);
rtl8126_hwtstamp_enable(tp, false);
/* ensure that we cancel any pending PTP Tx work item in progress */
cancel_work_sync(&tp->ptp_tx_work);
}
void rtl8125_ptp_stop(struct rtl8125_private *tp)
void rtl8126_ptp_stop(struct rtl8126_private *tp)
{
struct net_device *netdev = tp->dev;
netif_info(tp, drv, tp->dev, "stop PHC clock\n");
/* first, suspend PTP activity */
rtl8125_ptp_suspend(tp);
rtl8126_ptp_suspend(tp);
/* disable the PTP clock device */
if (tp->ptp_clock) {
@ -520,9 +520,9 @@ void rtl8125_ptp_stop(struct rtl8125_private *tp)
}
}
static int rtl8125_set_tstamp(struct net_device *netdev, struct ifreq *ifr)
static int rtl8126_set_tstamp(struct net_device *netdev, struct ifreq *ifr)
{
struct rtl8125_private *tp = netdev_priv(netdev);
struct rtl8126_private *tp = netdev_priv(netdev);
struct hwtstamp_config config;
bool hwtstamp = 0;
@ -565,16 +565,16 @@ static int rtl8125_set_tstamp(struct net_device *netdev, struct ifreq *ifr)
if (tp->hwtstamp_config.tx_type != config.tx_type ||
tp->hwtstamp_config.rx_filter != config.rx_filter) {
tp->hwtstamp_config = config;
rtl8125_hwtstamp_enable(tp, hwtstamp);
rtl8126_hwtstamp_enable(tp, hwtstamp);
}
return copy_to_user(ifr->ifr_data, &config,
sizeof(config)) ? -EFAULT : 0;
}
static int rtl8125_get_tstamp(struct net_device *netdev, struct ifreq *ifr)
static int rtl8126_get_tstamp(struct net_device *netdev, struct ifreq *ifr)
{
struct rtl8125_private *tp = netdev_priv(netdev);
struct rtl8126_private *tp = netdev_priv(netdev);
//netif_info(tp, drv, tp->dev, "ptp get ts\n");
@ -582,7 +582,7 @@ static int rtl8125_get_tstamp(struct net_device *netdev, struct ifreq *ifr)
sizeof(tp->hwtstamp_config)) ? -EFAULT : 0;
}
int rtl8125_ptp_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
int rtl8126_ptp_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
{
int ret;
@ -591,10 +591,10 @@ int rtl8125_ptp_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
switch (cmd) {
#ifdef ENABLE_PTP_SUPPORT
case SIOCSHWTSTAMP:
ret = rtl8125_set_tstamp(netdev, ifr);
ret = rtl8126_set_tstamp(netdev, ifr);
break;
case SIOCGHWTSTAMP:
ret = rtl8125_get_tstamp(netdev, ifr);
ret = rtl8126_get_tstamp(netdev, ifr);
break;
#endif
default:
@ -605,7 +605,7 @@ int rtl8125_ptp_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
return ret;
}
void rtl8125_rx_ptp_pktstamp(struct rtl8125_private *tp, struct sk_buff *skb,
void rtl8126_rx_ptp_pktstamp(struct rtl8126_private *tp, struct sk_buff *skb,
struct RxDescV3 *descv3)
{
time64_t tv_sec;

28
r8125_ptp.h → r8126_ptp.h
View File

@ -2,10 +2,10 @@
/*
################################################################################
#
# r8125 is the Linux device driver released for Realtek 2.5/5 Gigabit Ethernet
# r8126 is the Linux device driver released for Realtek 5 Gigabit Ethernet
# controllers with PCI-Express interface.
#
# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
# Copyright(c) 2024 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free
@ -32,8 +32,8 @@
* US6,570,884, US6,115,776, and US6,327,625.
***********************************************************************************/
#ifndef _LINUX_rtl8125_PTP_H
#define _LINUX_rtl8125_PTP_H
#ifndef _LINUX_R8126_PTP_H
#define _LINUX_R8126_PTP_H
#include <linux/ktime.h>
#include <linux/timecounter.h>
@ -41,7 +41,7 @@
#include <linux/ptp_clock_kernel.h>
#include <linux/ptp_classify.h>
struct rtl8125_ptp_info {
struct rtl8126_ptp_info {
s64 time_sec;
u32 time_ns;
u16 ts_info;
@ -62,20 +62,20 @@ enum PTP_CMD_TYPE {
};
struct rtl8125_private;
struct rtl8126_private;
struct RxDescV3;
int rtl8125_get_ts_info(struct net_device *netdev,
int rtl8126_get_ts_info(struct net_device *netdev,
struct ethtool_ts_info *info);
void rtl8125_ptp_reset(struct rtl8125_private *tp);
void rtl8125_ptp_init(struct rtl8125_private *tp);
void rtl8125_ptp_suspend(struct rtl8125_private *tp);
void rtl8125_ptp_stop(struct rtl8125_private *tp);
void rtl8126_ptp_reset(struct rtl8126_private *tp);
void rtl8126_ptp_init(struct rtl8126_private *tp);
void rtl8126_ptp_suspend(struct rtl8126_private *tp);
void rtl8126_ptp_stop(struct rtl8126_private *tp);
int rtl8125_ptp_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
int rtl8126_ptp_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
void rtl8125_rx_ptp_pktstamp(struct rtl8125_private *tp, struct sk_buff *skb,
void rtl8126_rx_ptp_pktstamp(struct rtl8126_private *tp, struct sk_buff *skb,
struct RxDescV3 *descv3);
#endif /* _LINUX_rtl8125_PTP_H */
#endif /* _LINUX_R8126_PTP_H */

18
r8125_realwow.h → r8126_realwow.h
View File

@ -2,10 +2,10 @@
/*
################################################################################
#
# r8125 is the Linux device driver released for Realtek 2.5/5 Gigabit Ethernet
# r8126 is the Linux device driver released for Realtek 5 Gigabit Ethernet
# controllers with PCI-Express interface.
#
# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
# Copyright(c) 2024 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free
@ -32,8 +32,8 @@
* US6,570,884, US6,115,776, and US6,327,625.
***********************************************************************************/
#ifndef _LINUX_R8125_REALWOW_H
#define _LINUX_R8125_REALWOW_H
#ifndef _LINUX_R8126_REALWOW_H
#define _LINUX_R8126_REALWOW_H
#define SIOCDEVPRIVATE_RTLREALWOW SIOCDEVPRIVATE+3
@ -110,9 +110,9 @@ typedef struct _RealWoWWPInfo {
u8 pattern[MAX_RealWoW_Payload];
} RealWoWWPInfo,*PRealWoWWPInfo;
int rtl8125_realwow_ioctl(struct net_device *dev, struct ifreq *ifr);
void rtl8125_realwow_hw_init(struct net_device *dev);
void rtl8125_get_realwow_hw_version(struct net_device *dev);
void rtl8125_set_realwow_d3_para(struct net_device *dev);
int rtl8126_realwow_ioctl(struct net_device *dev, struct ifreq *ifr);
void rtl8126_realwow_hw_init(struct net_device *dev);
void rtl8126_get_realwow_hw_version(struct net_device *dev);
void rtl8126_set_realwow_d3_para(struct net_device *dev);
#endif /* _LINUX_R8125_REALWOW_H */
#endif /* _LINUX_R8126_REALWOW_H */

138
r8125_rss.c → r8126_rss.c
View File

@ -2,10 +2,10 @@
/*
################################################################################
#
# r8125 is the Linux device driver released for Realtek 2.5/5 Gigabit Ethernet
# r8126 is the Linux device driver released for Realtek 5 Gigabit Ethernet
# controllers with PCI-Express interface.
#
# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
# Copyright(c) 2024 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free
@ -33,9 +33,9 @@
***********************************************************************************/
#include <linux/version.h>
#include "r8125.h"
#include "r8126.h"
enum rtl8125_rss_register_content {
enum rtl8126_rss_register_content {
/* RSS */
RSS_CTRL_TCP_IPV4_SUPP = (1 << 0),
RSS_CTRL_IPV4_SUPP = (1 << 1),
@ -51,7 +51,7 @@ enum rtl8125_rss_register_content {
RSS_HQ_Q_SUP_R = (1 << 31),
};
static int rtl8125_get_rss_hash_opts(struct rtl8125_private *tp,
static int rtl8126_get_rss_hash_opts(struct rtl8126_private *tp,
struct ethtool_rxnfc *cmd)
{
cmd->data = 0;
@ -60,21 +60,21 @@ static int rtl8125_get_rss_hash_opts(struct rtl8125_private *tp,
switch (cmd->flow_type) {
case TCP_V4_FLOW:
cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
/* fallthrough */
fallthrough;
case UDP_V4_FLOW:
if (tp->rss_flags & RTL_8125_RSS_FLAG_HASH_UDP_IPV4)
cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
/* fallthrough */
fallthrough;
case IPV4_FLOW:
cmd->data |= RXH_IP_SRC | RXH_IP_DST;
break;
case TCP_V6_FLOW:
cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
/* fallthrough */
fallthrough;
case UDP_V6_FLOW:
if (tp->rss_flags & RTL_8125_RSS_FLAG_HASH_UDP_IPV6)
cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
/* fallthrough */
fallthrough;
case IPV6_FLOW:
cmd->data |= RXH_IP_SRC | RXH_IP_DST;
break;
@ -85,10 +85,10 @@ static int rtl8125_get_rss_hash_opts(struct rtl8125_private *tp,
return 0;
}
int rtl8125_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
int rtl8126_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
u32 *rule_locs)
{
struct rtl8125_private *tp = netdev_priv(dev);
struct rtl8126_private *tp = netdev_priv(dev);
int ret = -EOPNOTSUPP;
netif_info(tp, drv, tp->dev, "rss get rxnfc\n");
@ -98,11 +98,11 @@ int rtl8125_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
switch (cmd->cmd) {
case ETHTOOL_GRXRINGS:
cmd->data = rtl8125_tot_rx_rings(tp);
cmd->data = rtl8126_tot_rx_rings(tp);
ret = 0;
break;
case ETHTOOL_GRXFH:
ret = rtl8125_get_rss_hash_opts(tp, cmd);
ret = rtl8126_get_rss_hash_opts(tp, cmd);
break;
default:
break;
@ -111,22 +111,22 @@ int rtl8125_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
return ret;
}
u32 rtl8125_rss_indir_tbl_entries(struct rtl8125_private *tp)
u32 rtl8126_rss_indir_tbl_entries(struct rtl8126_private *tp)
{
return tp->HwSuppIndirTblEntries;
}
#define RSS_MASK_BITS_OFFSET (8)
#define RSS_CPU_NUM_OFFSET (16)
#define RTL8125_UDP_RSS_FLAGS (RTL_8125_RSS_FLAG_HASH_UDP_IPV4 | \
#define RTL8126_UDP_RSS_FLAGS (RTL_8125_RSS_FLAG_HASH_UDP_IPV4 | \
RTL_8125_RSS_FLAG_HASH_UDP_IPV6)
static int _rtl8125_set_rss_hash_opt(struct rtl8125_private *tp)
static int _rtl8126_set_rss_hash_opt(struct rtl8126_private *tp)
{
u32 rss_flags = tp->rss_flags;
u32 hash_mask_len;
u32 rss_ctrl;
rss_ctrl = ilog2(rtl8125_tot_rx_rings(tp));
rss_ctrl = ilog2(rtl8126_tot_rx_rings(tp));
rss_ctrl &= (BIT_0 | BIT_1 | BIT_2);
rss_ctrl <<= RSS_CPU_NUM_OFFSET;
@ -145,7 +145,7 @@ static int _rtl8125_set_rss_hash_opt(struct rtl8125_private *tp)
rss_ctrl |= RSS_CTRL_UDP_IPV6_SUPP |
RSS_CTRL_UDP_IPV6_EXT_SUPP;
hash_mask_len = ilog2(rtl8125_rss_indir_tbl_entries(tp));
hash_mask_len = ilog2(rtl8126_rss_indir_tbl_entries(tp));
hash_mask_len &= (BIT_0 | BIT_1 | BIT_2);
rss_ctrl |= hash_mask_len << RSS_MASK_BITS_OFFSET;
@ -154,7 +154,7 @@ static int _rtl8125_set_rss_hash_opt(struct rtl8125_private *tp)
return 0;
}
static int rtl8125_set_rss_hash_opt(struct rtl8125_private *tp,
static int rtl8126_set_rss_hash_opt(struct rtl8126_private *tp,
struct ethtool_rxnfc *nfc)
{
u32 rss_flags = tp->rss_flags;
@ -233,8 +233,8 @@ static int rtl8125_set_rss_hash_opt(struct rtl8125_private *tp,
if (rss_flags != tp->rss_flags) {
u32 rss_ctrl = RTL_R32(tp, RSS_CTRL_8125);
if ((rss_flags & RTL8125_UDP_RSS_FLAGS) &&
!(tp->rss_flags & RTL8125_UDP_RSS_FLAGS))
if ((rss_flags & RTL8126_UDP_RSS_FLAGS) &&
!(tp->rss_flags & RTL8126_UDP_RSS_FLAGS))
netdev_warn(tp->dev,
"enabling UDP RSS: fragmented packets may "
"arrive out of order to the stack above\n");
@ -266,9 +266,9 @@ static int rtl8125_set_rss_hash_opt(struct rtl8125_private *tp,
return 0;
}
int rtl8125_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
int rtl8126_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
{
struct rtl8125_private *tp = netdev_priv(dev);
struct rtl8126_private *tp = netdev_priv(dev);
int ret = -EOPNOTSUPP;
netif_info(tp, drv, tp->dev, "rss set rxnfc\n");
@ -278,7 +278,7 @@ int rtl8125_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
switch (cmd->cmd) {
case ETHTOOL_SRXFH:
ret = rtl8125_set_rss_hash_opt(tp, cmd);
ret = rtl8126_set_rss_hash_opt(tp, cmd);
break;
default:
break;
@ -287,47 +287,47 @@ int rtl8125_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
return ret;
}
static u32 _rtl8125_get_rxfh_key_size(struct rtl8125_private *tp)
static u32 _rtl8126_get_rxfh_key_size(struct rtl8126_private *tp)
{
return sizeof(tp->rss_key);
}
u32 rtl8125_get_rxfh_key_size(struct net_device *dev)
u32 rtl8126_get_rxfh_key_size(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
struct rtl8126_private *tp = netdev_priv(dev);
netif_info(tp, drv, tp->dev, "rss get key size\n");
if (!(dev->features & NETIF_F_RXHASH))
return 0;
return _rtl8125_get_rxfh_key_size(tp);
return _rtl8126_get_rxfh_key_size(tp);
}
u32 rtl8125_rss_indir_size(struct net_device *dev)
u32 rtl8126_rss_indir_size(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
struct rtl8126_private *tp = netdev_priv(dev);
netif_info(tp, drv, tp->dev, "rss get indir tbl size\n");
if (!(dev->features & NETIF_F_RXHASH))
return 0;
return rtl8125_rss_indir_tbl_entries(tp);
return rtl8126_rss_indir_tbl_entries(tp);
}
static void rtl8125_get_reta(struct rtl8125_private *tp, u32 *indir)
static void rtl8126_get_reta(struct rtl8126_private *tp, u32 *indir)
{
int i, reta_size = rtl8125_rss_indir_tbl_entries(tp);
int i, reta_size = rtl8126_rss_indir_tbl_entries(tp);
for (i = 0; i < reta_size; i++)
indir[i] = tp->rss_indir_tbl[i];
}
int rtl8125_get_rxfh(struct net_device *dev, u32 *indir, u8 *key,
int rtl8126_get_rxfh(struct net_device *dev, u32 *indir, u8 *key,
u8 *hfunc)
{
struct rtl8125_private *tp = netdev_priv(dev);
struct rtl8126_private *tp = netdev_priv(dev);
netif_info(tp, drv, tp->dev, "rss get rxfh\n");
@ -338,28 +338,28 @@ int rtl8125_get_rxfh(struct net_device *dev, u32 *indir, u8 *key,
*hfunc = ETH_RSS_HASH_TOP;
if (indir)
rtl8125_get_reta(tp, indir);
rtl8126_get_reta(tp, indir);
if (key)
memcpy(key, tp->rss_key, RTL8125_RSS_KEY_SIZE);
memcpy(key, tp->rss_key, RTL8126_RSS_KEY_SIZE);
return 0;
}
static u32 rtl8125_rss_key_reg(struct rtl8125_private *tp)
static u32 rtl8126_rss_key_reg(struct rtl8126_private *tp)
{
return RSS_KEY_8125;
}
static u32 rtl8125_rss_indir_tbl_reg(struct rtl8125_private *tp)
static u32 rtl8126_rss_indir_tbl_reg(struct rtl8126_private *tp)
{
return RSS_INDIRECTION_TBL_8125_V2;
}
static void rtl8125_store_reta(struct rtl8125_private *tp)
static void rtl8126_store_reta(struct rtl8126_private *tp)
{
u16 indir_tbl_reg = rtl8125_rss_indir_tbl_reg(tp);
u32 i, reta_entries = rtl8125_rss_indir_tbl_entries(tp);
u16 indir_tbl_reg = rtl8126_rss_indir_tbl_reg(tp);
u32 i, reta_entries = rtl8126_rss_indir_tbl_entries(tp);
u32 reta = 0;
u8 *indir_tbl = tp->rss_indir_tbl;
@ -375,10 +375,10 @@ static void rtl8125_store_reta(struct rtl8125_private *tp)
}
}
static void rtl8125_store_rss_key(struct rtl8125_private *tp)
static void rtl8126_store_rss_key(struct rtl8126_private *tp)
{
const u16 rss_key_reg = rtl8125_rss_key_reg(tp);
u32 i, rss_key_size = _rtl8125_get_rxfh_key_size(tp);
const u16 rss_key_reg = rtl8126_rss_key_reg(tp);
u32 i, rss_key_size = _rtl8126_get_rxfh_key_size(tp);
u32 *rss_key = (u32*)tp->rss_key;
/* Write redirection table to HW */
@ -386,12 +386,12 @@ static void rtl8125_store_rss_key(struct rtl8125_private *tp)
RTL_W32(tp, rss_key_reg + i, *rss_key++);
}
int rtl8125_set_rxfh(struct net_device *dev, const u32 *indir,
int rtl8126_set_rxfh(struct net_device *dev, const u32 *indir,
const u8 *key, const u8 hfunc)
{
struct rtl8125_private *tp = netdev_priv(dev);
struct rtl8126_private *tp = netdev_priv(dev);
int i;
u32 reta_entries = rtl8125_rss_indir_tbl_entries(tp);
u32 reta_entries = rtl8126_rss_indir_tbl_entries(tp);
netif_info(tp, drv, tp->dev, "rss set rxfh\n");
@ -416,16 +416,16 @@ int rtl8125_set_rxfh(struct net_device *dev, const u32 *indir,
/* Fill out the rss hash key */
if (key)
memcpy(tp->rss_key, key, RTL8125_RSS_KEY_SIZE);
memcpy(tp->rss_key, key, RTL8126_RSS_KEY_SIZE);
rtl8125_store_reta(tp);
rtl8126_store_reta(tp);
rtl8125_store_rss_key(tp);
rtl8126_store_rss_key(tp);
return 0;
}
static u32 rtl8125_get_rx_desc_hash(struct rtl8125_private *tp,
static u32 rtl8126_get_rx_desc_hash(struct rtl8126_private *tp,
struct RxDescV3 *descv3)
{
return le32_to_cpu(descv3->RxDescNormalDDWord2.RSSResult);
@ -435,9 +435,9 @@ static u32 rtl8125_get_rx_desc_hash(struct rtl8125_private *tp,
#define RXS_8125_RSS_IPV4 BIT(10)
#define RXS_8125_RSS_IPV6 BIT(12)
#define RXS_8125_RSS_TCP BIT(13)
#define RTL8125_RXS_RSS_L3_TYPE_MASK (RXS_8125_RSS_IPV4 | RXS_8125_RSS_IPV6)
#define RTL8125_RXS_RSS_L4_TYPE_MASK (RXS_8125_RSS_TCP | RXS_8125B_RSS_UDP)
void rtl8125_rx_hash(struct rtl8125_private *tp,
#define RTL8126_RXS_RSS_L3_TYPE_MASK (RXS_8125_RSS_IPV4 | RXS_8125_RSS_IPV6)
#define RTL8126_RXS_RSS_L4_TYPE_MASK (RXS_8125_RSS_TCP | RXS_8125B_RSS_UDP)
void rtl8126_rx_hash(struct rtl8126_private *tp,
struct RxDescV3 *descv3,
struct sk_buff *skb)
{
@ -448,44 +448,44 @@ void rtl8125_rx_hash(struct rtl8125_private *tp,
rss_header_info = le16_to_cpu(descv3->RxDescNormalDDWord2.HeaderInfo);
if (!(rss_header_info & RTL8125_RXS_RSS_L3_TYPE_MASK))
if (!(rss_header_info & RTL8126_RXS_RSS_L3_TYPE_MASK))
return;
skb_set_hash(skb, rtl8125_get_rx_desc_hash(tp, descv3),
(RTL8125_RXS_RSS_L4_TYPE_MASK & rss_header_info) ?
skb_set_hash(skb, rtl8126_get_rx_desc_hash(tp, descv3),
(RTL8126_RXS_RSS_L4_TYPE_MASK & rss_header_info) ?
PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
}
void rtl8125_disable_rss(struct rtl8125_private *tp)
void rtl8126_disable_rss(struct rtl8126_private *tp)
{
RTL_W32(tp, RSS_CTRL_8125, 0x00);
}
void _rtl8125_config_rss(struct rtl8125_private *tp)
void _rtl8126_config_rss(struct rtl8126_private *tp)
{
_rtl8125_set_rss_hash_opt(tp);
_rtl8126_set_rss_hash_opt(tp);
rtl8125_store_reta(tp);
rtl8126_store_reta(tp);
rtl8125_store_rss_key(tp);
rtl8126_store_rss_key(tp);
}
void rtl8125_config_rss(struct rtl8125_private *tp)
void rtl8126_config_rss(struct rtl8126_private *tp)
{
if (!tp->EnableRss) {
rtl8125_disable_rss(tp);
rtl8126_disable_rss(tp);
return;
}
_rtl8125_config_rss(tp);
_rtl8126_config_rss(tp);
}
void rtl8125_init_rss(struct rtl8125_private *tp)
void rtl8126_init_rss(struct rtl8126_private *tp)
{
int i;
for (i = 0; i < rtl8125_rss_indir_tbl_entries(tp); i++)
for (i = 0; i < rtl8126_rss_indir_tbl_entries(tp); i++)
tp->rss_indir_tbl[i] = ethtool_rxfh_indir_default(i, tp->num_rx_rings);
netdev_rss_key_fill(tp->rss_key, RTL8125_RSS_KEY_SIZE);
netdev_rss_key_fill(tp->rss_key, RTL8126_RSS_KEY_SIZE);
}

42
r8125_rss.h → r8126_rss.h
View File

@ -2,10 +2,10 @@
/*
################################################################################
#
# r8125 is the Linux device driver released for Realtek 2.5/5 Gigabit Ethernet
# r8126 is the Linux device driver released for Realtek 5 Gigabit Ethernet
# controllers with PCI-Express interface.
#
# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
# Copyright(c) 2024 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free
@ -32,38 +32,38 @@
* US6,570,884, US6,115,776, and US6,327,625.
***********************************************************************************/
#ifndef _LINUX_rtl8125_RSS_H
#define _LINUX_rtl8125_RSS_H
#ifndef _LINUX_R8126_RSS_H
#define _LINUX_R8126_RSS_H
#include <linux/netdevice.h>
#include <linux/types.h>
#define RTL8125_RSS_KEY_SIZE 40 /* size of RSS Hash Key in bytes */
#define RTL8125_MAX_INDIRECTION_TABLE_ENTRIES 128
#define RTL8126_RSS_KEY_SIZE 40 /* size of RSS Hash Key in bytes */
#define RTL8126_MAX_INDIRECTION_TABLE_ENTRIES 128
enum rtl8125_rss_flag {
enum rtl8126_rss_flag {
RTL_8125_RSS_FLAG_HASH_UDP_IPV4 = (1 << 0),
RTL_8125_RSS_FLAG_HASH_UDP_IPV6 = (1 << 1),
};
struct rtl8125_private;
struct rtl8126_private;
int rtl8125_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
int rtl8126_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
u32 *rule_locs);
int rtl8125_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd);
u32 rtl8125_get_rxfh_key_size(struct net_device *netdev);
u32 rtl8125_rss_indir_size(struct net_device *netdev);
int rtl8125_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
int rtl8126_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd);
u32 rtl8126_get_rxfh_key_size(struct net_device *netdev);
u32 rtl8126_rss_indir_size(struct net_device *netdev);
int rtl8126_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
u8 *hfunc);
int rtl8125_set_rxfh(struct net_device *netdev, const u32 *indir,
int rtl8126_set_rxfh(struct net_device *netdev, const u32 *indir,
const u8 *key, const u8 hfunc);
void rtl8125_rx_hash(struct rtl8125_private *tp,
void rtl8126_rx_hash(struct rtl8126_private *tp,
struct RxDescV3 *descv3,
struct sk_buff *skb);
void _rtl8125_config_rss(struct rtl8125_private *tp);
void rtl8125_config_rss(struct rtl8125_private *tp);
void rtl8125_init_rss(struct rtl8125_private *tp);
u32 rtl8125_rss_indir_tbl_entries(struct rtl8125_private *tp);
void rtl8125_disable_rss(struct rtl8125_private *tp);
void _rtl8126_config_rss(struct rtl8126_private *tp);
void rtl8126_config_rss(struct rtl8126_private *tp);
void rtl8126_init_rss(struct rtl8126_private *tp);
u32 rtl8126_rss_indir_tbl_entries(struct rtl8126_private *tp);
void rtl8126_disable_rss(struct rtl8126_private *tp);
#endif /* _LINUX_rtl8125_RSS_H */
#endif /* _LINUX_R8126_RSS_H */

88
rtl_eeprom.c
View File

@ -2,10 +2,10 @@
/*
################################################################################
#
# r8125 is the Linux device driver released for Realtek 2.5/5 Gigabit Ethernet
# r8126 is the Linux device driver released for Realtek 5 Gigabit Ethernet
# controllers with PCI-Express interface.
#
# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
# Copyright(c) 2024 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free
@ -41,17 +41,17 @@
#include <asm/io.h>
#include "r8125.h"
#include "r8126.h"
#include "rtl_eeprom.h"
//-------------------------------------------------------------------
//rtl8125_eeprom_type():
//rtl8126_eeprom_type():
// tell the eeprom type
//return value:
// 0: the eeprom type is 93C46
// 1: the eeprom type is 93C56 or 93C66
//-------------------------------------------------------------------
void rtl8125_eeprom_type(struct rtl8125_private *tp)
void rtl8126_eeprom_type(struct rtl8126_private *tp)
{
u16 magic = 0;
@ -71,7 +71,7 @@ void rtl8125_eeprom_type(struct rtl8125_private *tp)
tp->eeprom_len = 128;
}
magic = rtl8125_eeprom_read_sc(tp, 0);
magic = rtl8126_eeprom_read_sc(tp, 0);
out_no_eeprom:
if ((magic != 0x8129) && (magic != 0x8128)) {
@ -80,7 +80,7 @@ out_no_eeprom:
}
}
void rtl8125_eeprom_cleanup(struct rtl8125_private *tp)
void rtl8126_eeprom_cleanup(struct rtl8126_private *tp)
{
u8 x;
@ -89,16 +89,16 @@ void rtl8125_eeprom_cleanup(struct rtl8125_private *tp)
RTL_W8(tp, Cfg9346, x);
rtl8125_raise_clock(tp, &x);
rtl8125_lower_clock(tp, &x);
rtl8126_raise_clock(tp, &x);
rtl8126_lower_clock(tp, &x);
}
int rtl8125_eeprom_cmd_done(struct rtl8125_private *tp)
int rtl8126_eeprom_cmd_done(struct rtl8126_private *tp)
{
u8 x;
int i;
rtl8125_stand_by(tp);
rtl8126_stand_by(tp);
for (i = 0; i < 50000; i++) {
x = RTL_R8(tp, Cfg9346);
@ -114,10 +114,10 @@ int rtl8125_eeprom_cmd_done(struct rtl8125_private *tp)
}
//-------------------------------------------------------------------
//rtl8125_eeprom_read_sc():
//rtl8126_eeprom_read_sc():
// read one word from eeprom
//-------------------------------------------------------------------
u16 rtl8125_eeprom_read_sc(struct rtl8125_private *tp, u16 reg)
u16 rtl8126_eeprom_read_sc(struct rtl8126_private *tp, u16 reg)
{
int addr_sz = 6;
u8 x;
@ -135,12 +135,12 @@ u16 rtl8125_eeprom_read_sc(struct rtl8125_private *tp, u16 reg)
x = Cfg9346_EEM1 | Cfg9346_EECS;
RTL_W8(tp, Cfg9346, x);
rtl8125_shift_out_bits(tp, RTL_EEPROM_READ_OPCODE, 3);
rtl8125_shift_out_bits(tp, reg, addr_sz);
rtl8126_shift_out_bits(tp, RTL_EEPROM_READ_OPCODE, 3);
rtl8126_shift_out_bits(tp, reg, addr_sz);
data = rtl8125_shift_in_bits(tp);
data = rtl8126_shift_in_bits(tp);
rtl8125_eeprom_cleanup(tp);
rtl8126_eeprom_cleanup(tp);
RTL_W8(tp, Cfg9346, 0);
@ -148,10 +148,10 @@ u16 rtl8125_eeprom_read_sc(struct rtl8125_private *tp, u16 reg)
}
//-------------------------------------------------------------------
//rtl8125_eeprom_write_sc():
//rtl8126_eeprom_write_sc():
// write one word to a specific address in the eeprom
//-------------------------------------------------------------------
void rtl8125_eeprom_write_sc(struct rtl8125_private *tp, u16 reg, u16 data)
void rtl8126_eeprom_write_sc(struct rtl8126_private *tp, u16 reg, u16 data)
{
u8 x;
int addr_sz = 6;
@ -172,40 +172,40 @@ void rtl8125_eeprom_write_sc(struct rtl8125_private *tp, u16 reg, u16 data)
x = Cfg9346_EEM1 | Cfg9346_EECS;
RTL_W8(tp, Cfg9346, x);
rtl8125_shift_out_bits(tp, RTL_EEPROM_EWEN_OPCODE, 5);
rtl8125_shift_out_bits(tp, reg, w_dummy_addr);
rtl8125_stand_by(tp);
rtl8126_shift_out_bits(tp, RTL_EEPROM_EWEN_OPCODE, 5);
rtl8126_shift_out_bits(tp, reg, w_dummy_addr);
rtl8126_stand_by(tp);
rtl8125_shift_out_bits(tp, RTL_EEPROM_ERASE_OPCODE, 3);
rtl8125_shift_out_bits(tp, reg, addr_sz);
if (rtl8125_eeprom_cmd_done(tp) < 0) {
rtl8126_shift_out_bits(tp, RTL_EEPROM_ERASE_OPCODE, 3);
rtl8126_shift_out_bits(tp, reg, addr_sz);
if (rtl8126_eeprom_cmd_done(tp) < 0) {
return;
}
rtl8125_stand_by(tp);
rtl8126_stand_by(tp);
rtl8125_shift_out_bits(tp, RTL_EEPROM_WRITE_OPCODE, 3);
rtl8125_shift_out_bits(tp, reg, addr_sz);
rtl8125_shift_out_bits(tp, data, 16);
if (rtl8125_eeprom_cmd_done(tp) < 0) {
rtl8126_shift_out_bits(tp, RTL_EEPROM_WRITE_OPCODE, 3);
rtl8126_shift_out_bits(tp, reg, addr_sz);
rtl8126_shift_out_bits(tp, data, 16);
if (rtl8126_eeprom_cmd_done(tp) < 0) {
return;
}
rtl8125_stand_by(tp);
rtl8126_stand_by(tp);
rtl8125_shift_out_bits(tp, RTL_EEPROM_EWDS_OPCODE, 5);
rtl8125_shift_out_bits(tp, reg, w_dummy_addr);
rtl8126_shift_out_bits(tp, RTL_EEPROM_EWDS_OPCODE, 5);
rtl8126_shift_out_bits(tp, reg, w_dummy_addr);
rtl8125_eeprom_cleanup(tp);
rtl8126_eeprom_cleanup(tp);
RTL_W8(tp, Cfg9346, 0);
}
void rtl8125_raise_clock(struct rtl8125_private *tp, u8 *x)
void rtl8126_raise_clock(struct rtl8126_private *tp, u8 *x)
{
*x = *x | Cfg9346_EESK;
RTL_W8(tp, Cfg9346, *x);
udelay(RTL_CLOCK_RATE);
}
void rtl8125_lower_clock(struct rtl8125_private *tp, u8 *x)
void rtl8126_lower_clock(struct rtl8126_private *tp, u8 *x)
{
*x = *x & ~Cfg9346_EESK;
@ -213,7 +213,7 @@ void rtl8125_lower_clock(struct rtl8125_private *tp, u8 *x)
udelay(RTL_CLOCK_RATE);
}
void rtl8125_shift_out_bits(struct rtl8125_private *tp, int data, int count)
void rtl8126_shift_out_bits(struct rtl8126_private *tp, int data, int count)
{
u8 x;
int mask;
@ -230,8 +230,8 @@ void rtl8125_shift_out_bits(struct rtl8125_private *tp, int data, int count)
RTL_W8(tp, Cfg9346, x);
udelay(RTL_CLOCK_RATE);
rtl8125_raise_clock(tp, &x);
rtl8125_lower_clock(tp, &x);
rtl8126_raise_clock(tp, &x);
rtl8126_lower_clock(tp, &x);
mask = mask >> 1;
} while(mask);
@ -239,7 +239,7 @@ void rtl8125_shift_out_bits(struct rtl8125_private *tp, int data, int count)
RTL_W8(tp, Cfg9346, x);
}
u16 rtl8125_shift_in_bits(struct rtl8125_private *tp)
u16 rtl8126_shift_in_bits(struct rtl8126_private *tp)
{
u8 x;
u16 d, i;
@ -251,7 +251,7 @@ u16 rtl8125_shift_in_bits(struct rtl8125_private *tp)
for (i = 0; i < 16; i++) {
d = d << 1;
rtl8125_raise_clock(tp, &x);
rtl8126_raise_clock(tp, &x);
x = RTL_R8(tp, Cfg9346);
x &= ~Cfg9346_EEDI;
@ -259,13 +259,13 @@ u16 rtl8125_shift_in_bits(struct rtl8125_private *tp)
if (x & Cfg9346_EEDO)
d |= 1;
rtl8125_lower_clock(tp, &x);
rtl8126_lower_clock(tp, &x);
}
return d;
}
void rtl8125_stand_by(struct rtl8125_private *tp)
void rtl8126_stand_by(struct rtl8126_private *tp)
{
u8 x;
@ -278,7 +278,7 @@ void rtl8125_stand_by(struct rtl8125_private *tp)
RTL_W8(tp, Cfg9346, x);
}
void rtl8125_set_eeprom_sel_low(struct rtl8125_private *tp)
void rtl8126_set_eeprom_sel_low(struct rtl8126_private *tp)
{
RTL_W8(tp, Cfg9346, Cfg9346_EEM1);
RTL_W8(tp, Cfg9346, Cfg9346_EEM1 | Cfg9346_EESK);

29
rtl_eeprom.h
View File

@ -2,10 +2,10 @@
/*
################################################################################
#
# r8125 is the Linux device driver released for Realtek 2.5/5 Gigabit Ethernet
# r8126 is the Linux device driver released for Realtek 5 Gigabit Ethernet
# controllers with PCI-Express interface.
#
# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
# Copyright(c) 2024 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free
@ -32,6 +32,9 @@
* US6,570,884, US6,115,776, and US6,327,625.
***********************************************************************************/
#ifndef _LINUX_RTLEEPROM_H
#define _LINUX_RTLEEPROM_H
//EEPROM opcodes
#define RTL_EEPROM_READ_OPCODE 06
#define RTL_EEPROM_WRITE_OPCODE 05
@ -41,13 +44,15 @@
#define RTL_CLOCK_RATE 3
void rtl8125_eeprom_type(struct rtl8125_private *tp);
void rtl8125_eeprom_cleanup(struct rtl8125_private *tp);
u16 rtl8125_eeprom_read_sc(struct rtl8125_private *tp, u16 reg);
void rtl8125_eeprom_write_sc(struct rtl8125_private *tp, u16 reg, u16 data);
void rtl8125_shift_out_bits(struct rtl8125_private *tp, int data, int count);
u16 rtl8125_shift_in_bits(struct rtl8125_private *tp);
void rtl8125_raise_clock(struct rtl8125_private *tp, u8 *x);
void rtl8125_lower_clock(struct rtl8125_private *tp, u8 *x);
void rtl8125_stand_by(struct rtl8125_private *tp);
void rtl8125_set_eeprom_sel_low(struct rtl8125_private *tp);
void rtl8126_eeprom_type(struct rtl8126_private *tp);
void rtl8126_eeprom_cleanup(struct rtl8126_private *tp);
u16 rtl8126_eeprom_read_sc(struct rtl8126_private *tp, u16 reg);
void rtl8126_eeprom_write_sc(struct rtl8126_private *tp, u16 reg, u16 data);
void rtl8126_shift_out_bits(struct rtl8126_private *tp, int data, int count);
u16 rtl8126_shift_in_bits(struct rtl8126_private *tp);
void rtl8126_raise_clock(struct rtl8126_private *tp, u8 *x);
void rtl8126_lower_clock(struct rtl8126_private *tp, u8 *x);
void rtl8126_stand_by(struct rtl8126_private *tp);
void rtl8126_set_eeprom_sel_low(struct rtl8126_private *tp);
#endif /* _LINUX_RTLEEPROM_H */

44
rtltool.c
View File

@ -2,10 +2,10 @@
/*
################################################################################
#
# r8125 is the Linux device driver released for Realtek 2.5/5 Gigabit Ethernet
# r8126 is the Linux device driver released for Realtek 5 Gigabit Ethernet
# controllers with PCI-Express interface.
#
# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
# Copyright(c) 2024 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free
@ -40,11 +40,11 @@
#include <linux/in.h>
#include <linux/ethtool.h>
#include <asm/uaccess.h>
#include "r8125.h"
#include "r8126.h"
#include "rtl_eeprom.h"
#include "rtltool.h"
int rtl8125_tool_ioctl(struct rtl8125_private *tp, struct ifreq *ifr)
int rtl8126_tool_ioctl(struct rtl8126_private *tp, struct ifreq *ifr)
{
struct rtltool_cmd my_cmd;
int ret;
@ -87,7 +87,7 @@ int rtl8125_tool_ioctl(struct rtl8125_private *tp, struct ifreq *ifr)
break;
case RTLTOOL_READ_PHY:
my_cmd.data = rtl8125_mdio_prot_read(tp, my_cmd.offset);
my_cmd.data = rtl8126_mdio_prot_read(tp, my_cmd.offset);
if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) {
ret = -EFAULT;
break;
@ -96,11 +96,11 @@ int rtl8125_tool_ioctl(struct rtl8125_private *tp, struct ifreq *ifr)
break;
case RTLTOOL_WRITE_PHY:
rtl8125_mdio_prot_write(tp, my_cmd.offset, my_cmd.data);
rtl8126_mdio_prot_write(tp, my_cmd.offset, my_cmd.data);
break;
case RTLTOOL_READ_EPHY:
my_cmd.data = rtl8125_ephy_read(tp, my_cmd.offset);
my_cmd.data = rtl8126_ephy_read(tp, my_cmd.offset);
if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) {
ret = -EFAULT;
break;
@ -109,13 +109,13 @@ int rtl8125_tool_ioctl(struct rtl8125_private *tp, struct ifreq *ifr)
break;
case RTLTOOL_WRITE_EPHY:
rtl8125_ephy_write(tp, my_cmd.offset, my_cmd.data);
rtl8126_ephy_write(tp, my_cmd.offset, my_cmd.data);
break;
case RTLTOOL_READ_ERI:
my_cmd.data = 0;
if (my_cmd.len==1 || my_cmd.len==2 || my_cmd.len==4) {
my_cmd.data = rtl8125_eri_read(tp, my_cmd.offset, my_cmd.len, ERIAR_ExGMAC);
my_cmd.data = rtl8126_eri_read(tp, my_cmd.offset, my_cmd.len, ERIAR_ExGMAC);
} else {
ret = -EOPNOTSUPP;
break;
@ -130,7 +130,7 @@ int rtl8125_tool_ioctl(struct rtl8125_private *tp, struct ifreq *ifr)
case RTLTOOL_WRITE_ERI:
if (my_cmd.len==1 || my_cmd.len==2 || my_cmd.len==4) {
rtl8125_eri_write(tp, my_cmd.offset, my_cmd.len, my_cmd.data, ERIAR_ExGMAC);
rtl8126_eri_write(tp, my_cmd.offset, my_cmd.len, my_cmd.data, ERIAR_ExGMAC);
} else {
ret = -EOPNOTSUPP;
break;
@ -177,7 +177,7 @@ int rtl8125_tool_ioctl(struct rtl8125_private *tp, struct ifreq *ifr)
break;
case RTLTOOL_READ_EEPROM:
my_cmd.data = rtl8125_eeprom_read_sc(tp, my_cmd.offset);
my_cmd.data = rtl8126_eeprom_read_sc(tp, my_cmd.offset);
if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) {
ret = -EFAULT;
break;
@ -186,13 +186,13 @@ int rtl8125_tool_ioctl(struct rtl8125_private *tp, struct ifreq *ifr)
break;
case RTLTOOL_WRITE_EEPROM:
rtl8125_eeprom_write_sc(tp, my_cmd.offset, my_cmd.data);
rtl8126_eeprom_write_sc(tp, my_cmd.offset, my_cmd.data);
break;
case RTL_READ_OOB_MAC:
rtl8125_oob_mutex_lock(tp);
my_cmd.data = rtl8125_ocp_read(tp, my_cmd.offset, 4);
rtl8125_oob_mutex_unlock(tp);
rtl8126_oob_mutex_lock(tp);
my_cmd.data = rtl8126_ocp_read(tp, my_cmd.offset, 4);
rtl8126_oob_mutex_unlock(tp);
if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) {
ret = -EFAULT;
break;
@ -203,9 +203,9 @@ int rtl8125_tool_ioctl(struct rtl8125_private *tp, struct ifreq *ifr)
if (my_cmd.len == 0 || my_cmd.len > 4)
return -EOPNOTSUPP;
rtl8125_oob_mutex_lock(tp);
rtl8125_ocp_write(tp, my_cmd.offset, my_cmd.len, my_cmd.data);
rtl8125_oob_mutex_unlock(tp);
rtl8126_oob_mutex_lock(tp);
rtl8126_ocp_write(tp, my_cmd.offset, my_cmd.len, my_cmd.data);
rtl8126_oob_mutex_unlock(tp);
break;
case RTL_ENABLE_PCI_DIAG:
@ -224,7 +224,7 @@ int rtl8125_tool_ioctl(struct rtl8125_private *tp, struct ifreq *ifr)
if (my_cmd.offset % 2)
return -EOPNOTSUPP;
my_cmd.data = rtl8125_mac_ocp_read(tp, my_cmd.offset);
my_cmd.data = rtl8126_mac_ocp_read(tp, my_cmd.offset);
if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) {
ret = -EFAULT;
break;
@ -235,11 +235,11 @@ int rtl8125_tool_ioctl(struct rtl8125_private *tp, struct ifreq *ifr)
if ((my_cmd.offset % 2) || (my_cmd.len != 2))
return -EOPNOTSUPP;
rtl8125_mac_ocp_write(tp, my_cmd.offset, (u16)my_cmd.data);
rtl8126_mac_ocp_write(tp, my_cmd.offset, (u16)my_cmd.data);
break;
case RTL_DIRECT_READ_PHY_OCP:
my_cmd.data = rtl8125_mdio_prot_direct_read_phy_ocp(tp, my_cmd.offset);
my_cmd.data = rtl8126_mdio_prot_direct_read_phy_ocp(tp, my_cmd.offset);
if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) {
ret = -EFAULT;
break;
@ -248,7 +248,7 @@ int rtl8125_tool_ioctl(struct rtl8125_private *tp, struct ifreq *ifr)
break;
case RTL_DIRECT_WRITE_PHY_OCP:
rtl8125_mdio_prot_direct_write_phy_ocp(tp, my_cmd.offset, my_cmd.data);
rtl8126_mdio_prot_direct_write_phy_ocp(tp, my_cmd.offset, my_cmd.data);
break;
default:

6
rtltool.h
View File

@ -2,10 +2,10 @@
/*
################################################################################
#
# r8125 is the Linux device driver released for Realtek 2.5/5 Gigabit Ethernet
# r8126 is the Linux device driver released for Realtek 5 Gigabit Ethernet
# controllers with PCI-Express interface.
#
# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
# Copyright(c) 2024 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free
@ -80,7 +80,7 @@ enum mode_access {
};
#ifdef __KERNEL__
int rtl8125_tool_ioctl(struct rtl8125_private *tp, struct ifreq *ifr);
int rtl8126_tool_ioctl(struct rtl8126_private *tp, struct ifreq *ifr);
#endif
#endif /* _LINUX_RTLTOOL_H */