update to 9.012.03

Signed-off-by: AuxXxilium <info@auxxxilium.tech>
This commit is contained in:
AuxXxilium 2023-11-13 13:10:45 +01:00
parent 03bf3141f5
commit 965c113592
16 changed files with 6913 additions and 1508 deletions

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@ -1,10 +1,10 @@
# SPDX-License-Identifier: GPL-2.0-only
################################################################################
#
# r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet
# r8125 is the Linux device driver released for Realtek 2.5/5 Gigabit Ethernet
# controllers with PCI-Express interface.
#
# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free
@ -47,8 +47,11 @@ ENABLE_PTP_MASTER_MODE = n
ENABLE_RSS_SUPPORT = n
ENABLE_LIB_SUPPORT = n
ENABLE_USE_FIRMWARE_FILE = n
DISABLE_PM_SUPPORT = n
DISABLE_WOL_SUPPORT = n
DISABLE_MULTI_MSIX_VECTOR = n
ENABLE_DOUBLE_VLAN = n
ENABLE_PAGE_REUSE = n
ENABLE_RX_PACKET_FRAGMENT = n
ifneq ($(KERNELRELEASE),)
obj-m := r8125.o
@ -113,12 +116,21 @@ ifneq ($(KERNELRELEASE),)
r8125-objs += r8125_firmware.o
EXTRA_CFLAGS += -DENABLE_USE_FIRMWARE_FILE
endif
ifeq ($(DISABLE_PM_SUPPORT), y)
EXTRA_CFLAGS += -DDISABLE_PM_SUPPORT
ifeq ($(DISABLE_WOL_SUPPORT), y)
EXTRA_CFLAGS += -DDISABLE_WOL_SUPPORT
endif
ifeq ($(DISABLE_MULTI_MSIX_VECTOR), y)
EXTRA_CFLAGS += -DDISABLE_MULTI_MSIX_VECTOR
endif
ifeq ($(ENABLE_DOUBLE_VLAN), y)
EXTRA_CFLAGS += -DENABLE_DOUBLE_VLAN
endif
ifeq ($(ENABLE_PAGE_REUSE), y)
EXTRA_CFLAGS += -DENABLE_PAGE_REUSE
endif
ifeq ($(ENABLE_RX_PACKET_FRAGMENT), y)
EXTRA_CFLAGS += -DENABLE_RX_PACKET_FRAGMENT
endif
else
BASEDIR := /lib/modules/$(shell uname -r)
KERNELDIR ?= $(BASEDIR)/build

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@ -1,10 +1,10 @@
# SPDX-License-Identifier: GPL-2.0-only
################################################################################
#
# r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet
# r8125 is the Linux device driver released for Realtek 2.5/5 Gigabit Ethernet
# controllers with PCI-Express interface.
#
# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free

278
r8125.h
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@ -2,10 +2,10 @@
/*
################################################################################
#
# r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet
# r8125 is the Linux device driver released for Realtek 2.5/5 Gigabit Ethernet
# controllers with PCI-Express interface.
#
# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free
@ -47,16 +47,98 @@
#include "r8125_lib.h"
#endif
#if LINUX_VERSION_CODE < KERNEL_VERSION(4,3,0)
static inline
ssize_t strscpy(char *dest, const char *src, size_t count)
{
long res = 0;
if (count == 0)
return -E2BIG;
while (count) {
char c;
c = src[res];
dest[res] = c;
if (!c)
return res;
res++;
count--;
}
/* Hit buffer length without finding a NUL; force NUL-termination. */
if (res)
dest[res-1] = '\0';
return -E2BIG;
}
#endif
#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0))
static inline unsigned char *skb_checksum_start(const struct sk_buff *skb)
{
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22))
return skb->head + skb->csum_start;
#else /* < 2.6.22 */
return skb_transport_header(skb);
#endif
}
#endif
#if LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0)
static inline void netdev_tx_sent_queue(struct netdev_queue *dev_queue,
unsigned int bytes)
{}
static inline void netdev_tx_completed_queue(struct netdev_queue *dev_queue,
unsigned int pkts,
unsigned int bytes)
{}
static inline void netdev_tx_reset_queue(struct netdev_queue *q) {}
#endif
#if LINUX_VERSION_CODE < KERNEL_VERSION(5,2,0)
#define netdev_xmit_more() (0)
#endif
#if LINUX_VERSION_CODE < KERNEL_VERSION(5,8,0)
#define netif_testing_on(dev)
#define netif_testing_off(dev)
#endif
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32)
typedef int netdev_tx_t;
#endif
#if LINUX_VERSION_CODE < KERNEL_VERSION(5,12,0)
static inline bool dev_page_is_reusable(struct page *page)
{
return likely(page_to_nid(page) == numa_mem_id() &&
!page_is_pfmemalloc(page));
}
#endif
/*
#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,12,0)&& !defined(ENABLE_LIB_SUPPORT)
#define RTL_USE_NEW_INTR_API
#endif
*/
#if LINUX_VERSION_CODE < KERNEL_VERSION(4,10,0)
#define dma_map_page_attrs(dev, page, offset, size, dir, attrs) \
dma_map_page(dev, page, offset, size, dir)
#define dma_unmap_page_attrs(dev, page, size, dir, attrs) \
dma_unmap_page(dev, page, size, dir)
#endif //LINUX_VERSION_CODE < KERNEL_VERSION(4,10,0)
#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
#define page_ref_inc(page) atomic_inc(&page->_count)
#endif //LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
#if LINUX_VERSION_CODE < KERNEL_VERSION(4,4,216)
#define page_ref_count(page) atomic_read(&page->_count)
#endif //LINUX_VERSION_CODE < KERNEL_VERSION(4,4,216)
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)
#define skb_transport_offset(skb) (skb->h.raw - skb->data)
#endif
@ -147,10 +229,21 @@ do { \
#endif //LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0)
#define RTL_ALLOC_SKB_INTR(napi, length) dev_alloc_skb(length)
#define R8125_USE_NAPI_ALLOC_SKB 0
#ifdef CONFIG_R8125_NAPI
#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,19,0)
#undef RTL_ALLOC_SKB_INTR
#define RTL_ALLOC_SKB_INTR(napi, length) napi_alloc_skb(napi, length)
#undef R8125_USE_NAPI_ALLOC_SKB
#define R8125_USE_NAPI_ALLOC_SKB 1
#endif
#endif
#define RTL_BUILD_SKB_INTR(data, frag_size) build_skb(data, frag_size)
#ifdef CONFIG_R8125_NAPI
#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,12,0)
#undef RTL_BUILD_SKB_INTR
#define RTL_BUILD_SKB_INTR(data, frag_size) napi_build_skb(data, frag_size)
#endif
#endif
@ -176,6 +269,10 @@ do { \
#define ENABLE_R8125_PROCFS
#endif
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
#define ENABLE_R8125_SYSFS
#endif
#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
#define NETIF_F_HW_VLAN_RX NETIF_F_HW_VLAN_CTAG_RX
#define NETIF_F_HW_VLAN_TX NETIF_F_HW_VLAN_CTAG_TX
@ -334,7 +431,7 @@ do { \
#ifndef NET_IP_ALIGN
#define NET_IP_ALIGN 2
#endif
#define RTK_RX_ALIGN 8
#define R8125_RX_ALIGN NET_IP_ALIGN
#ifdef CONFIG_R8125_NAPI
#define NAPI_SUFFIX "-NAPI"
@ -367,12 +464,12 @@ do { \
#define RSS_SUFFIX ""
#endif
#define RTL8125_VERSION "9.009.02" NAPI_SUFFIX DASH_SUFFIX REALWOW_SUFFIX PTP_SUFFIX RSS_SUFFIX
#define RTL8125_VERSION "9.012.03" NAPI_SUFFIX DASH_SUFFIX REALWOW_SUFFIX PTP_SUFFIX RSS_SUFFIX
#define MODULENAME "r8125"
#define PFX MODULENAME ": "
#define GPL_CLAIM "\
r8125 Copyright (C) 2022 Realtek NIC software team <nicfae@realtek.com> \n \
r8125 Copyright (C) 2023 Realtek NIC software team <nicfae@realtek.com> \n \
This program comes with ABSOLUTELY NO WARRANTY; for details, please see <http://www.gnu.org/licenses/>. \n \
This is free software, and you are welcome to redistribute it under certain conditions; see <http://www.gnu.org/licenses/>. \n"
@ -417,7 +514,8 @@ This is free software, and you are welcome to redistribute it under certain cond
#endif
#define Reserved2_data 7
#define RX_DMA_BURST 7 /* Maximum PCI burst, '7' is unlimited */
#define RX_DMA_BURST_unlimited 7 /* Maximum PCI burst, '7' is unlimited */
#define RX_DMA_BURST_512 5
#define TX_DMA_BURST_unlimited 7
#define TX_DMA_BURST_1024 6
#define TX_DMA_BURST_512 5
@ -441,6 +539,8 @@ This is free software, and you are welcome to redistribute it under certain cond
#define RxEarly_off_V1 (0x07 << 11)
#define RxEarly_off_V2 (1 << 11)
#define Rx_Single_fetch_V2 (1 << 14)
#define Rx_Close_Multiple (1 << 21)
#define Rx_Fetch_Number_8 (1 << 30)
#define R8125_REGS_SIZE (256)
#define R8125_MAC_REGS_SIZE (256)
@ -451,8 +551,9 @@ This is free software, and you are welcome to redistribute it under certain cond
#define R8125_PCI_REGS_SIZE (0x100)
#define R8125_NAPI_WEIGHT 64
#define R8125_MAX_MSIX_VEC_8125A 4
#define R8125_MAX_MSIX_VEC_8125B 32
#define R8125_MIN_MSIX_VEC_8125B 17
#define R8125_MIN_MSIX_VEC_8125B 22
#define R8125_MAX_MSIX_VEC 32
#define R8125_MAX_RX_QUEUES_VEC_V3 (16)
@ -460,6 +561,8 @@ This is free software, and you are welcome to redistribute it under certain cond
#define RTL8125_LINK_TIMEOUT (1 * HZ)
#define RTL8125_ESD_TIMEOUT (2 * HZ)
#define rtl8125_rx_page_size(order) (PAGE_SIZE << order)
#define MAX_NUM_TX_DESC 1024 /* Maximum number of Tx descriptor registers */
#define MAX_NUM_RX_DESC 1024 /* Maximum number of Rx descriptor registers */
@ -469,7 +572,13 @@ This is free software, and you are welcome to redistribute it under certain cond
#define NUM_TX_DESC MAX_NUM_TX_DESC /* Number of Tx descriptor registers */
#define NUM_RX_DESC MAX_NUM_RX_DESC /* Number of Rx descriptor registers */
#define RX_BUF_SIZE 0x05F3 /* 0x05F3 = 1522bye + 1 */
#ifdef ENABLE_DOUBLE_VLAN
#define RX_BUF_SIZE 0x05F6 /* 0x05F6(1526) = 1514 + 8(double vlan) + 4(crc) bytes */
#define RT_VALN_HLEN 8 /* 8(double vlan) bytes */
#else
#define RX_BUF_SIZE 0x05F2 /* 0x05F2(1522) = 1514 + 4(single vlan) + 4(crc) bytes */
#define RT_VALN_HLEN 4 /* 4(single vlan) bytes */
#endif
#define R8125_MAX_TX_QUEUES (2)
#define R8125_MAX_RX_QUEUES (4)
@ -477,6 +586,11 @@ This is free software, and you are welcome to redistribute it under certain cond
#define OCP_STD_PHY_BASE 0xa400
//Channel Wait Count
#define R8125_CHANNEL_WAIT_COUNT (20000)
#define R8125_CHANNEL_WAIT_TIME (1) // 1us
#define R8125_CHANNEL_EXIT_DELAY_TIME (20) //20us
#ifdef ENABLE_LIB_SUPPORT
#define R8125_MULTI_RX_Q(tp) 0
#else
@ -548,17 +662,27 @@ This is free software, and you are welcome to redistribute it under certain cond
#ifndef ADVERTISED_2500baseX_Full
#define ADVERTISED_2500baseX_Full 0x8000
#endif
#define RTK_ADVERTISED_5000baseX_Full BIT(48)
#define RTK_ADVERTISE_2500FULL 0x80
#define RTK_ADVERTISE_5000FULL 0x100
#define RTK_ADVERTISE_10000FULL 0x1000
#define RTK_LPA_ADVERTISE_2500FULL 0x20
#define RTK_LPA_ADVERTISE_5000FULL 0x40
#define RTK_LPA_ADVERTISE_10000FULL 0x800
#define RTK_EEE_ADVERTISE_2500FULL 0x01
#define RTK_LPA_EEE_ADVERTISE_2500FULL 0x01
#define RTK_EEE_ADVERTISE_2500FULL BIT(0)
#define RTK_EEE_ADVERTISE_5000FULL BIT(1)
#define RTK_LPA_EEE_ADVERTISE_2500FULL BIT(0)
#define RTK_LPA_EEE_ADVERTISE_5000FULL BIT(1)
/* Tx NO CLOSE */
#define MAX_TX_NO_CLOSE_DESC_PTR_V2 0x10000
#define MAX_TX_NO_CLOSE_DESC_PTR_MASK_V2 0xFFFF
#define MAX_TX_NO_CLOSE_DESC_PTR_V3 0x100000000
#define MAX_TX_NO_CLOSE_DESC_PTR_MASK_V3 0xFFFFFFFF
#define MAX_TX_NO_CLOSE_DESC_PTR_V4 0x80000000
#define MAX_TX_NO_CLOSE_DESC_PTR_MASK_V4 0x7FFFFFFF
#define TX_NO_CLOSE_SW_PTR_MASK_V2 0x1FFFF
#ifndef ETH_MIN_MTU
@ -568,6 +692,7 @@ This is free software, and you are welcome to redistribute it under certain cond
#define D0_SPEED_UP_SPEED_DISABLE 0
#define D0_SPEED_UP_SPEED_1000 1
#define D0_SPEED_UP_SPEED_2500 2
#define D0_SPEED_UP_SPEED_5000 3
#define RTL8125_MAC_MCU_PAGE_SIZE 256 //256 words
@ -578,6 +703,10 @@ This is free software, and you are welcome to redistribute it under certain cond
#define READ_ONCE(var) (*((volatile typeof(var) *)(&(var))))
#endif
#ifndef SPEED_5000
#define SPEED_5000 5000
#endif
/*****************************************************************************/
//#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,3)
@ -1228,12 +1357,15 @@ enum RTL8125_registers {
IMR_V2_SET_REG_8125 = 0x0D0C,
TDU_STA_8125 = 0x0D08,
RDU_STA_8125 = 0x0D0A,
DOUBLE_VLAN_CONFIG = 0x1000,
TX_NEW_CTRL = 0x203E,
TNPDS_Q1_LOW_8125 = 0x2100,
PLA_TXQ0_IDLE_CREDIT = 0x2500,
PLA_TXQ1_IDLE_CREDIT = 0x2504,
SW_TAIL_PTR0_8125 = 0x2800,
HW_CLO_PTR0_8125 = 0x2802,
SW_TAIL_PTR0_8126 = 0x2800,
HW_CLO_PTR0_8126 = 0x2800,
RDSAR_Q1_LOW_8125 = 0x4000,
RSS_CTRL_8125 = 0x4500,
Q_NUM_CTRL_8125 = 0x4800,
@ -1247,12 +1379,26 @@ enum RTL8125_registers {
PTP_TIME_CORRECT_CMD_8125 = 0x6806,
PTP_SOFT_CONFIG_Time_NS_8125 = 0x6808,
PTP_SOFT_CONFIG_Time_S_8125 = 0x680C,
PTP_SOFT_CONFIG_Time_Sign = 0x6812,
PTP_LOCAL_Time_SUB_NS_8125 = 0x6814,
PTP_LOCAL_Time_NS_8125 = 0x6818,
PTP_LOCAL_Time_S_8125 = 0x681C,
PTP_Time_SHIFTER_S_8125 = 0x6856,
PPS_RISE_TIME_NS_8125 = 0x68A0,
PPS_RISE_TIME_S_8125 = 0x68A4,
PTP_EGRESS_TIME_BASE_NS_8125 = 0XCF20,
PTP_EGRESS_TIME_BASE_S_8125 = 0XCF24,
//TCAM
TCAM_NOTVALID_ADDR = 0xA000,
TCAM_VALID_ADDR = 0xA800,
TCAM_MAC_ADDR = 448,
TCAM_VLAN_TAG = 496,
//TCAM V2
TCAM_NOTVALID_ADDR_V2 = 0xA000,
TCAM_VALID_ADDR_V2 = 0xB000,
TCAM_MAC_ADDR_V2 = 0x00,
TCAM_VLAN_TAG_V2 = 0x03,
};
enum RTL8125_register_content {
@ -1381,6 +1527,7 @@ enum RTL8125_register_content {
/* rtl8125_PHYstatus */
PowerSaveStatus = 0x80,
_5000bpsF = 0x1000,
_2500bpsF = 0x400,
TxFlowCtrl = 0x40,
RxFlowCtrl = 0x20,
@ -1482,11 +1629,14 @@ enum RTL8125_register_content {
PTP_EXEC_CMD = (1 << 7),
PTP_ADJUST_TIME_NS_NEGATIVE = (1 << 30),
PTP_ADJUST_TIME_S_NEGATIVE = (1ULL << 48),
PTP_SOFT_CONFIG_TIME_NS_NEGATIVE = (1 << 30),
PTP_SOFT_CONFIG_TIME_S_NEGATIVE = (1ULL << 48),
/* New Interrupt Bits */
INT_CFG0_ENABLE_8125 = (1 << 0),
INT_CFG0_TIMEOUT0_BYPASS_8125 = (1 << 1),
INT_CFG0_MITIGATION_BYPASS_8125 = (1 << 2),
INT_CFG0_RDU_BYPASS_8126 = (1 << 4),
ISRIMR_V2_ROK_Q0 = (1 << 0),
ISRIMR_TOK_Q0 = (1 << 16),
ISRIMR_TOK_Q1 = (1 << 18),
@ -1626,7 +1776,18 @@ enum bits {
BIT_31 = (1 << 31)
};
enum effuse {
#define RTL8125_CP_NUM 4
#define RTL8125_MAX_SUPPORT_CP_LEN 110
enum rtl8125_cp_status {
rtl8125_cp_normal = 0,
rtl8125_cp_short,
rtl8125_cp_open,
rtl8125_cp_mismatch,
rtl8125_cp_unknown
};
enum efuse {
EFUSE_NOT_SUPPORT = 0,
EFUSE_SUPPORT_V1,
EFUSE_SUPPORT_V2,
@ -1725,6 +1886,8 @@ enum rx_desc_len {
struct ring_info {
struct sk_buff *skb;
u32 len;
unsigned int bytecount;
unsigned short gso_segs;
u8 __pad[sizeof(void *) - sizeof(u32)];
};
@ -1756,14 +1919,21 @@ enum r8125_flag {
R8125_FLAG_MAX
};
enum r8125_sysfs_flag {
R8125_SYSFS_RTL_ADV = 0,
R8125_SYSFS_FLAG_MAX
};
struct rtl8125_tx_ring {
void* priv;
struct net_device *netdev;
u32 index;
u32 cur_tx; /* Index into the Tx descriptor buffer of next Rx pkt. */
u32 dirty_tx;
u32 num_tx_desc; /* Number of Tx descriptor registers */
struct TxDesc *TxDescArray; /* 256-aligned Tx descriptor ring */
dma_addr_t TxPhyAddr;
u32 TxDescAllocSize;
struct ring_info tx_skb[MAX_NUM_TX_DESC]; /* Tx data buffers */
u32 NextHwDesCloPtr;
@ -1775,16 +1945,31 @@ struct rtl8125_tx_ring {
u16 tdsar_reg; /* Transmit Descriptor Start Address */
};
struct rtl8125_rx_buffer {
struct page *page;
u32 page_offset;
dma_addr_t dma;
void* data;
struct sk_buff *skb;
};
struct rtl8125_rx_ring {
void* priv;
struct net_device *netdev;
u32 index;
u32 cur_rx; /* Index into the Rx descriptor buffer of next Rx pkt. */
u32 dirty_rx;
u32 num_rx_desc; /* Number of Rx descriptor registers */
struct RxDesc *RxDescArray; /* 256-aligned Rx descriptor ring */
u32 RxDescAllocSize;
u64 RxDescPhyAddr[MAX_NUM_RX_DESC]; /* Rx desc physical address*/
dma_addr_t RxPhyAddr;
#ifdef ENABLE_PAGE_REUSE
struct rtl8125_rx_buffer rx_buffer[MAX_NUM_RX_DESC];
u16 rx_offset;
#else
struct sk_buff *Rx_skbuff[MAX_NUM_RX_DESC]; /* Rx data buffers */
#endif //ENABLE_PAGE_REUSE
u16 rdsar_reg; /* Receive Descriptor Start Address */
};
@ -2019,6 +2204,13 @@ enum rtl8125_fc_mode {
rtl8125_fc_default
};
enum rtl8125_state_t {
__RTL8125_TESTING = 0,
__RTL8125_RESETTING,
__RTL8125_DOWN,
__RTL8125_PTP_TX_IN_PROGRESS,
};
struct rtl8125_private {
void __iomem *mmio_addr; /* memory map physical address */
struct pci_dev *pci_dev; /* Index of PCI device */
@ -2028,11 +2220,11 @@ struct rtl8125_private {
unsigned int irq_nvecs;
unsigned int max_irq_nvecs;
unsigned int min_irq_nvecs;
unsigned int hw_supp_irq_nvecs;
//struct msix_entry msix_entries[R8125_MAX_MSIX_VEC];
struct net_device_stats stats; /* statistics of net device */
#ifdef ENABLE_PTP_SUPPORT
spinlock_t lock; /* spin lock flag */
#endif
unsigned long state;
u32 msg_enable;
u32 tx_tcp_csum_cmd;
u32 tx_udp_csum_cmd;
@ -2052,6 +2244,11 @@ struct rtl8125_private {
//struct sk_buff *Rx_skbuff[MAX_NUM_RX_DESC]; /* Rx data buffers */
//struct ring_info tx_skb[MAX_NUM_TX_DESC]; /* Tx data buffers */
unsigned rx_buf_sz;
#ifdef ENABLE_PAGE_REUSE
unsigned rx_buf_page_order;
unsigned rx_buf_page_size;
u32 page_reuse_fail_cnt;
#endif //ENABLE_PAGE_REUSE
u16 HwSuppNumTxQueues;
u16 HwSuppNumRxQueues;
unsigned int num_tx_rings;
@ -2059,7 +2256,7 @@ struct rtl8125_private {
struct rtl8125_tx_ring tx_ring[R8125_MAX_TX_QUEUES];
struct rtl8125_rx_ring rx_ring[R8125_MAX_RX_QUEUES];
#ifdef ENABLE_LIB_SUPPORT
struct atomic_notifier_head lib_nh;
struct blocking_notifier_head lib_nh;
struct rtl8125_ring lib_tx_ring[R8125_MAX_TX_QUEUES];
struct rtl8125_ring lib_rx_ring[R8125_MAX_RX_QUEUES];
#endif
@ -2069,6 +2266,7 @@ struct rtl8125_private {
unsigned int esd_flag;
unsigned int pci_cfg_is_read;
unsigned int rtl8125_rx_config;
u16 rms;
u16 cp_cmd;
u32 intr_mask;
u32 timer_intr_mask;
@ -2091,13 +2289,14 @@ struct rtl8125_private {
u8 autoneg;
u8 duplex;
u32 speed;
u32 advertising;
u64 advertising;
enum rtl8125_fc_mode fcpause;
u32 HwSuppMaxPhyLinkSpeed;
u16 eeprom_len;
u16 cur_page;
u32 bios_setting;
int (*set_speed)(struct net_device *, u8 autoneg, u32 speed, u8 duplex, u32 adv);
int (*set_speed)(struct net_device *, u8 autoneg, u32 speed, u8 duplex, u64 adv);
#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
void (*get_settings)(struct net_device *, struct ethtool_cmd *);
#else
@ -2124,7 +2323,7 @@ struct rtl8125_private {
u8 org_pci_offset_80;
u8 org_pci_offset_81;
u8 use_timer_interrrupt;
u8 use_timer_interrupt;
u32 keep_intr_cnt;
@ -2136,17 +2335,12 @@ struct rtl8125_private {
u16 sw_ram_code_ver;
u16 hw_ram_code_ver;
u8 RequireRduNonStopPatch;
u8 rtk_enable_diag;
u8 ShortPacketSwChecksum;
u8 UseSwPaddingShortPkt;
void *ShortPacketEmptyBuffer;
dma_addr_t ShortPacketEmptyBufferPhy;
u8 RequireAdcBiasPatch;
u16 AdcBiasPatchIoffset;
@ -2182,6 +2376,7 @@ struct rtl8125_private {
u32 HwPcieSNOffset;
u32 MaxTxDescPtrMask;
u8 HwSuppTxNoCloseVer;
u8 EnableTxNoClose;
@ -2298,6 +2493,13 @@ struct rtl8125_private {
#ifdef ENABLE_R8125_PROCFS
//Procfs support
struct proc_dir_entry *proc_dir;
struct proc_dir_entry *proc_dir_debug;
struct proc_dir_entry *proc_dir_test;
#endif
#ifdef ENABLE_R8125_SYSFS
//sysfs support
DECLARE_BITMAP(sysfs_flag, R8125_SYSFS_FLAG_MAX);
u32 testmode;
#endif
u8 InitRxDescType;
u16 RxDescLength; //V1 16 Byte V2 32 Bytes
@ -2305,7 +2507,6 @@ struct rtl8125_private {
u8 HwSuppPtpVer;
u8 EnablePtp;
u8 ptp_master_mode;
s64 ptp_adjust;
#ifdef ENABLE_PTP_SUPPORT
u32 tx_hwtstamp_timeouts;
u32 tx_hwtstamp_skipped;
@ -2330,6 +2531,13 @@ struct rtl8125_private {
u8 HwSuppMacMcuVer;
u16 MacMcuPageSize;
u8 HwSuppTcamVer;
u16 TcamNotValidReg;
u16 TcamValidReg;
u16 TcamMaAddrcOffset;
u16 TcamVlanTagOffset;
};
#ifdef ENABLE_LIB_SUPPORT
@ -2383,6 +2591,11 @@ rtl8125_tot_rx_rings(struct rtl8125_private *tp)
return tp->num_rx_rings + rtl8125_num_lib_rx_rings(tp);
}
static inline struct netdev_queue *txring_txq(const struct rtl8125_tx_ring *ring)
{
return netdev_get_tx_queue(ring->netdev, ring->index);
}
enum eetype {
EEPROM_TYPE_NONE=0,
EEPROM_TYPE_93C46,
@ -2397,6 +2610,9 @@ enum mcfg {
CFG_METHOD_5,
CFG_METHOD_6,
CFG_METHOD_7,
CFG_METHOD_8,
CFG_METHOD_9,
CFG_METHOD_10,
CFG_METHOD_DEFAULT,
CFG_METHOD_MAX
};
@ -2431,6 +2647,9 @@ enum mcfg {
#define NIC_RAMCODE_VERSION_CFG_METHOD_3 (0x0b33)
#define NIC_RAMCODE_VERSION_CFG_METHOD_4 (0x0b17)
#define NIC_RAMCODE_VERSION_CFG_METHOD_5 (0x0b74)
#define NIC_RAMCODE_VERSION_CFG_METHOD_8 (0x0023)
#define NIC_RAMCODE_VERSION_CFG_METHOD_9 (0x0033)
#define NIC_RAMCODE_VERSION_CFG_METHOD_10 (0x0001)
//hwoptimize
#define HW_PATCH_SOC_LAN (BIT_0)
@ -2446,13 +2665,12 @@ u32 rtl8125_mdio_prot_read(struct rtl8125_private *tp, u32 RegAddr);
u32 rtl8125_mdio_prot_direct_read_phy_ocp(struct rtl8125_private *tp, u32 RegAddr);
void rtl8125_ephy_write(struct rtl8125_private *tp, int RegAddr, int value);
void rtl8125_mac_ocp_write(struct rtl8125_private *tp, u16 reg_addr, u16 value);
u32 rtl8125_mac_ocp_read(struct rtl8125_private *tp, u16 reg_addr);
u16 rtl8125_mac_ocp_read(struct rtl8125_private *tp, u16 reg_addr);
void rtl8125_clear_eth_phy_bit(struct rtl8125_private *tp, u8 addr, u16 mask);
void rtl8125_set_eth_phy_bit(struct rtl8125_private *tp, u8 addr, u16 mask);
void rtl8125_ocp_write(struct rtl8125_private *tp, u16 addr, u8 len, u32 data);
void rtl8125_oob_notify(struct rtl8125_private *tp, u8 cmd);
void rtl8125_init_ring_indexes(struct rtl8125_private *tp);
int rtl8125_eri_write(struct rtl8125_private *tp, int addr, int len, u32 value, int type);
void rtl8125_oob_mutex_lock(struct rtl8125_private *tp);
u32 rtl8125_ocp_read(struct rtl8125_private *tp, u16 addr, u8 len);
u32 rtl8125_ocp_read_with_oob_base_address(struct rtl8125_private *tp, u16 addr, u8 len, u32 base_address);
@ -2511,6 +2729,7 @@ void rtl8125_hw_config(struct net_device *dev);
void rtl8125_hw_set_timer_int_8125(struct rtl8125_private *tp, u32 message_id, u8 timer_intmiti_val);
void rtl8125_set_rx_q_num(struct rtl8125_private *tp, unsigned int num_rx_queues);
void rtl8125_set_tx_q_num(struct rtl8125_private *tp, unsigned int num_tx_queues);
void rtl8125_enable_mcu(struct rtl8125_private *tp, bool enable);
void rtl8125_hw_start(struct net_device *dev);
void rtl8125_hw_reset(struct net_device *dev);
void rtl8125_tx_clear(struct rtl8125_private *tp);
@ -2519,6 +2738,8 @@ int rtl8125_init_ring(struct net_device *dev);
void rtl8125_hw_set_rx_packet_filter(struct net_device *dev);
void rtl8125_enable_hw_linkchg_interrupt(struct rtl8125_private *tp);
int rtl8125_dump_tally_counter(struct rtl8125_private *tp, dma_addr_t paddr);
void rtl8125_enable_napi(struct rtl8125_private *tp);
void _rtl8125_wait_for_quiescence(struct net_device *dev);
#ifndef ENABLE_LIB_SUPPORT
static inline void rtl8125_lib_reset_prepare(struct rtl8125_private *tp) { }
@ -2529,6 +2750,11 @@ static inline void rtl8125_lib_reset_complete(struct rtl8125_private *tp) { }
#define HW_HAS_WRITE_PHY_MCU_RAM_CODE(_M) (((_M)->HwHasWrRamCodeToMicroP == TRUE) ? 1 : 0)
#define HW_SUPPORT_D0_SPEED_UP(_M) ((_M)->HwSuppD0SpeedUpVer > 0)
#define HW_SUPPORT_MAC_MCU(_M) ((_M)->HwSuppMacMcuVer > 0)
#define HW_SUPPORT_TCAM(_M) ((_M)->HwSuppTcamVer > 0)
#define HW_SUPP_PHY_LINK_SPEED_GIGA(_M) ((_M)->HwSuppMaxPhyLinkSpeed >= 1000)
#define HW_SUPP_PHY_LINK_SPEED_2500M(_M) ((_M)->HwSuppMaxPhyLinkSpeed >= 2500)
#define HW_SUPP_PHY_LINK_SPEED_5000M(_M) ((_M)->HwSuppMaxPhyLinkSpeed >= 5000)
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)
#define netdev_mc_count(dev) ((dev)->mc_count)

View File

@ -2,10 +2,10 @@
/*
################################################################################
#
# r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet
# r8125 is the Linux device driver released for Realtek 2.5/5 Gigabit Ethernet
# controllers with PCI-Express interface.
#
# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free

View File

@ -2,10 +2,10 @@
/*
################################################################################
#
# r8168 is the Linux device driver released for Realtek Gigabit Ethernet
# r8125 is the Linux device driver released for Realtek 2.5/5 Gigabit Ethernet
# controllers with PCI-Express interface.
#
# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free

View File

@ -2,10 +2,10 @@
/*
################################################################################
#
# r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet
# r8125 is the Linux device driver released for Realtek 2.5/5 Gigabit Ethernet
# controllers with PCI-Express interface.
#
# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free

7902
r8125_n.c

File diff suppressed because it is too large Load Diff

View File

@ -2,10 +2,10 @@
/*
################################################################################
#
# r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet
# r8125 is the Linux device driver released for Realtek 2.5/5 Gigabit Ethernet
# controllers with PCI-Express interface.
#
# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free
@ -40,6 +40,7 @@
#include <linux/mii.h>
#include <linux/in.h>
#include <linux/ethtool.h>
#include <linux/rtnetlink.h>
#include "r8125.h"
#include "r8125_ptp.h"
@ -63,8 +64,7 @@ static int _rtl8125_phc_gettime(struct rtl8125_private *tp, struct timespec64 *t
/* nanoseconds */
//0x6808[29:0]
ts64->tv_nsec = (RTL_R32(tp, PTP_SOFT_CONFIG_Time_NS_8125) & 0x3fffffff) +
tp->ptp_adjust;
ts64->tv_nsec = (RTL_R32(tp, PTP_SOFT_CONFIG_Time_NS_8125) & 0x3fffffff);
/* seconds */
//0x680C[47:0]
@ -92,18 +92,38 @@ static int _rtl8125_phc_settime(struct rtl8125_private *tp, const struct timespe
return 0;
}
#if 0
static int _rtl8125_phc_adjtime(struct rtl8125_private *tp, s64 delta)
{
struct timespec64 now, then = ns_to_timespec64(delta);
struct timespec64 d;
bool negative = false;
u64 tohw;
u32 nsec;
u64 sec;
_rtl8125_phc_gettime(tp, &now);
now = timespec64_add(now, then);
if (delta < 0) {
negative = true;
tohw = -delta;
} else {
tohw = delta;
}
nsec = now.tv_nsec & 0x3fffffff;
sec = now.tv_sec & 0x0000ffffffffffff;
d = ns_to_timespec64(tohw);
nsec = d.tv_nsec;
sec = d.tv_sec;
if (negative) {
nsec = -nsec;
sec = -sec;
}
nsec &= 0x3fffffff;
sec &= 0x0000ffffffffffff;
if (negative) {
nsec |= PTP_SOFT_CONFIG_TIME_NS_NEGATIVE;
sec |= PTP_SOFT_CONFIG_TIME_S_NEGATIVE;
}
/* nanoseconds */
//0x6808[29:0]
@ -120,24 +140,22 @@ static int _rtl8125_phc_adjtime(struct rtl8125_private *tp, s64 delta)
return 0;
}
#endif
static int rtl8125_phc_adjtime(struct ptp_clock_info *ptp, s64 delta)
{
struct rtl8125_private *tp = container_of(ptp, struct rtl8125_private, ptp_clock_info);
unsigned long flags;
//int ret = 0;
int ret;
//netif_info(tp, drv, tp->dev, "phc adjust time\n");
spin_lock_irqsave(&tp->lock, flags);
//ret = _rtl8125_phc_adjtime(tp, delta);
tp->ptp_adjust += delta;
spin_unlock_irqrestore(&tp->lock, flags);
rtnl_lock();
ret = _rtl8125_phc_adjtime(tp, delta);
rtnl_unlock();
return 0;
return ret;
}
#if LINUX_VERSION_CODE < KERNEL_VERSION(6,2,0)
/*
1ppm means every 125MHz plus 125Hz. It also means every 8ns minus 8ns*10^(-6)
@ -194,18 +212,18 @@ static int rtl8125_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta)
return 0;
}
#endif //LINUX_VERSION_CODE < KERNEL_VERSION(6,2,0)
static int rtl8125_phc_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts64)
{
struct rtl8125_private *tp = container_of(ptp, struct rtl8125_private, ptp_clock_info);
unsigned long flags;
int ret;
//netif_info(tp, drv, tp->dev, "phc get ts\n");
spin_lock_irqsave(&tp->lock, flags);
rtnl_lock();
ret = _rtl8125_phc_gettime(tp, ts64);
spin_unlock_irqrestore(&tp->lock, flags);
rtnl_unlock();
return ret;
}
@ -214,15 +232,13 @@ static int rtl8125_phc_settime(struct ptp_clock_info *ptp,
const struct timespec64 *ts64)
{
struct rtl8125_private *tp = container_of(ptp, struct rtl8125_private, ptp_clock_info);
unsigned long flags;
int ret;
//netif_info(tp, drv, tp->dev, "phc set ts\n");
spin_lock_irqsave(&tp->lock, flags);
rtnl_lock();
ret = _rtl8125_phc_settime(tp, ts64);
tp->ptp_adjust = 0;
spin_unlock_irqrestore(&tp->lock, flags);
rtnl_unlock();
return ret;
}
@ -231,14 +247,13 @@ static int rtl8125_phc_enable(struct ptp_clock_info *ptp,
struct ptp_clock_request *rq, int on)
{
struct rtl8125_private *tp = container_of(ptp, struct rtl8125_private, ptp_clock_info);
unsigned long flags;
u16 ptp_ctrl;
//netif_info(tp, drv, tp->dev, "phc enable type %x on %d\n", rq->type, on);
switch (rq->type) {
case PTP_CLK_REQ_PPS:
spin_lock_irqsave(&tp->lock, flags);
rtnl_lock();
ptp_ctrl = RTL_R16(tp, PTP_CTRL_8125);
ptp_ctrl &= ~BIT_15;
if (on)
@ -246,7 +261,7 @@ static int rtl8125_phc_enable(struct ptp_clock_info *ptp,
else
ptp_ctrl &= ~BIT_14;
RTL_W16(tp, PTP_CTRL_8125, ptp_ctrl);
spin_unlock_irqrestore(&tp->lock, flags);
rtnl_unlock();
return 0;
default:
return -EOPNOTSUPP;
@ -296,16 +311,34 @@ static const struct ptp_clock_info rtl_ptp_clock_info = {
.n_per_out = 0,
.n_pins = 0,
.pps = 1,
#if LINUX_VERSION_CODE < KERNEL_VERSION(6,2,0)
.adjfreq = rtl8125_phc_adjfreq,
#endif //LINUX_VERSION_CODE < KERNEL_VERSION(6,2,0)
.adjtime = rtl8125_phc_adjtime,
.gettime64 = rtl8125_phc_gettime,
.settime64 = rtl8125_phc_settime,
.enable = rtl8125_phc_enable,
};
static int rtl8125_get_tx_ptp_pkt_tstamp(struct rtl8125_private *tp, struct timespec64 *ts64)
static int rtl8125_ptp_egresstime(struct rtl8125_private *tp, struct timespec64 *ts64, u32 regnum)
{
return _rtl8125_phc_gettime(tp, ts64);
/* nanoseconds */
//[29:0]
ts64->tv_nsec = rtl8125_mac_ocp_read(tp, PTP_EGRESS_TIME_BASE_NS_8125 + regnum * 16 + 2);
ts64->tv_nsec <<= 16;
ts64->tv_nsec |= rtl8125_mac_ocp_read(tp, PTP_EGRESS_TIME_BASE_NS_8125 + regnum * 16);
ts64->tv_nsec &= 0x3fffffff;
/* seconds */
//[47:0]
ts64->tv_sec = rtl8125_mac_ocp_read(tp, PTP_EGRESS_TIME_BASE_S_8125 + regnum * 16 + 4);
ts64->tv_sec <<= 16;
ts64->tv_sec |= rtl8125_mac_ocp_read(tp, PTP_EGRESS_TIME_BASE_S_8125 + regnum * 16 + 2);
ts64->tv_sec <<= 16;
ts64->tv_sec |= rtl8125_mac_ocp_read(tp, PTP_EGRESS_TIME_BASE_S_8125 + regnum * 16);
ts64->tv_sec &= 0x0000ffffffffffff;
return 0;
}
static void rtl8125_ptp_tx_hwtstamp(struct rtl8125_private *tp)
@ -313,10 +346,18 @@ static void rtl8125_ptp_tx_hwtstamp(struct rtl8125_private *tp)
struct sk_buff *skb = tp->ptp_tx_skb;
struct skb_shared_hwtstamps shhwtstamps = {0};
struct timespec64 ts64;
u32 regnum;
RTL_W8(tp, PTP_ISR_8125, PTP_ISR_TOK | PTP_ISR_TER);
rtl8125_get_tx_ptp_pkt_tstamp(tp, &ts64);
//IO 0x2302 bit 10~11 WR_PTR
regnum = RTL_R16(tp, 0x2032) & 0x0C00;
regnum >>= 10;
regnum = (regnum + 3) % 4;
rtnl_lock();
rtl8125_ptp_egresstime(tp, &ts64, regnum);
rtnl_unlock();
/* Upper 32 bits contain s, lower 32 bits contain ns. */
shhwtstamps.hwtstamp = ktime_set(ts64.tv_sec,
@ -328,6 +369,7 @@ static void rtl8125_ptp_tx_hwtstamp(struct rtl8125_private *tp)
* while we're notifying the stack.
*/
tp->ptp_tx_skb = NULL;
clear_bit_unlock(__RTL8125_PTP_TX_IN_PROGRESS, &tp->state);
/* Notify the stack and free the skb after we've unlocked */
skb_tstamp_tx(skb, &shhwtstamps);
@ -339,23 +381,21 @@ static void rtl8125_ptp_tx_work(struct work_struct *work)
{
struct rtl8125_private *tp = container_of(work, struct rtl8125_private,
ptp_tx_work);
unsigned long flags;
spin_lock_irqsave(&tp->lock, flags);
if (!tp->ptp_tx_skb)
goto Exit;
return;
if (time_is_before_jiffies(tp->ptp_tx_start +
RTL8125_PTP_TX_TIMEOUT)) {
dev_kfree_skb_any(tp->ptp_tx_skb);
tp->ptp_tx_skb = NULL;
clear_bit_unlock(__RTL8125_PTP_TX_IN_PROGRESS, &tp->state);
tp->tx_hwtstamp_timeouts++;
/* Clear the tx valid bit in TSYNCTXCTL register to enable
* interrupt
*/
RTL_W8(tp, PTP_ISR_8125, PTP_ISR_TOK | PTP_ISR_TER);
goto Exit;
return;
}
if (RTL_R8(tp, PTP_ISR_8125) & (PTP_ISR_TOK))
@ -364,8 +404,6 @@ static void rtl8125_ptp_tx_work(struct work_struct *work)
/* reschedule to check later */
schedule_work(&tp->ptp_tx_work);
Exit:
spin_unlock_irqrestore(&tp->lock, flags);
}
static int rtl8125_hwtstamp_enable(struct rtl8125_private *tp, bool enable)
@ -380,11 +418,9 @@ static int rtl8125_hwtstamp_enable(struct rtl8125_private *tp, bool enable)
//ptp source 0:gphy 1:mac
rtl8125_mac_ocp_write(tp, 0xDC00, rtl8125_mac_ocp_read(tp, 0xDC00) | BIT_6);
//enable ptp
ptp_ctrl = (BIT_0 | BIT_3 | BIT_4 | BIT_6 | BIT_10 | BIT_12 | BIT_13);
if (tp->ptp_master_mode) {
ptp_ctrl &= ~BIT_13;
ptp_ctrl = (BIT_0 | BIT_3 | BIT_4 | BIT_6 | BIT_10 | BIT_12);
if (tp->ptp_master_mode)
ptp_ctrl |= BIT_1;
}
RTL_W16(tp, PTP_CTRL_8125, ptp_ctrl);
//set system time
@ -393,9 +429,7 @@ static int rtl8125_hwtstamp_enable(struct rtl8125_private *tp, bool enable)
_rtl8125_phc_settime(tp, timespec64_to_timespec(ts64));
*/
ktime_get_real_ts64(&ts64);
ts64.tv_nsec += tp->ptp_adjust;
_rtl8125_phc_settime(tp, &ts64);
tp->ptp_adjust = 0;
}
return 0;
@ -449,8 +483,6 @@ void rtl8125_ptp_init(struct rtl8125_private *tp)
/* we have a clock so we can initialize work now */
INIT_WORK(&tp->ptp_tx_work, rtl8125_ptp_tx_work);
tp->ptp_adjust = 0;
/* reset the PTP related hardware bits */
rtl8125_ptp_reset(tp);
@ -552,24 +584,17 @@ static int rtl8125_get_tstamp(struct net_device *netdev, struct ifreq *ifr)
int rtl8125_ptp_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
{
struct rtl8125_private *tp = netdev_priv(netdev);
int ret;
unsigned long flags;
//netif_info(tp, drv, tp->dev, "ptp ioctl\n");
ret = 0;
switch (cmd) {
#ifdef ENABLE_PTP_SUPPORT
case SIOCSHWTSTAMP:
spin_lock_irqsave(&tp->lock, flags);
ret = rtl8125_set_tstamp(netdev, ifr);
spin_unlock_irqrestore(&tp->lock, flags);
break;
case SIOCGHWTSTAMP:
spin_lock_irqsave(&tp->lock, flags);
ret = rtl8125_get_tstamp(netdev, ifr);
spin_unlock_irqrestore(&tp->lock, flags);
break;
#endif
default:
@ -588,7 +613,7 @@ void rtl8125_rx_ptp_pktstamp(struct rtl8125_private *tp, struct sk_buff *skb,
tv_sec = le32_to_cpu(descv3->RxDescTimeStamp.TimeStampHigh) +
((u64)le32_to_cpu(descv3->RxDescPTPDDWord4.TimeStampHHigh) << 32);
tv_nsec = le32_to_cpu(descv3->RxDescTimeStamp.TimeStampLow) + tp->ptp_adjust;
tv_nsec = le32_to_cpu(descv3->RxDescTimeStamp.TimeStampLow);
skb_hwtstamps(skb)->hwtstamp = ktime_set(tv_sec, tv_nsec);
}

View File

@ -2,10 +2,10 @@
/*
################################################################################
#
# r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet
# r8125 is the Linux device driver released for Realtek 2.5/5 Gigabit Ethernet
# controllers with PCI-Express interface.
#
# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free

View File

@ -2,10 +2,10 @@
/*
################################################################################
#
# r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet
# r8125 is the Linux device driver released for Realtek 2.5/5 Gigabit Ethernet
# controllers with PCI-Express interface.
#
# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free

View File

@ -2,10 +2,10 @@
/*
################################################################################
#
# r8168 is the Linux device driver released for Realtek Gigabit Ethernet
# r8125 is the Linux device driver released for Realtek 2.5/5 Gigabit Ethernet
# controllers with PCI-Express interface.
#
# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free
@ -41,9 +41,12 @@ enum rtl8125_rss_register_content {
RSS_CTRL_IPV4_SUPP = (1 << 1),
RSS_CTRL_TCP_IPV6_SUPP = (1 << 2),
RSS_CTRL_IPV6_SUPP = (1 << 3),
RSS_CTRL_IPV6_EXT_SUPP = (1 << 4),
RSS_CTRL_TCP_IPV6_EXT_SUPP = (1 << 5),
RSS_HALF_SUPP = (1 << 7),
RSS_CTRL_UDP_IPV4_SUPP = (1 << 11),
RSS_CTRL_UDP_IPV6_SUPP = (1 << 12),
RSS_CTRL_UDP_IPV6_EXT_SUPP = (1 << 13),
RSS_QUAD_CPU_EN = (1 << 16),
RSS_HQ_Q_SUP_R = (1 << 31),
};
@ -88,7 +91,7 @@ int rtl8125_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
struct rtl8125_private *tp = netdev_priv(dev);
int ret = -EOPNOTSUPP;
//netif_info(tp, drv, tp->dev, "rss get rxnfc\n");
netif_info(tp, drv, tp->dev, "rss get rxnfc\n");
if (!(dev->features & NETIF_F_RXHASH))
return ret;
@ -131,13 +134,16 @@ static int _rtl8125_set_rss_hash_opt(struct rtl8125_private *tp)
rss_ctrl |= RSS_CTRL_TCP_IPV4_SUPP
| RSS_CTRL_IPV4_SUPP
| RSS_CTRL_IPV6_SUPP
| RSS_CTRL_TCP_IPV6_SUPP;
| RSS_CTRL_IPV6_EXT_SUPP
| RSS_CTRL_TCP_IPV6_SUPP
| RSS_CTRL_TCP_IPV6_EXT_SUPP;
if (rss_flags & RTL_8125_RSS_FLAG_HASH_UDP_IPV4)
rss_ctrl |= RSS_CTRL_UDP_IPV4_SUPP;
if (rss_flags & RTL_8125_RSS_FLAG_HASH_UDP_IPV6)
rss_ctrl |= RSS_CTRL_UDP_IPV6_SUPP;
rss_ctrl |= RSS_CTRL_UDP_IPV6_SUPP |
RSS_CTRL_UDP_IPV6_EXT_SUPP;
hash_mask_len = ilog2(rtl8125_rss_indir_tbl_entries(tp));
hash_mask_len &= (BIT_0 | BIT_1 | BIT_2);
@ -153,7 +159,7 @@ static int rtl8125_set_rss_hash_opt(struct rtl8125_private *tp,
{
u32 rss_flags = tp->rss_flags;
//netif_info(tp, drv, tp->dev, "rss set hash\n");
netif_info(tp, drv, tp->dev, "rss set hash\n");
/*
* RSS does not support anything other than hashing
@ -239,16 +245,20 @@ static int rtl8125_set_rss_hash_opt(struct rtl8125_private *tp,
rss_ctrl |= RSS_CTRL_TCP_IPV4_SUPP
| RSS_CTRL_IPV4_SUPP
| RSS_CTRL_IPV6_SUPP
| RSS_CTRL_TCP_IPV6_SUPP;
| RSS_CTRL_IPV6_EXT_SUPP
| RSS_CTRL_TCP_IPV6_SUPP
| RSS_CTRL_TCP_IPV6_EXT_SUPP;
rss_ctrl &= ~(RSS_CTRL_UDP_IPV4_SUPP |
RSS_CTRL_UDP_IPV6_SUPP);
RSS_CTRL_UDP_IPV6_SUPP |
RSS_CTRL_UDP_IPV6_EXT_SUPP);
if (rss_flags & RTL_8125_RSS_FLAG_HASH_UDP_IPV4)
rss_ctrl |= RSS_CTRL_UDP_IPV4_SUPP;
if (rss_flags & RTL_8125_RSS_FLAG_HASH_UDP_IPV6)
rss_ctrl |= RSS_CTRL_UDP_IPV6_SUPP;
rss_ctrl |= RSS_CTRL_UDP_IPV6_SUPP |
RSS_CTRL_UDP_IPV6_EXT_SUPP;
RTL_W32(tp, RSS_CTRL_8125, rss_ctrl);
}
@ -261,7 +271,7 @@ int rtl8125_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
struct rtl8125_private *tp = netdev_priv(dev);
int ret = -EOPNOTSUPP;
//netif_info(tp, drv, tp->dev, "rss set rxnfc\n");
netif_info(tp, drv, tp->dev, "rss set rxnfc\n");
if (!(dev->features & NETIF_F_RXHASH))
return ret;
@ -286,7 +296,7 @@ u32 rtl8125_get_rxfh_key_size(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
//netif_info(tp, drv, tp->dev, "rss get key size\n");
netif_info(tp, drv, tp->dev, "rss get key size\n");
if (!(dev->features & NETIF_F_RXHASH))
return 0;
@ -298,7 +308,7 @@ u32 rtl8125_rss_indir_size(struct net_device *dev)
{
struct rtl8125_private *tp = netdev_priv(dev);
//netif_info(tp, drv, tp->dev, "rss get indir tbl size\n");
netif_info(tp, drv, tp->dev, "rss get indir tbl size\n");
if (!(dev->features & NETIF_F_RXHASH))
return 0;
@ -319,7 +329,7 @@ int rtl8125_get_rxfh(struct net_device *dev, u32 *indir, u8 *key,
{
struct rtl8125_private *tp = netdev_priv(dev);
//netif_info(tp, drv, tp->dev, "rss get rxfh\n");
netif_info(tp, drv, tp->dev, "rss get rxfh\n");
if (!(dev->features & NETIF_F_RXHASH))
return -EOPNOTSUPP;
@ -331,7 +341,7 @@ int rtl8125_get_rxfh(struct net_device *dev, u32 *indir, u8 *key,
rtl8125_get_reta(tp, indir);
if (key)
memcpy(key, tp->rss_key, rtl8125_get_rxfh_key_size(dev));
memcpy(key, tp->rss_key, RTL8125_RSS_KEY_SIZE);
return 0;
}
@ -383,7 +393,7 @@ int rtl8125_set_rxfh(struct net_device *dev, const u32 *indir,
int i;
u32 reta_entries = rtl8125_rss_indir_tbl_entries(tp);
//netif_info(tp, drv, tp->dev, "rss set rxfh\n");
netif_info(tp, drv, tp->dev, "rss set rxfh\n");
/* We require at least one supported parameter to be changed and no
* change in any of the unsupported parameters
@ -406,7 +416,7 @@ int rtl8125_set_rxfh(struct net_device *dev, const u32 *indir,
/* Fill out the rss hash key */
if (key)
memcpy(tp->rss_key, key, rtl8125_get_rxfh_key_size(dev));
memcpy(tp->rss_key, key, RTL8125_RSS_KEY_SIZE);
rtl8125_store_reta(tp);

View File

@ -2,10 +2,10 @@
/*
################################################################################
#
# r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet
# r8125 is the Linux device driver released for Realtek 2.5/5 Gigabit Ethernet
# controllers with PCI-Express interface.
#
# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free

View File

@ -2,10 +2,10 @@
/*
################################################################################
#
# r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet
# r8125 is the Linux device driver released for Realtek 2.5/5 Gigabit Ethernet
# controllers with PCI-Express interface.
#
# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free

View File

@ -2,10 +2,10 @@
/*
################################################################################
#
# r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet
# r8125 is the Linux device driver released for Realtek 2.5/5 Gigabit Ethernet
# controllers with PCI-Express interface.
#
# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free

View File

@ -2,10 +2,10 @@
/*
################################################################################
#
# r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet
# r8125 is the Linux device driver released for Realtek 2.5/5 Gigabit Ethernet
# controllers with PCI-Express interface.
#
# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free

View File

@ -2,10 +2,10 @@
/*
################################################################################
#
# r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet
# r8125 is the Linux device driver released for Realtek 2.5/5 Gigabit Ethernet
# controllers with PCI-Express interface.
#
# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved.
# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free