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a64459c42d
This patch adds required definitions and structures for clockdomain initialization, so omap3xxx_clockdomains_init() was substituted by new ti81xx_clockdomains_init() while early initialization of TI81XX platform. Note that we now need to have 81xx in a separate CONFIG_SOC_TI81XX block instead inside the ifdef block for omap3 to avoid make randconfig build errors. This code is based on the TI81XX-LINUX-PSP-04.04.00.02 patches published at: http://downloads.ti.com/dsps/dsps_public_sw/psp/LinuxPSP/TI81XX_04_04/04_04_00_02/index_FDS.html Cc: Brian Hutchinson <b.hutchman@gmail.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Aida Mynzhasova <aida.mynzhasova@skitlab.ru> [tony@atomide.com: updated to apply, renamed to clockdomains81xx.c, fixed to use am33xx_clkdm_operations, various fixes suggested by Paul Walmsley] Reviewed-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
62 lines
1.9 KiB
C
62 lines
1.9 KiB
C
/*
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* Clock domain register offsets for TI81XX.
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*
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* Copyright (C) 2010 Texas Instruments, Inc. - http://www.ti.com/
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* Copyright (C) 2013 SKTB SKiT, http://www.skitlab.ru/
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __ARCH_ARM_MACH_OMAP2_CM_TI81XX_H
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#define __ARCH_ARM_MACH_OMAP2_CM_TI81XX_H
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/* TI81XX common CM module offsets */
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#define TI81XX_CM_ALWON_MOD 0x1400 /* 1KB */
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/* TI816X CM module offsets */
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#define TI816X_CM_ACTIVE_MOD 0x0400 /* 256B */
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#define TI816X_CM_DEFAULT_MOD 0x0500 /* 256B */
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#define TI816X_CM_IVAHD0_MOD 0x0600 /* 256B */
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#define TI816X_CM_IVAHD1_MOD 0x0700 /* 256B */
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#define TI816X_CM_IVAHD2_MOD 0x0800 /* 256B */
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#define TI816X_CM_SGX_MOD 0x0900 /* 256B */
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/* ALWON */
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#define TI81XX_CM_ALWON_L3_SLOW_CLKDM 0x0000
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#define TI81XX_CM_ALWON_L3_MED_CLKDM 0x0004
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#define TI81XX_CM_ETHERNET_CLKDM 0x0004
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#define TI81XX_CM_MMU_CLKDM 0x000C
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#define TI81XX_CM_MMUCFG_CLKDM 0x0010
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#define TI81XX_CM_ALWON_MPU_CLKDM 0x001C
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#define TI81XX_CM_ALWON_L3_FAST_CLKDM 0x0030
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/* ACTIVE */
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#define TI816X_CM_ACTIVE_GEM_CLKDM 0x0000
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/* IVAHD0 */
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#define TI816X_CM_IVAHD0_CLKDM 0x0000
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/* IVAHD1 */
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#define TI816X_CM_IVAHD1_CLKDM 0x0000
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/* IVAHD2 */
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#define TI816X_CM_IVAHD2_CLKDM 0x0000
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/* SGX */
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#define TI816X_CM_SGX_CLKDM 0x0000
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/* DEFAULT */
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#define TI816X_CM_DEFAULT_L3_MED_CLKDM 0x0004
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#define TI816X_CM_DEFAULT_PCI_CLKDM 0x0010
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#define TI816X_CM_DEFAULT_L3_SLOW_CLKDM 0x0014
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#define TI816X_CM_DEFAULT_DUCATI_CLKDM 0x0018
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#endif
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