mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-24 16:01:14 +07:00
3190ca3b5f
Don't export __bcm_phy_enable_rdb_access() and
__bcm_phy_enable_legacy_access() functions. They aren't used outside this
module and it was forgotten to provide a prototype for these functions.
Just make them static for now.
Fixes: 11ecf8c55b ("net: phy: broadcom: add cable test support")
Reported-by: kbuild test robot <lkp@intel.com>
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
774 lines
18 KiB
C
774 lines
18 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2015-2017 Broadcom
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*/
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#include "bcm-phy-lib.h"
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#include <linux/bitfield.h>
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#include <linux/brcmphy.h>
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#include <linux/export.h>
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#include <linux/mdio.h>
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#include <linux/module.h>
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#include <linux/phy.h>
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#include <linux/ethtool.h>
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#include <linux/ethtool_netlink.h>
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#define MII_BCM_CHANNEL_WIDTH 0x2000
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#define BCM_CL45VEN_EEE_ADV 0x3c
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int __bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val)
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{
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int rc;
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rc = __phy_write(phydev, MII_BCM54XX_EXP_SEL, reg);
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if (rc < 0)
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return rc;
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return __phy_write(phydev, MII_BCM54XX_EXP_DATA, val);
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}
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EXPORT_SYMBOL_GPL(__bcm_phy_write_exp);
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int bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val)
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{
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int rc;
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phy_lock_mdio_bus(phydev);
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rc = __bcm_phy_write_exp(phydev, reg, val);
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phy_unlock_mdio_bus(phydev);
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return rc;
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}
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EXPORT_SYMBOL_GPL(bcm_phy_write_exp);
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int __bcm_phy_read_exp(struct phy_device *phydev, u16 reg)
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{
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int val;
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val = __phy_write(phydev, MII_BCM54XX_EXP_SEL, reg);
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if (val < 0)
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return val;
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val = __phy_read(phydev, MII_BCM54XX_EXP_DATA);
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/* Restore default value. It's O.K. if this write fails. */
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__phy_write(phydev, MII_BCM54XX_EXP_SEL, 0);
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return val;
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}
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EXPORT_SYMBOL_GPL(__bcm_phy_read_exp);
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int bcm_phy_read_exp(struct phy_device *phydev, u16 reg)
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{
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int rc;
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phy_lock_mdio_bus(phydev);
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rc = __bcm_phy_read_exp(phydev, reg);
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phy_unlock_mdio_bus(phydev);
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return rc;
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}
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EXPORT_SYMBOL_GPL(bcm_phy_read_exp);
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int __bcm_phy_modify_exp(struct phy_device *phydev, u16 reg, u16 mask, u16 set)
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{
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int new, ret;
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ret = __phy_write(phydev, MII_BCM54XX_EXP_SEL, reg);
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if (ret < 0)
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return ret;
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ret = __phy_read(phydev, MII_BCM54XX_EXP_DATA);
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if (ret < 0)
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return ret;
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new = (ret & ~mask) | set;
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if (new == ret)
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return 0;
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return __phy_write(phydev, MII_BCM54XX_EXP_DATA, new);
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}
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EXPORT_SYMBOL_GPL(__bcm_phy_modify_exp);
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int bcm_phy_modify_exp(struct phy_device *phydev, u16 reg, u16 mask, u16 set)
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{
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int ret;
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phy_lock_mdio_bus(phydev);
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ret = __bcm_phy_modify_exp(phydev, reg, mask, set);
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phy_unlock_mdio_bus(phydev);
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return ret;
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}
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EXPORT_SYMBOL_GPL(bcm_phy_modify_exp);
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int bcm54xx_auxctl_read(struct phy_device *phydev, u16 regnum)
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{
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/* The register must be written to both the Shadow Register Select and
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* the Shadow Read Register Selector
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*/
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phy_write(phydev, MII_BCM54XX_AUX_CTL, MII_BCM54XX_AUXCTL_SHDWSEL_MASK |
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regnum << MII_BCM54XX_AUXCTL_SHDWSEL_READ_SHIFT);
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return phy_read(phydev, MII_BCM54XX_AUX_CTL);
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}
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EXPORT_SYMBOL_GPL(bcm54xx_auxctl_read);
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int bcm54xx_auxctl_write(struct phy_device *phydev, u16 regnum, u16 val)
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{
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return phy_write(phydev, MII_BCM54XX_AUX_CTL, regnum | val);
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}
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EXPORT_SYMBOL(bcm54xx_auxctl_write);
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int bcm_phy_write_misc(struct phy_device *phydev,
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u16 reg, u16 chl, u16 val)
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{
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int rc;
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int tmp;
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rc = phy_write(phydev, MII_BCM54XX_AUX_CTL,
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MII_BCM54XX_AUXCTL_SHDWSEL_MISC);
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if (rc < 0)
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return rc;
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tmp = phy_read(phydev, MII_BCM54XX_AUX_CTL);
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tmp |= MII_BCM54XX_AUXCTL_ACTL_SMDSP_ENA;
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rc = phy_write(phydev, MII_BCM54XX_AUX_CTL, tmp);
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if (rc < 0)
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return rc;
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tmp = (chl * MII_BCM_CHANNEL_WIDTH) | reg;
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rc = bcm_phy_write_exp(phydev, tmp, val);
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return rc;
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}
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EXPORT_SYMBOL_GPL(bcm_phy_write_misc);
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int bcm_phy_read_misc(struct phy_device *phydev,
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u16 reg, u16 chl)
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{
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int rc;
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int tmp;
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rc = phy_write(phydev, MII_BCM54XX_AUX_CTL,
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MII_BCM54XX_AUXCTL_SHDWSEL_MISC);
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if (rc < 0)
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return rc;
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tmp = phy_read(phydev, MII_BCM54XX_AUX_CTL);
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tmp |= MII_BCM54XX_AUXCTL_ACTL_SMDSP_ENA;
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rc = phy_write(phydev, MII_BCM54XX_AUX_CTL, tmp);
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if (rc < 0)
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return rc;
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tmp = (chl * MII_BCM_CHANNEL_WIDTH) | reg;
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rc = bcm_phy_read_exp(phydev, tmp);
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return rc;
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}
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EXPORT_SYMBOL_GPL(bcm_phy_read_misc);
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int bcm_phy_ack_intr(struct phy_device *phydev)
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{
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int reg;
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/* Clear pending interrupts. */
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reg = phy_read(phydev, MII_BCM54XX_ISR);
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if (reg < 0)
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return reg;
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return 0;
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}
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EXPORT_SYMBOL_GPL(bcm_phy_ack_intr);
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int bcm_phy_config_intr(struct phy_device *phydev)
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{
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int reg;
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reg = phy_read(phydev, MII_BCM54XX_ECR);
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if (reg < 0)
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return reg;
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if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
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reg &= ~MII_BCM54XX_ECR_IM;
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else
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reg |= MII_BCM54XX_ECR_IM;
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return phy_write(phydev, MII_BCM54XX_ECR, reg);
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}
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EXPORT_SYMBOL_GPL(bcm_phy_config_intr);
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int bcm_phy_read_shadow(struct phy_device *phydev, u16 shadow)
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{
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phy_write(phydev, MII_BCM54XX_SHD, MII_BCM54XX_SHD_VAL(shadow));
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return MII_BCM54XX_SHD_DATA(phy_read(phydev, MII_BCM54XX_SHD));
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}
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EXPORT_SYMBOL_GPL(bcm_phy_read_shadow);
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int bcm_phy_write_shadow(struct phy_device *phydev, u16 shadow,
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u16 val)
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{
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return phy_write(phydev, MII_BCM54XX_SHD,
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MII_BCM54XX_SHD_WRITE |
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MII_BCM54XX_SHD_VAL(shadow) |
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MII_BCM54XX_SHD_DATA(val));
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}
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EXPORT_SYMBOL_GPL(bcm_phy_write_shadow);
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int __bcm_phy_read_rdb(struct phy_device *phydev, u16 rdb)
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{
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int val;
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val = __phy_write(phydev, MII_BCM54XX_RDB_ADDR, rdb);
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if (val < 0)
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return val;
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return __phy_read(phydev, MII_BCM54XX_RDB_DATA);
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}
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EXPORT_SYMBOL_GPL(__bcm_phy_read_rdb);
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int bcm_phy_read_rdb(struct phy_device *phydev, u16 rdb)
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{
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int ret;
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phy_lock_mdio_bus(phydev);
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ret = __bcm_phy_read_rdb(phydev, rdb);
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phy_unlock_mdio_bus(phydev);
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return ret;
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}
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EXPORT_SYMBOL_GPL(bcm_phy_read_rdb);
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int __bcm_phy_write_rdb(struct phy_device *phydev, u16 rdb, u16 val)
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{
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int ret;
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ret = __phy_write(phydev, MII_BCM54XX_RDB_ADDR, rdb);
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if (ret < 0)
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return ret;
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return __phy_write(phydev, MII_BCM54XX_RDB_DATA, val);
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}
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EXPORT_SYMBOL_GPL(__bcm_phy_write_rdb);
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int bcm_phy_write_rdb(struct phy_device *phydev, u16 rdb, u16 val)
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{
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int ret;
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phy_lock_mdio_bus(phydev);
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ret = __bcm_phy_write_rdb(phydev, rdb, val);
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phy_unlock_mdio_bus(phydev);
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return ret;
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}
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EXPORT_SYMBOL_GPL(bcm_phy_write_rdb);
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int __bcm_phy_modify_rdb(struct phy_device *phydev, u16 rdb, u16 mask, u16 set)
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{
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int new, ret;
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ret = __phy_write(phydev, MII_BCM54XX_RDB_ADDR, rdb);
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if (ret < 0)
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return ret;
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ret = __phy_read(phydev, MII_BCM54XX_RDB_DATA);
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if (ret < 0)
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return ret;
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new = (ret & ~mask) | set;
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if (new == ret)
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return 0;
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return __phy_write(phydev, MII_BCM54XX_RDB_DATA, new);
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}
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EXPORT_SYMBOL_GPL(__bcm_phy_modify_rdb);
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int bcm_phy_modify_rdb(struct phy_device *phydev, u16 rdb, u16 mask, u16 set)
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{
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int ret;
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phy_lock_mdio_bus(phydev);
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ret = __bcm_phy_modify_rdb(phydev, rdb, mask, set);
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phy_unlock_mdio_bus(phydev);
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return ret;
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}
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EXPORT_SYMBOL_GPL(bcm_phy_modify_rdb);
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int bcm_phy_enable_apd(struct phy_device *phydev, bool dll_pwr_down)
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{
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int val;
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if (dll_pwr_down) {
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val = bcm_phy_read_shadow(phydev, BCM54XX_SHD_SCR3);
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if (val < 0)
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return val;
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val |= BCM54XX_SHD_SCR3_DLLAPD_DIS;
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bcm_phy_write_shadow(phydev, BCM54XX_SHD_SCR3, val);
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}
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val = bcm_phy_read_shadow(phydev, BCM54XX_SHD_APD);
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if (val < 0)
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return val;
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/* Clear APD bits */
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val &= BCM_APD_CLR_MASK;
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if (phydev->autoneg == AUTONEG_ENABLE)
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val |= BCM54XX_SHD_APD_EN;
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else
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val |= BCM_NO_ANEG_APD_EN;
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/* Enable energy detect single link pulse for easy wakeup */
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val |= BCM_APD_SINGLELP_EN;
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/* Enable Auto Power-Down (APD) for the PHY */
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return bcm_phy_write_shadow(phydev, BCM54XX_SHD_APD, val);
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}
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EXPORT_SYMBOL_GPL(bcm_phy_enable_apd);
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int bcm_phy_set_eee(struct phy_device *phydev, bool enable)
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{
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int val;
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/* Enable EEE at PHY level */
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val = phy_read_mmd(phydev, MDIO_MMD_AN, BRCM_CL45VEN_EEE_CONTROL);
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if (val < 0)
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return val;
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if (enable)
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val |= LPI_FEATURE_EN | LPI_FEATURE_EN_DIG1000X;
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else
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val &= ~(LPI_FEATURE_EN | LPI_FEATURE_EN_DIG1000X);
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phy_write_mmd(phydev, MDIO_MMD_AN, BRCM_CL45VEN_EEE_CONTROL, (u32)val);
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/* Advertise EEE */
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val = phy_read_mmd(phydev, MDIO_MMD_AN, BCM_CL45VEN_EEE_ADV);
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if (val < 0)
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return val;
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if (enable)
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val |= (MDIO_EEE_100TX | MDIO_EEE_1000T);
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else
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val &= ~(MDIO_EEE_100TX | MDIO_EEE_1000T);
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phy_write_mmd(phydev, MDIO_MMD_AN, BCM_CL45VEN_EEE_ADV, (u32)val);
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return 0;
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}
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EXPORT_SYMBOL_GPL(bcm_phy_set_eee);
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int bcm_phy_downshift_get(struct phy_device *phydev, u8 *count)
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{
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int val;
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val = bcm54xx_auxctl_read(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC);
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if (val < 0)
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return val;
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/* Check if wirespeed is enabled or not */
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if (!(val & MII_BCM54XX_AUXCTL_SHDWSEL_MISC_WIRESPEED_EN)) {
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*count = DOWNSHIFT_DEV_DISABLE;
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return 0;
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}
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val = bcm_phy_read_shadow(phydev, BCM54XX_SHD_SCR2);
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if (val < 0)
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return val;
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/* Downgrade after one link attempt */
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if (val & BCM54XX_SHD_SCR2_WSPD_RTRY_DIS) {
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*count = 1;
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} else {
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/* Downgrade after configured retry count */
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val >>= BCM54XX_SHD_SCR2_WSPD_RTRY_LMT_SHIFT;
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val &= BCM54XX_SHD_SCR2_WSPD_RTRY_LMT_MASK;
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*count = val + BCM54XX_SHD_SCR2_WSPD_RTRY_LMT_OFFSET;
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}
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return 0;
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}
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EXPORT_SYMBOL_GPL(bcm_phy_downshift_get);
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int bcm_phy_downshift_set(struct phy_device *phydev, u8 count)
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{
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int val = 0, ret = 0;
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/* Range check the number given */
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if (count - BCM54XX_SHD_SCR2_WSPD_RTRY_LMT_OFFSET >
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BCM54XX_SHD_SCR2_WSPD_RTRY_LMT_MASK &&
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count != DOWNSHIFT_DEV_DEFAULT_COUNT) {
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return -ERANGE;
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}
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val = bcm54xx_auxctl_read(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC);
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if (val < 0)
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return val;
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/* Se the write enable bit */
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val |= MII_BCM54XX_AUXCTL_MISC_WREN;
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if (count == DOWNSHIFT_DEV_DISABLE) {
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val &= ~MII_BCM54XX_AUXCTL_SHDWSEL_MISC_WIRESPEED_EN;
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return bcm54xx_auxctl_write(phydev,
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MII_BCM54XX_AUXCTL_SHDWSEL_MISC,
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val);
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} else {
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val |= MII_BCM54XX_AUXCTL_SHDWSEL_MISC_WIRESPEED_EN;
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ret = bcm54xx_auxctl_write(phydev,
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MII_BCM54XX_AUXCTL_SHDWSEL_MISC,
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val);
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if (ret < 0)
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return ret;
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}
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val = bcm_phy_read_shadow(phydev, BCM54XX_SHD_SCR2);
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val &= ~(BCM54XX_SHD_SCR2_WSPD_RTRY_LMT_MASK <<
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BCM54XX_SHD_SCR2_WSPD_RTRY_LMT_SHIFT |
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BCM54XX_SHD_SCR2_WSPD_RTRY_DIS);
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switch (count) {
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case 1:
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val |= BCM54XX_SHD_SCR2_WSPD_RTRY_DIS;
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break;
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case DOWNSHIFT_DEV_DEFAULT_COUNT:
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val |= 1 << BCM54XX_SHD_SCR2_WSPD_RTRY_LMT_SHIFT;
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break;
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default:
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val |= (count - BCM54XX_SHD_SCR2_WSPD_RTRY_LMT_OFFSET) <<
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BCM54XX_SHD_SCR2_WSPD_RTRY_LMT_SHIFT;
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break;
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}
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return bcm_phy_write_shadow(phydev, BCM54XX_SHD_SCR2, val);
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}
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EXPORT_SYMBOL_GPL(bcm_phy_downshift_set);
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struct bcm_phy_hw_stat {
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const char *string;
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u8 reg;
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u8 shift;
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u8 bits;
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};
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/* Counters freeze at either 0xffff or 0xff, better than nothing */
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static const struct bcm_phy_hw_stat bcm_phy_hw_stats[] = {
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{ "phy_receive_errors", MII_BRCM_CORE_BASE12, 0, 16 },
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{ "phy_serdes_ber_errors", MII_BRCM_CORE_BASE13, 8, 8 },
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{ "phy_false_carrier_sense_errors", MII_BRCM_CORE_BASE13, 0, 8 },
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{ "phy_local_rcvr_nok", MII_BRCM_CORE_BASE14, 8, 8 },
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{ "phy_remote_rcv_nok", MII_BRCM_CORE_BASE14, 0, 8 },
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};
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int bcm_phy_get_sset_count(struct phy_device *phydev)
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{
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return ARRAY_SIZE(bcm_phy_hw_stats);
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}
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EXPORT_SYMBOL_GPL(bcm_phy_get_sset_count);
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void bcm_phy_get_strings(struct phy_device *phydev, u8 *data)
|
|
{
|
|
unsigned int i;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(bcm_phy_hw_stats); i++)
|
|
strlcpy(data + i * ETH_GSTRING_LEN,
|
|
bcm_phy_hw_stats[i].string, ETH_GSTRING_LEN);
|
|
}
|
|
EXPORT_SYMBOL_GPL(bcm_phy_get_strings);
|
|
|
|
/* Caller is supposed to provide appropriate storage for the library code to
|
|
* access the shadow copy
|
|
*/
|
|
static u64 bcm_phy_get_stat(struct phy_device *phydev, u64 *shadow,
|
|
unsigned int i)
|
|
{
|
|
struct bcm_phy_hw_stat stat = bcm_phy_hw_stats[i];
|
|
int val;
|
|
u64 ret;
|
|
|
|
val = phy_read(phydev, stat.reg);
|
|
if (val < 0) {
|
|
ret = U64_MAX;
|
|
} else {
|
|
val >>= stat.shift;
|
|
val = val & ((1 << stat.bits) - 1);
|
|
shadow[i] += val;
|
|
ret = shadow[i];
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
void bcm_phy_get_stats(struct phy_device *phydev, u64 *shadow,
|
|
struct ethtool_stats *stats, u64 *data)
|
|
{
|
|
unsigned int i;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(bcm_phy_hw_stats); i++)
|
|
data[i] = bcm_phy_get_stat(phydev, shadow, i);
|
|
}
|
|
EXPORT_SYMBOL_GPL(bcm_phy_get_stats);
|
|
|
|
void bcm_phy_r_rc_cal_reset(struct phy_device *phydev)
|
|
{
|
|
/* Reset R_CAL/RC_CAL Engine */
|
|
bcm_phy_write_exp_sel(phydev, 0x00b0, 0x0010);
|
|
|
|
/* Disable Reset R_AL/RC_CAL Engine */
|
|
bcm_phy_write_exp_sel(phydev, 0x00b0, 0x0000);
|
|
}
|
|
EXPORT_SYMBOL_GPL(bcm_phy_r_rc_cal_reset);
|
|
|
|
int bcm_phy_28nm_a0b0_afe_config_init(struct phy_device *phydev)
|
|
{
|
|
/* Increase VCO range to prevent unlocking problem of PLL at low
|
|
* temp
|
|
*/
|
|
bcm_phy_write_misc(phydev, PLL_PLLCTRL_1, 0x0048);
|
|
|
|
/* Change Ki to 011 */
|
|
bcm_phy_write_misc(phydev, PLL_PLLCTRL_2, 0x021b);
|
|
|
|
/* Disable loading of TVCO buffer to bandgap, set bandgap trim
|
|
* to 111
|
|
*/
|
|
bcm_phy_write_misc(phydev, PLL_PLLCTRL_4, 0x0e20);
|
|
|
|
/* Adjust bias current trim by -3 */
|
|
bcm_phy_write_misc(phydev, DSP_TAP10, 0x690b);
|
|
|
|
/* Switch to CORE_BASE1E */
|
|
phy_write(phydev, MII_BRCM_CORE_BASE1E, 0xd);
|
|
|
|
bcm_phy_r_rc_cal_reset(phydev);
|
|
|
|
/* write AFE_RXCONFIG_0 */
|
|
bcm_phy_write_misc(phydev, AFE_RXCONFIG_0, 0xeb19);
|
|
|
|
/* write AFE_RXCONFIG_1 */
|
|
bcm_phy_write_misc(phydev, AFE_RXCONFIG_1, 0x9a3f);
|
|
|
|
/* write AFE_RX_LP_COUNTER */
|
|
bcm_phy_write_misc(phydev, AFE_RX_LP_COUNTER, 0x7fc0);
|
|
|
|
/* write AFE_HPF_TRIM_OTHERS */
|
|
bcm_phy_write_misc(phydev, AFE_HPF_TRIM_OTHERS, 0x000b);
|
|
|
|
/* write AFTE_TX_CONFIG */
|
|
bcm_phy_write_misc(phydev, AFE_TX_CONFIG, 0x0800);
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(bcm_phy_28nm_a0b0_afe_config_init);
|
|
|
|
int bcm_phy_enable_jumbo(struct phy_device *phydev)
|
|
{
|
|
int ret;
|
|
|
|
ret = bcm54xx_auxctl_read(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_AUXCTL);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
/* Enable extended length packet reception */
|
|
ret = bcm54xx_auxctl_write(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_AUXCTL,
|
|
ret | MII_BCM54XX_AUXCTL_ACTL_EXT_PKT_LEN);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
/* Enable the elastic FIFO for raising the transmission limit from
|
|
* 4.5KB to 10KB, at the expense of an additional 16 ns in propagation
|
|
* latency.
|
|
*/
|
|
return phy_set_bits(phydev, MII_BCM54XX_ECR, MII_BCM54XX_ECR_FIFOE);
|
|
}
|
|
EXPORT_SYMBOL_GPL(bcm_phy_enable_jumbo);
|
|
|
|
static int __bcm_phy_enable_rdb_access(struct phy_device *phydev)
|
|
{
|
|
return __bcm_phy_write_exp(phydev, BCM54XX_EXP_REG7E, 0);
|
|
}
|
|
|
|
static int __bcm_phy_enable_legacy_access(struct phy_device *phydev)
|
|
{
|
|
return __bcm_phy_write_rdb(phydev, BCM54XX_RDB_REG0087,
|
|
BCM54XX_ACCESS_MODE_LEGACY_EN);
|
|
}
|
|
|
|
static int _bcm_phy_cable_test_start(struct phy_device *phydev, bool is_rdb)
|
|
{
|
|
u16 mask, set;
|
|
int ret;
|
|
|
|
/* Auto-negotiation must be enabled for cable diagnostics to work, but
|
|
* don't advertise any capabilities.
|
|
*/
|
|
phy_write(phydev, MII_BMCR, BMCR_ANENABLE);
|
|
phy_write(phydev, MII_ADVERTISE, ADVERTISE_CSMA);
|
|
phy_write(phydev, MII_CTRL1000, 0);
|
|
|
|
phy_lock_mdio_bus(phydev);
|
|
if (is_rdb) {
|
|
ret = __bcm_phy_enable_legacy_access(phydev);
|
|
if (ret)
|
|
goto out;
|
|
}
|
|
|
|
mask = BCM54XX_ECD_CTRL_CROSS_SHORT_DIS | BCM54XX_ECD_CTRL_UNIT_MASK;
|
|
set = BCM54XX_ECD_CTRL_RUN | BCM54XX_ECD_CTRL_BREAK_LINK |
|
|
FIELD_PREP(BCM54XX_ECD_CTRL_UNIT_MASK,
|
|
BCM54XX_ECD_CTRL_UNIT_CM);
|
|
|
|
ret = __bcm_phy_modify_exp(phydev, BCM54XX_EXP_ECD_CTRL, mask, set);
|
|
|
|
out:
|
|
/* re-enable the RDB access even if there was an error */
|
|
if (is_rdb)
|
|
ret = __bcm_phy_enable_rdb_access(phydev) ? : ret;
|
|
|
|
phy_unlock_mdio_bus(phydev);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int bcm_phy_cable_test_report_trans(int result)
|
|
{
|
|
switch (result) {
|
|
case BCM54XX_ECD_FAULT_TYPE_OK:
|
|
return ETHTOOL_A_CABLE_RESULT_CODE_OK;
|
|
case BCM54XX_ECD_FAULT_TYPE_OPEN:
|
|
return ETHTOOL_A_CABLE_RESULT_CODE_OPEN;
|
|
case BCM54XX_ECD_FAULT_TYPE_SAME_SHORT:
|
|
return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT;
|
|
case BCM54XX_ECD_FAULT_TYPE_CROSS_SHORT:
|
|
return ETHTOOL_A_CABLE_RESULT_CODE_CROSS_SHORT;
|
|
case BCM54XX_ECD_FAULT_TYPE_INVALID:
|
|
case BCM54XX_ECD_FAULT_TYPE_BUSY:
|
|
default:
|
|
return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC;
|
|
}
|
|
}
|
|
|
|
static bool bcm_phy_distance_valid(int result)
|
|
{
|
|
switch (result) {
|
|
case BCM54XX_ECD_FAULT_TYPE_OPEN:
|
|
case BCM54XX_ECD_FAULT_TYPE_SAME_SHORT:
|
|
case BCM54XX_ECD_FAULT_TYPE_CROSS_SHORT:
|
|
return true;
|
|
}
|
|
return false;
|
|
}
|
|
|
|
static int bcm_phy_report_length(struct phy_device *phydev, int pair)
|
|
{
|
|
int val;
|
|
|
|
val = __bcm_phy_read_exp(phydev,
|
|
BCM54XX_EXP_ECD_PAIR_A_LENGTH_RESULTS + pair);
|
|
if (val < 0)
|
|
return val;
|
|
|
|
if (val == BCM54XX_ECD_LENGTH_RESULTS_INVALID)
|
|
return 0;
|
|
|
|
ethnl_cable_test_fault_length(phydev, pair, val);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int _bcm_phy_cable_test_get_status(struct phy_device *phydev,
|
|
bool *finished, bool is_rdb)
|
|
{
|
|
int pair_a, pair_b, pair_c, pair_d, ret;
|
|
|
|
*finished = false;
|
|
|
|
phy_lock_mdio_bus(phydev);
|
|
|
|
if (is_rdb) {
|
|
ret = __bcm_phy_enable_legacy_access(phydev);
|
|
if (ret)
|
|
goto out;
|
|
}
|
|
|
|
ret = __bcm_phy_read_exp(phydev, BCM54XX_EXP_ECD_CTRL);
|
|
if (ret < 0)
|
|
goto out;
|
|
|
|
if (ret & BCM54XX_ECD_CTRL_IN_PROGRESS) {
|
|
ret = 0;
|
|
goto out;
|
|
}
|
|
|
|
ret = __bcm_phy_read_exp(phydev, BCM54XX_EXP_ECD_FAULT_TYPE);
|
|
if (ret < 0)
|
|
goto out;
|
|
|
|
pair_a = FIELD_GET(BCM54XX_ECD_FAULT_TYPE_PAIR_A_MASK, ret);
|
|
pair_b = FIELD_GET(BCM54XX_ECD_FAULT_TYPE_PAIR_B_MASK, ret);
|
|
pair_c = FIELD_GET(BCM54XX_ECD_FAULT_TYPE_PAIR_C_MASK, ret);
|
|
pair_d = FIELD_GET(BCM54XX_ECD_FAULT_TYPE_PAIR_D_MASK, ret);
|
|
|
|
ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A,
|
|
bcm_phy_cable_test_report_trans(pair_a));
|
|
ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_B,
|
|
bcm_phy_cable_test_report_trans(pair_b));
|
|
ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_C,
|
|
bcm_phy_cable_test_report_trans(pair_c));
|
|
ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_D,
|
|
bcm_phy_cable_test_report_trans(pair_d));
|
|
|
|
if (bcm_phy_distance_valid(pair_a))
|
|
bcm_phy_report_length(phydev, 0);
|
|
if (bcm_phy_distance_valid(pair_b))
|
|
bcm_phy_report_length(phydev, 1);
|
|
if (bcm_phy_distance_valid(pair_c))
|
|
bcm_phy_report_length(phydev, 2);
|
|
if (bcm_phy_distance_valid(pair_d))
|
|
bcm_phy_report_length(phydev, 3);
|
|
|
|
ret = 0;
|
|
*finished = true;
|
|
out:
|
|
/* re-enable the RDB access even if there was an error */
|
|
if (is_rdb)
|
|
ret = __bcm_phy_enable_rdb_access(phydev) ? : ret;
|
|
|
|
phy_unlock_mdio_bus(phydev);
|
|
|
|
return ret;
|
|
}
|
|
|
|
int bcm_phy_cable_test_start(struct phy_device *phydev)
|
|
{
|
|
return _bcm_phy_cable_test_start(phydev, false);
|
|
}
|
|
EXPORT_SYMBOL_GPL(bcm_phy_cable_test_start);
|
|
|
|
int bcm_phy_cable_test_get_status(struct phy_device *phydev, bool *finished)
|
|
{
|
|
return _bcm_phy_cable_test_get_status(phydev, finished, false);
|
|
}
|
|
EXPORT_SYMBOL_GPL(bcm_phy_cable_test_get_status);
|
|
|
|
/* We assume that all PHYs which support RDB access can be switched to legacy
|
|
* mode. If, in the future, this is not true anymore, we have to re-implement
|
|
* this with RDB access.
|
|
*/
|
|
int bcm_phy_cable_test_start_rdb(struct phy_device *phydev)
|
|
{
|
|
return _bcm_phy_cable_test_start(phydev, true);
|
|
}
|
|
EXPORT_SYMBOL_GPL(bcm_phy_cable_test_start_rdb);
|
|
|
|
int bcm_phy_cable_test_get_status_rdb(struct phy_device *phydev,
|
|
bool *finished)
|
|
{
|
|
return _bcm_phy_cable_test_get_status(phydev, finished, true);
|
|
}
|
|
EXPORT_SYMBOL_GPL(bcm_phy_cable_test_get_status_rdb);
|
|
|
|
MODULE_DESCRIPTION("Broadcom PHY Library");
|
|
MODULE_LICENSE("GPL v2");
|
|
MODULE_AUTHOR("Broadcom Corporation");
|