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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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ff4ae5d931
Move OMAP3xxx-specific CM functions & macros into cm3xxx.[ch] and OMAP2xxx-specific macros into cm2xxx.[ch]. Move basic CM register access functions into static inline functions in cm2xxx_3xxx.h, leaving only OMAP2/3 hardreset functions in cm2xxx_3xxx.c. As part of this, split the CM and hwmod code that waits for devices to become ready into SoC-specific functions. This is in preparation for the upcoming move of this code to drivers/. Signed-off-by: Paul Walmsley <paul@pwsan.com> Reviewed-by: Russ Dill <Russ.Dill@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
127 lines
4.2 KiB
C
127 lines
4.2 KiB
C
/*
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* OMAP3517/3505-specific clock framework functions
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*
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* Copyright (C) 2010 Texas Instruments, Inc.
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* Copyright (C) 2011 Nokia Corporation
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*
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* Ranjith Lohithakshan
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* Paul Walmsley
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*
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* Parts of this code are based on code written by
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* Richard Woodruff, Tony Lindgren, Tuukka Tikkanen, Karthik Dasu,
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* Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#undef DEBUG
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#include <linux/kernel.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <plat/clock.h>
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#include "clock.h"
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#include "clock3517.h"
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#include "cm3xxx.h"
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#include "cm-regbits-34xx.h"
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/*
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* In AM35xx IPSS, the {ICK,FCK} enable bits for modules are exported
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* in the same register at a bit offset of 0x8. The EN_ACK for ICK is
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* at an offset of 4 from ICK enable bit.
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*/
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#define AM35XX_IPSS_ICK_MASK 0xF
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#define AM35XX_IPSS_ICK_EN_ACK_OFFSET 0x4
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#define AM35XX_IPSS_ICK_FCK_OFFSET 0x8
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#define AM35XX_IPSS_CLK_IDLEST_VAL 0
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/**
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* am35xx_clk_find_idlest - return clock ACK info for AM35XX IPSS
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* @clk: struct clk * being enabled
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* @idlest_reg: void __iomem ** to store CM_IDLEST reg address into
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* @idlest_bit: pointer to a u8 to store the CM_IDLEST bit shift into
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* @idlest_val: pointer to a u8 to store the CM_IDLEST indicator
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*
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* The interface clocks on AM35xx IPSS reflects the clock idle status
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* in the enable register itsel at a bit offset of 4 from the enable
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* bit. A value of 1 indicates that clock is enabled.
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*/
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static void am35xx_clk_find_idlest(struct clk *clk,
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void __iomem **idlest_reg,
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u8 *idlest_bit,
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u8 *idlest_val)
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{
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*idlest_reg = (__force void __iomem *)(clk->enable_reg);
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*idlest_bit = clk->enable_bit + AM35XX_IPSS_ICK_EN_ACK_OFFSET;
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*idlest_val = AM35XX_IPSS_CLK_IDLEST_VAL;
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}
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/**
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* am35xx_clk_find_companion - find companion clock to @clk
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* @clk: struct clk * to find the companion clock of
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* @other_reg: void __iomem ** to return the companion clock CM_*CLKEN va in
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* @other_bit: u8 ** to return the companion clock bit shift in
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*
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* Some clocks don't have companion clocks. For example, modules with
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* only an interface clock (such as HECC) don't have a companion
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* clock. Right now, this code relies on the hardware exporting a bit
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* in the correct companion register that indicates that the
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* nonexistent 'companion clock' is active. Future patches will
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* associate this type of code with per-module data structures to
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* avoid this issue, and remove the casts. No return value.
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*/
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static void am35xx_clk_find_companion(struct clk *clk, void __iomem **other_reg,
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u8 *other_bit)
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{
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*other_reg = (__force void __iomem *)(clk->enable_reg);
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if (clk->enable_bit & AM35XX_IPSS_ICK_MASK)
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*other_bit = clk->enable_bit + AM35XX_IPSS_ICK_FCK_OFFSET;
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else
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*other_bit = clk->enable_bit - AM35XX_IPSS_ICK_FCK_OFFSET;
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}
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const struct clkops clkops_am35xx_ipss_module_wait = {
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.enable = omap2_dflt_clk_enable,
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.disable = omap2_dflt_clk_disable,
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.find_idlest = am35xx_clk_find_idlest,
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.find_companion = am35xx_clk_find_companion,
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};
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/**
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* am35xx_clk_ipss_find_idlest - return CM_IDLEST info for IPSS
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* @clk: struct clk * being enabled
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* @idlest_reg: void __iomem ** to store CM_IDLEST reg address into
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* @idlest_bit: pointer to a u8 to store the CM_IDLEST bit shift into
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* @idlest_val: pointer to a u8 to store the CM_IDLEST indicator
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*
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* The IPSS target CM_IDLEST bit is at a different shift from the
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* CM_{I,F}CLKEN bit. Pass back the correct info via @idlest_reg
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* and @idlest_bit. No return value.
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*/
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static void am35xx_clk_ipss_find_idlest(struct clk *clk,
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void __iomem **idlest_reg,
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u8 *idlest_bit,
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u8 *idlest_val)
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{
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u32 r;
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r = (((__force u32)clk->enable_reg & ~0xf0) | 0x20);
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*idlest_reg = (__force void __iomem *)r;
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*idlest_bit = AM35XX_ST_IPSS_SHIFT;
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*idlest_val = OMAP34XX_CM_IDLEST_VAL;
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}
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const struct clkops clkops_am35xx_ipss_wait = {
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.enable = omap2_dflt_clk_enable,
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.disable = omap2_dflt_clk_disable,
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.find_idlest = am35xx_clk_ipss_find_idlest,
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.find_companion = omap2_clk_dflt_find_companion,
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.allow_idle = omap2_clkt_iclk_allow_idle,
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.deny_idle = omap2_clkt_iclk_deny_idle,
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};
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