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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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33960acccf
Adds a PCI device entry for Raven Ridge. Raven Ridge is an APU with a dedicated AMD Secure Processor having Trusted Execution Environment (TEE) support. The TEE provides a secure environment for running Trusted Applications (TAs) which implement security-sensitive parts of a feature. This patch configures AMD Secure Processor's TEE interface by initializing a ring buffer (shared memory between Rich OS and Trusted OS) which can hold multiple command buffer entries. The TEE interface is facilitated by a set of CPU to PSP mailbox registers. The next patch will address how commands are submitted to the ring buffer. Cc: Jens Wiklander <jens.wiklander@linaro.org> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Co-developed-by: Devaraj Rangasamy <Devaraj.Rangasamy@amd.com> Signed-off-by: Devaraj Rangasamy <Devaraj.Rangasamy@amd.com> Signed-off-by: Rijo Thomas <Rijo-john.Thomas@amd.com> Acked-by: Gary R Hook <gary.hook@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
174 lines
4.1 KiB
C
174 lines
4.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* AMD Secure Processor driver
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*
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* Copyright (C) 2017-2019 Advanced Micro Devices, Inc.
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*
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* Author: Tom Lendacky <thomas.lendacky@amd.com>
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* Author: Gary R Hook <gary.hook@amd.com>
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* Author: Brijesh Singh <brijesh.singh@amd.com>
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*/
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#ifndef __SP_DEV_H__
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#define __SP_DEV_H__
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#include <linux/device.h>
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#include <linux/spinlock.h>
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#include <linux/mutex.h>
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#include <linux/list.h>
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#include <linux/wait.h>
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#include <linux/dmapool.h>
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#include <linux/hw_random.h>
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#include <linux/bitops.h>
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#include <linux/interrupt.h>
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#include <linux/irqreturn.h>
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#define SP_MAX_NAME_LEN 32
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#define CACHE_NONE 0x00
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#define CACHE_WB_NO_ALLOC 0xb7
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/* Structure to hold CCP device data */
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struct ccp_device;
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struct ccp_vdata {
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const unsigned int version;
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const unsigned int dma_chan_attr;
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void (*setup)(struct ccp_device *);
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const struct ccp_actions *perform;
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const unsigned int offset;
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const unsigned int rsamax;
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};
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struct sev_vdata {
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const unsigned int cmdresp_reg;
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const unsigned int cmdbuff_addr_lo_reg;
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const unsigned int cmdbuff_addr_hi_reg;
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};
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struct tee_vdata {
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const unsigned int cmdresp_reg;
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const unsigned int cmdbuff_addr_lo_reg;
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const unsigned int cmdbuff_addr_hi_reg;
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const unsigned int ring_wptr_reg;
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const unsigned int ring_rptr_reg;
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};
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struct psp_vdata {
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const struct sev_vdata *sev;
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const struct tee_vdata *tee;
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const unsigned int feature_reg;
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const unsigned int inten_reg;
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const unsigned int intsts_reg;
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};
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/* Structure to hold SP device data */
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struct sp_dev_vdata {
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const unsigned int bar;
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const struct ccp_vdata *ccp_vdata;
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const struct psp_vdata *psp_vdata;
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};
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struct sp_device {
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struct list_head entry;
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struct device *dev;
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struct sp_dev_vdata *dev_vdata;
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unsigned int ord;
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char name[SP_MAX_NAME_LEN];
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/* Bus specific device information */
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void *dev_specific;
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/* I/O area used for device communication. */
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void __iomem *io_map;
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/* DMA caching attribute support */
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unsigned int axcache;
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/* get and set master device */
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struct sp_device*(*get_psp_master_device)(void);
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void (*set_psp_master_device)(struct sp_device *);
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bool irq_registered;
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bool use_tasklet;
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unsigned int ccp_irq;
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irq_handler_t ccp_irq_handler;
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void *ccp_irq_data;
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unsigned int psp_irq;
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irq_handler_t psp_irq_handler;
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void *psp_irq_data;
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void *ccp_data;
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void *psp_data;
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};
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int sp_pci_init(void);
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void sp_pci_exit(void);
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int sp_platform_init(void);
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void sp_platform_exit(void);
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struct sp_device *sp_alloc_struct(struct device *dev);
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int sp_init(struct sp_device *sp);
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void sp_destroy(struct sp_device *sp);
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struct sp_device *sp_get_master(void);
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int sp_suspend(struct sp_device *sp, pm_message_t state);
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int sp_resume(struct sp_device *sp);
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int sp_request_ccp_irq(struct sp_device *sp, irq_handler_t handler,
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const char *name, void *data);
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void sp_free_ccp_irq(struct sp_device *sp, void *data);
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int sp_request_psp_irq(struct sp_device *sp, irq_handler_t handler,
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const char *name, void *data);
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void sp_free_psp_irq(struct sp_device *sp, void *data);
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struct sp_device *sp_get_psp_master_device(void);
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#ifdef CONFIG_CRYPTO_DEV_SP_CCP
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int ccp_dev_init(struct sp_device *sp);
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void ccp_dev_destroy(struct sp_device *sp);
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int ccp_dev_suspend(struct sp_device *sp, pm_message_t state);
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int ccp_dev_resume(struct sp_device *sp);
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#else /* !CONFIG_CRYPTO_DEV_SP_CCP */
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static inline int ccp_dev_init(struct sp_device *sp)
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{
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return 0;
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}
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static inline void ccp_dev_destroy(struct sp_device *sp) { }
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static inline int ccp_dev_suspend(struct sp_device *sp, pm_message_t state)
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{
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return 0;
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}
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static inline int ccp_dev_resume(struct sp_device *sp)
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{
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return 0;
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}
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#endif /* CONFIG_CRYPTO_DEV_SP_CCP */
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#ifdef CONFIG_CRYPTO_DEV_SP_PSP
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int psp_dev_init(struct sp_device *sp);
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void psp_pci_init(void);
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void psp_dev_destroy(struct sp_device *sp);
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void psp_pci_exit(void);
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#else /* !CONFIG_CRYPTO_DEV_SP_PSP */
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static inline int psp_dev_init(struct sp_device *sp) { return 0; }
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static inline void psp_pci_init(void) { }
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static inline void psp_dev_destroy(struct sp_device *sp) { }
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static inline void psp_pci_exit(void) { }
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#endif /* CONFIG_CRYPTO_DEV_SP_PSP */
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#endif
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