mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-26 02:40:55 +07:00
69b7f6ff85
The MSM8X60 FFA contains different components than the MSM8X60 SURF, and therefore requires a different ARCH type and machine ID. Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
101 lines
2.7 KiB
C
101 lines
2.7 KiB
C
/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 and
|
|
* only version 2 as published by the Free Software Foundation.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*
|
|
* You should have received a copy of the GNU General Public License
|
|
* along with this program; if not, write to the Free Software
|
|
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
|
|
* 02110-1301, USA.
|
|
*
|
|
*/
|
|
|
|
#include <linux/kernel.h>
|
|
#include <linux/platform_device.h>
|
|
#include <linux/io.h>
|
|
#include <linux/irq.h>
|
|
|
|
#include <asm/mach-types.h>
|
|
#include <asm/mach/arch.h>
|
|
#include <asm/hardware/gic.h>
|
|
|
|
#include <mach/board.h>
|
|
#include <mach/msm_iomap.h>
|
|
|
|
void __iomem *gic_cpu_base_addr;
|
|
|
|
unsigned long clk_get_max_axi_khz(void)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static void __init msm8x60_map_io(void)
|
|
{
|
|
msm_map_msm8x60_io();
|
|
}
|
|
|
|
static void __init msm8x60_init_irq(void)
|
|
{
|
|
unsigned int i;
|
|
|
|
gic_dist_init(0, MSM_QGIC_DIST_BASE, GIC_PPI_START);
|
|
gic_cpu_base_addr = (void *)MSM_QGIC_CPU_BASE;
|
|
gic_cpu_init(0, MSM_QGIC_CPU_BASE);
|
|
|
|
/* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */
|
|
writel(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4);
|
|
|
|
/* RUMI does not adhere to GIC spec by enabling STIs by default.
|
|
* Enable/clear is supposed to be RO for STIs, but is RW on RUMI.
|
|
*/
|
|
if (!machine_is_msm8x60_sim())
|
|
writel(0x0000FFFF, MSM_QGIC_DIST_BASE + GIC_DIST_ENABLE_SET);
|
|
|
|
/* FIXME: Not installing AVS_SVICINT and AVS_SVICINTSWDONE yet
|
|
* as they are configured as level, which does not play nice with
|
|
* handle_percpu_irq.
|
|
*/
|
|
for (i = GIC_PPI_START; i < GIC_SPI_START; i++) {
|
|
if (i != AVS_SVICINT && i != AVS_SVICINTSWDONE)
|
|
set_irq_handler(i, handle_percpu_irq);
|
|
}
|
|
}
|
|
|
|
static void __init msm8x60_init(void)
|
|
{
|
|
}
|
|
|
|
MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")
|
|
.map_io = msm8x60_map_io,
|
|
.init_irq = msm8x60_init_irq,
|
|
.init_machine = msm8x60_init,
|
|
.timer = &msm_timer,
|
|
MACHINE_END
|
|
|
|
MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF")
|
|
.map_io = msm8x60_map_io,
|
|
.init_irq = msm8x60_init_irq,
|
|
.init_machine = msm8x60_init,
|
|
.timer = &msm_timer,
|
|
MACHINE_END
|
|
|
|
MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR")
|
|
.map_io = msm8x60_map_io,
|
|
.init_irq = msm8x60_init_irq,
|
|
.init_machine = msm8x60_init,
|
|
.timer = &msm_timer,
|
|
MACHINE_END
|
|
|
|
MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA")
|
|
.map_io = msm8x60_map_io,
|
|
.init_irq = msm8x60_init_irq,
|
|
.init_machine = msm8x60_init,
|
|
.timer = &msm_timer,
|
|
MACHINE_END
|