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2c0e641a96
re-format and re-word the device tree binding documentation for MPC8xxx and compatibles, reference the common document for interrupt controllers and remove outdated duplicate SoC specific information Cc: Mark Rutland <mark.rutland@arm.com> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Pawel Moll <Pawel.Moll@arm.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: <devicetree@vger.kernel.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Gerhard Sittig <gsi@denx.de> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
75 lines
2.4 KiB
Plaintext
75 lines
2.4 KiB
Plaintext
GPIO controllers on MPC8xxx SoCs
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This is for the non-QE/CPM/GUTs GPIO controllers as found on
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8349, 8572, 8610 and compatible.
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Every GPIO controller node must have #gpio-cells property defined,
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this information will be used to translate gpio-specifiers.
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See bindings/gpio/gpio.txt for details of how to specify GPIO
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information for devices.
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The GPIO module usually is connected to the SoC's internal interrupt
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controller, see bindings/interrupt-controller/interrupts.txt (the
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interrupt client nodes section) for details how to specify this GPIO
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module's interrupt.
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The GPIO module may serve as another interrupt controller (cascaded to
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the SoC's internal interrupt controller). See the interrupt controller
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nodes section in bindings/interrupt-controller/interrupts.txt for
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details.
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Required properties:
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- compatible: "fsl,<chip>-gpio" followed by "fsl,mpc8349-gpio"
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for 83xx, "fsl,mpc8572-gpio" for 85xx, or
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"fsl,mpc8610-gpio" for 86xx.
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- #gpio-cells: Should be two. The first cell is the pin number
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and the second cell is used to specify optional
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parameters (currently unused).
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- interrupt-parent: Phandle for the interrupt controller that
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services interrupts for this device.
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- interrupts: Interrupt mapping for GPIO IRQ.
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- gpio-controller: Marks the port as GPIO controller.
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Optional properties:
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- interrupt-controller: Empty boolean property which marks the GPIO
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module as an IRQ controller.
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- #interrupt-cells: Should be two. Defines the number of integer
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cells required to specify an interrupt within
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this interrupt controller. The first cell
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defines the pin number, the second cell
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defines additional flags (trigger type,
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trigger polarity). Note that the available
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set of trigger conditions supported by the
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GPIO module depends on the actual SoC.
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Example of gpio-controller nodes for a MPC8347 SoC:
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gpio1: gpio-controller@c00 {
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#gpio-cells = <2>;
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compatible = "fsl,mpc8347-gpio", "fsl,mpc8349-gpio";
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reg = <0xc00 0x100>;
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interrupt-parent = <&ipic>;
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interrupts = <74 0x8>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio2: gpio-controller@d00 {
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#gpio-cells = <2>;
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compatible = "fsl,mpc8347-gpio", "fsl,mpc8349-gpio";
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reg = <0xd00 0x100>;
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interrupt-parent = <&ipic>;
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interrupts = <75 0x8>;
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gpio-controller;
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};
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Example of a peripheral using the GPIO module as an IRQ controller:
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funkyfpga@0 {
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compatible = "funky-fpga";
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...
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interrupt-parent = <&gpio1>;
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interrupts = <4 3>;
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};
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