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![]() Add RS485 control for Fintek F81504/508/512 F81504/508/512 can control their RTS with H/W mode. PCI configuration space for each port is 0x40 + idx * 8 + 7. When it set with 0x01, it's configured with RS232 mode. RTS is controlled by MCR. When it set with 0x11, it's configured with RS485 mode. RTS is controlled by H/W, RTS low with idle & RX, high with TX. When it set with 0x31, it's configured with RS485 mode. RTS is controlled by H/W, RTS high with idle & RX, low with TX. We will force 0x01 on pci_fintek_setup(). Signed-off-by: Peter Hung <hpeter+linux_kernel@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
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.. | ||
hvc | ||
ipwireless | ||
serial | ||
vt | ||
amiserial.c | ||
bfin_jtag_comm.c | ||
cyclades.c | ||
ehv_bytechan.c | ||
goldfish.c | ||
isicom.c | ||
Kconfig | ||
Makefile | ||
metag_da.c | ||
mips_ejtag_fdc.c | ||
moxa.c | ||
moxa.h | ||
mxser.c | ||
mxser.h | ||
n_gsm.c | ||
n_hdlc.c | ||
n_r3964.c | ||
n_tracerouter.c | ||
n_tracesink.c | ||
n_tracesink.h | ||
n_tty.c | ||
nozomi.c | ||
pty.c | ||
rocket_int.h | ||
rocket.c | ||
rocket.h | ||
synclink_gt.c | ||
synclink.c | ||
synclinkmp.c | ||
sysrq.c | ||
tty_audit.c | ||
tty_buffer.c | ||
tty_io.c | ||
tty_ioctl.c | ||
tty_ldisc.c | ||
tty_ldsem.c | ||
tty_mutex.c | ||
tty_port.c |