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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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4c301f9b6a
Converts the ARM interrupt code to use the recently added GENERIC_IRQ_MULTI_HANDLER, which is essentially just a copy of ARM's existhing MULTI_IRQ_HANDLER. The only changes are: * handle_arch_irq is now defined in a generic C file instead of an arm-specific assembly file. * handle_arch_irq is now marked as __ro_after_init. Signed-off-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: linux@armlinux.org.uk Cc: catalin.marinas@arm.com Cc: Will Deacon <will.deacon@arm.com> Cc: jonas@southpole.se Cc: stefan.kristiansson@saunalahti.fi Cc: shorne@gmail.com Cc: jason@lakedaemon.net Cc: marc.zyngier@arm.com Cc: Arnd Bergmann <arnd@arndb.de> Cc: nicolas.pitre@linaro.org Cc: vladimir.murzin@arm.com Cc: keescook@chromium.org Cc: jinb.park7@gmail.com Cc: yamada.masahiro@socionext.com Cc: alexandre.belloni@bootlin.com Cc: pombredanne@nexb.com Cc: Greg KH <gregkh@linuxfoundation.org> Cc: kstewart@linuxfoundation.org Cc: jhogan@kernel.org Cc: mark.rutland@arm.com Cc: ard.biesheuvel@linaro.org Cc: james.morse@arm.com Cc: linux-arm-kernel@lists.infradead.org Cc: openrisc@lists.librecores.org Link: https://lkml.kernel.org/r/20180622170126.6308-3-palmer@sifive.com
173 lines
4.6 KiB
C
173 lines
4.6 KiB
C
/*
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* linux/arch/arm/kernel/irq.c
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*
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* Copyright (C) 1992 Linus Torvalds
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* Modifications for ARM processor Copyright (C) 1995-2000 Russell King.
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*
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* Support for Dynamic Tick Timer Copyright (C) 2004-2005 Nokia Corporation.
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* Dynamic Tick Timer written by Tony Lindgren <tony@atomide.com> and
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* Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This file contains the code used by various IRQ handling routines:
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* asking for different IRQ's should be done through these routines
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* instead of just grabbing them. Thus setups with different IRQ numbers
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* shouldn't result in any weird surprises, and installing new handlers
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* should be easier.
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*
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* IRQ's are in fact implemented a bit like signal handlers for the kernel.
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* Naturally it's not a 1:1 relation, but there are similarities.
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*/
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#include <linux/kernel_stat.h>
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#include <linux/signal.h>
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#include <linux/ioport.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/irqchip.h>
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#include <linux/random.h>
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#include <linux/smp.h>
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#include <linux/init.h>
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#include <linux/seq_file.h>
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#include <linux/ratelimit.h>
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#include <linux/errno.h>
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#include <linux/list.h>
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#include <linux/kallsyms.h>
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#include <linux/proc_fs.h>
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#include <linux/export.h>
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#include <asm/hardware/cache-l2x0.h>
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#include <asm/hardware/cache-uniphier.h>
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#include <asm/outercache.h>
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#include <asm/exception.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/irq.h>
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#include <asm/mach/time.h>
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unsigned long irq_err_count;
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int arch_show_interrupts(struct seq_file *p, int prec)
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{
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#ifdef CONFIG_FIQ
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show_fiq_list(p, prec);
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#endif
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#ifdef CONFIG_SMP
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show_ipi_list(p, prec);
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#endif
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seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count);
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return 0;
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}
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/*
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* handle_IRQ handles all hardware IRQ's. Decoded IRQs should
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* not come via this function. Instead, they should provide their
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* own 'handler'. Used by platform code implementing C-based 1st
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* level decoding.
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*/
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void handle_IRQ(unsigned int irq, struct pt_regs *regs)
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{
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__handle_domain_irq(NULL, irq, false, regs);
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}
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/*
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* asm_do_IRQ is the interface to be used from assembly code.
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*/
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asmlinkage void __exception_irq_entry
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asm_do_IRQ(unsigned int irq, struct pt_regs *regs)
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{
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handle_IRQ(irq, regs);
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}
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void __init init_IRQ(void)
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{
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int ret;
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if (IS_ENABLED(CONFIG_OF) && !machine_desc->init_irq)
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irqchip_init();
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else
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machine_desc->init_irq();
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if (IS_ENABLED(CONFIG_OF) && IS_ENABLED(CONFIG_CACHE_L2X0) &&
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(machine_desc->l2c_aux_mask || machine_desc->l2c_aux_val)) {
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if (!outer_cache.write_sec)
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outer_cache.write_sec = machine_desc->l2c_write_sec;
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ret = l2x0_of_init(machine_desc->l2c_aux_val,
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machine_desc->l2c_aux_mask);
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if (ret && ret != -ENODEV)
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pr_err("L2C: failed to init: %d\n", ret);
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}
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uniphier_cache_init();
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}
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#ifdef CONFIG_SPARSE_IRQ
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int __init arch_probe_nr_irqs(void)
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{
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nr_irqs = machine_desc->nr_irqs ? machine_desc->nr_irqs : NR_IRQS;
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return nr_irqs;
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}
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#endif
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#ifdef CONFIG_HOTPLUG_CPU
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static bool migrate_one_irq(struct irq_desc *desc)
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{
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struct irq_data *d = irq_desc_get_irq_data(desc);
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const struct cpumask *affinity = irq_data_get_affinity_mask(d);
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struct irq_chip *c;
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bool ret = false;
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/*
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* If this is a per-CPU interrupt, or the affinity does not
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* include this CPU, then we have nothing to do.
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*/
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if (irqd_is_per_cpu(d) || !cpumask_test_cpu(smp_processor_id(), affinity))
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return false;
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if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids) {
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affinity = cpu_online_mask;
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ret = true;
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}
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c = irq_data_get_irq_chip(d);
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if (!c->irq_set_affinity)
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pr_debug("IRQ%u: unable to set affinity\n", d->irq);
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else if (c->irq_set_affinity(d, affinity, false) == IRQ_SET_MASK_OK && ret)
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cpumask_copy(irq_data_get_affinity_mask(d), affinity);
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return ret;
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}
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/*
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* The current CPU has been marked offline. Migrate IRQs off this CPU.
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* If the affinity settings do not allow other CPUs, force them onto any
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* available CPU.
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*
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* Note: we must iterate over all IRQs, whether they have an attached
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* action structure or not, as we need to get chained interrupts too.
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*/
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void migrate_irqs(void)
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{
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unsigned int i;
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struct irq_desc *desc;
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unsigned long flags;
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local_irq_save(flags);
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for_each_irq_desc(i, desc) {
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bool affinity_broken;
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raw_spin_lock(&desc->lock);
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affinity_broken = migrate_one_irq(desc);
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raw_spin_unlock(&desc->lock);
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if (affinity_broken)
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pr_warn_ratelimited("IRQ%u no longer affine to CPU%u\n",
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i, smp_processor_id());
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}
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local_irq_restore(flags);
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}
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#endif /* CONFIG_HOTPLUG_CPU */
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