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2aba2f2a70
In order to support device tree probing of IXP4xx NOR flash chips, a certain big-endian or mixed-endian memory access pattern need to be used. I have opted to use the pattern set by previous plug-ins to physmap for Gemini and Versatile, just override some functions and reuse most of the physmap core code as it is to minimize maintenance. Parts of drivers/mtd/ixp4xx.c are copied into this file. After we have IXP4xx converted fully to device tree, the drivers/mtd/ixp4xx.c file will be deleted and this will be the only access pattern to the IXP4xx flash. I did not keep the quirk in the flash write function after probe, where the old code for a while checks for access to odd addresses, fails and assigns a "faster" write function once it has convinced probe to only use 2-byte accesses. As we mandate that this device should be using bank-width = <2> this should not be a problem unless misconfigured. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
133 lines
3.2 KiB
C
133 lines
3.2 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Intel IXP4xx OF physmap add-on
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* Copyright (C) 2019 Linus Walleij <linus.walleij@linaro.org>
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*
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* Based on the ixp4xx.c map driver, originally written by:
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* Intel Corporation
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* Deepak Saxena <dsaxena@mvista.com>
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* Copyright (C) 2002 Intel Corporation
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* Copyright (C) 2003-2004 MontaVista Software, Inc.
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*/
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#include <linux/export.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/mtd/map.h>
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#include <linux/mtd/xip.h>
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#include "physmap-ixp4xx.h"
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/*
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* Read/write a 16 bit word from flash address 'addr'.
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*
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* When the cpu is in little-endian mode it swizzles the address lines
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* ('address coherency') so we need to undo the swizzling to ensure commands
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* and the like end up on the correct flash address.
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*
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* To further complicate matters, due to the way the expansion bus controller
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* handles 32 bit reads, the byte stream ABCD is stored on the flash as:
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* D15 D0
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* +---+---+
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* | A | B | 0
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* +---+---+
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* | C | D | 2
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* +---+---+
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* This means that on LE systems each 16 bit word must be swapped. Note that
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* this requires CONFIG_MTD_CFI_BE_BYTE_SWAP to be enabled to 'unswap' the CFI
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* data and other flash commands which are always in D7-D0.
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*/
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#ifndef CONFIG_CPU_BIG_ENDIAN
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static inline u16 flash_read16(void __iomem *addr)
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{
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return be16_to_cpu(__raw_readw((void __iomem *)((unsigned long)addr ^ 0x2)));
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}
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static inline void flash_write16(u16 d, void __iomem *addr)
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{
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__raw_writew(cpu_to_be16(d), (void __iomem *)((unsigned long)addr ^ 0x2));
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}
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#define BYTE0(h) ((h) & 0xFF)
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#define BYTE1(h) (((h) >> 8) & 0xFF)
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#else
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static inline u16 flash_read16(const void __iomem *addr)
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{
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return __raw_readw(addr);
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}
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static inline void flash_write16(u16 d, void __iomem *addr)
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{
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__raw_writew(d, addr);
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}
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#define BYTE0(h) (((h) >> 8) & 0xFF)
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#define BYTE1(h) ((h) & 0xFF)
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#endif
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static map_word ixp4xx_read16(struct map_info *map, unsigned long ofs)
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{
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map_word val;
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val.x[0] = flash_read16(map->virt + ofs);
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return val;
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}
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/*
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* The IXP4xx expansion bus only allows 16-bit wide acceses
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* when attached to a 16-bit wide device (such as the 28F128J3A),
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* so we can't just memcpy_fromio().
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*/
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static void ixp4xx_copy_from(struct map_info *map, void *to,
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unsigned long from, ssize_t len)
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{
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u8 *dest = (u8 *) to;
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void __iomem *src = map->virt + from;
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if (len <= 0)
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return;
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if (from & 1) {
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*dest++ = BYTE1(flash_read16(src-1));
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src++;
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--len;
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}
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while (len >= 2) {
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u16 data = flash_read16(src);
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*dest++ = BYTE0(data);
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*dest++ = BYTE1(data);
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src += 2;
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len -= 2;
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}
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if (len > 0)
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*dest++ = BYTE0(flash_read16(src));
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}
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static void ixp4xx_write16(struct map_info *map, map_word d, unsigned long adr)
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{
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flash_write16(d.x[0], map->virt + adr);
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}
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int of_flash_probe_ixp4xx(struct platform_device *pdev,
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struct device_node *np,
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struct map_info *map)
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{
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struct device *dev = &pdev->dev;
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/* Multiplatform guard */
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if (!of_device_is_compatible(np, "intel,ixp4xx-flash"))
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return 0;
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map->read = ixp4xx_read16;
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map->write = ixp4xx_write16;
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map->copy_from = ixp4xx_copy_from;
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map->copy_to = NULL;
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dev_info(dev, "initialized Intel IXP4xx-specific physmap control\n");
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return 0;
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}
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