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9b98031e67
CONFIG_SOC_AU1000_FREQUENCY doesn't exist in Kconfig, therefore removing all references for it from the source code. Signed-off-by: Christoph Egger <siccegge@cs.fau.de> To: linux-mips@linux-mips.org To: linux-kernel@vger.kernel.org Cc: vamos@i4.informatik.uni-erlangen.de Patchwork: https://patchwork.linux-mips.org/patch/1367/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
106 lines
3.4 KiB
C
106 lines
3.4 KiB
C
/*
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* BRIEF MODULE DESCRIPTION
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* Simple Au1xx0 clocks routines.
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*
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* Copyright 2001, 2008 MontaVista Software Inc.
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* Author: MontaVista Software, Inc. <source@mvista.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/module.h>
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#include <linux/spinlock.h>
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#include <asm/time.h>
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#include <asm/mach-au1x00/au1000.h>
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/*
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* I haven't found anyone that doesn't use a 12 MHz source clock,
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* but just in case.....
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*/
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#define AU1000_SRC_CLK 12000000
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static unsigned int au1x00_clock; /* Hz */
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static unsigned long uart_baud_base;
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/*
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* Set the au1000_clock
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*/
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void set_au1x00_speed(unsigned int new_freq)
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{
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au1x00_clock = new_freq;
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}
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unsigned int get_au1x00_speed(void)
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{
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return au1x00_clock;
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}
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EXPORT_SYMBOL(get_au1x00_speed);
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/*
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* The UART baud base is not known at compile time ... if
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* we want to be able to use the same code on different
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* speed CPUs.
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*/
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unsigned long get_au1x00_uart_baud_base(void)
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{
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return uart_baud_base;
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}
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void set_au1x00_uart_baud_base(unsigned long new_baud_base)
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{
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uart_baud_base = new_baud_base;
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}
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/*
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* We read the real processor speed from the PLL. This is important
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* because it is more accurate than computing it from the 32 KHz
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* counter, if it exists. If we don't have an accurate processor
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* speed, all of the peripherals that derive their clocks based on
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* this advertised speed will introduce error and sometimes not work
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* properly. This function is futher convoluted to still allow configurations
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* to do that in case they have really, really old silicon with a
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* write-only PLL register. -- Dan
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*/
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unsigned long au1xxx_calc_clock(void)
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{
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unsigned long cpu_speed;
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/*
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* On early Au1000, sys_cpupll was write-only. Since these
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* silicon versions of Au1000 are not sold by AMD, we don't bend
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* over backwards trying to determine the frequency.
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*/
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if (au1xxx_cpu_has_pll_wo())
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cpu_speed = 396000000;
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else
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cpu_speed = (au_readl(SYS_CPUPLL) & 0x0000003f) * AU1000_SRC_CLK;
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/* On Alchemy CPU:counter ratio is 1:1 */
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mips_hpt_frequency = cpu_speed;
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/* Equation: Baudrate = CPU / (SD * 2 * CLKDIV * 16) */
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set_au1x00_uart_baud_base(cpu_speed / (2 * ((int)(au_readl(SYS_POWERCTRL)
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& 0x03) + 2) * 16));
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set_au1x00_speed(cpu_speed);
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return cpu_speed;
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}
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