mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2025-02-14 10:55:54 +07:00
![Linus Torvalds](/assets/img/avatar_default.png)
Pull ARM updates from Russell King: "This contains the usual updates from other people (listed below) and the usual random muddle of miscellaneous ARM updates which cover some low priority bug fixes and performance improvements. I've started to put the pull request wording into the merge commits, which are: - NoMMU stuff: This includes the following series sent earlier to the list: - nommu-fixes - R7 Support - MPU support I've left out the ARCH_MULTIPLATFORM/!MMU stuff that Arnd and I were discussing today until we've reached a conclusion/that's had some more review. This is rebased (and re-tested) on your devel-stable branch because otherwise there were going to be conflicts with Uwe's V7M work now that you've merged that. I've included the fix for limiting MPU to CPU_V7. - Huge page support These changes bring both HugeTLB support and Transparent HugePage (THP) support to ARM. Only long descriptors (LPAE) are supported in this series. The code has been tested on an Arndale board (Exynos 5250). - LPAE updates Please pull these miscellaneous LPAE fixes I've been collecting for a while now for 3.11. They've been tested and reviewed by quite a few people, and most of the patches are pretty trivial. -- Will Deacon. - arch_timer cleanups Please pull these arch_timer cleanups I've been holding onto for a while. They're the same as my last posting, but have been rebased to v3.10-rc3. - mpidr linearisation (multiprocessor id register - identifies which CPU number we are in the system) This patch series that implements MPIDR linearization through a simple hashing algorithm and updates current cpu_{suspend}/{resume} code to use the newly created hash structures to retrieve context pointers. It represents a stepping stone for the implementation of power management code on forthcoming multi-cluster ARM systems. It has been tested on TC2 (dual cluster A15xA7 system), iMX6q, OMAP4 and Tegra, with processors hitting low-power states requiring warm-boot resume through the cpu_resume code path" * 'for-linus' of git://git.linaro.org/people/rmk/linux-arm: (77 commits) ARM: 7775/1: mm: Remove do_sect_fault from LPAE code ARM: 7777/1: Avoid extra calls to the C compiler ARM: 7774/1: Fix dtb dependency to use order-only prerequisites ARM: 7770/1: remove residual ARMv2 support from decompressor ARM: 7769/1: Cortex-A15: fix erratum 798181 implementation ARM: 7768/1: prevent risks of out-of-bound access in ASID allocator ARM: 7767/1: let the ASID allocator handle suspended animation ARM: 7766/1: versatile: don't mark pen as __INIT ARM: 7765/1: perf: Record the user-mode PC in the call chain. ARM: 7735/2: Preserve the user r/w register TPIDRURW on context switch and fork ARM: kernel: implement stack pointer save array through MPIDR hashing ARM: kernel: build MPIDR hash function data structure ARM: mpu: Ensure that MPU depends on CPU_V7 ARM: mpu: protect the vectors page with an MPU region ARM: mpu: Allow enabling of the MPU via kconfig ARM: 7758/1: introduce config HAS_BANDGAP ARM: 7757/1: mm: don't flush icache in switch_mm with hardware broadcasting ARM: 7751/1: zImage: don't overwrite ourself with a page table ARM: 7749/1: spinlock: retry trylock operation if strex fails on free lock ARM: 7748/1: oabi: handle faults when loading swi instruction from userspace ...
429 lines
9.5 KiB
Plaintext
429 lines
9.5 KiB
Plaintext
config ARCH_OMAP
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bool
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config ARCH_OMAP2PLUS
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bool "TI OMAP2/3/4/5 SoCs with device tree support" if (ARCH_MULTI_V6 || ARCH_MULTI_V7)
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select ARCH_HAS_CPUFREQ
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select ARCH_HAS_BANDGAP
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select ARCH_HAS_HOLES_MEMORYMODEL
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select ARCH_OMAP
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select ARCH_REQUIRE_GPIOLIB
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select CLKDEV_LOOKUP
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select CLKSRC_MMIO
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select GENERIC_CLOCKEVENTS
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select GENERIC_IRQ_CHIP
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select HAVE_CLK
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select OMAP_DM_TIMER
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select PINCTRL
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select PROC_DEVICETREE if PROC_FS
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select SOC_BUS
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select SPARSE_IRQ
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select TI_PRIV_EDMA
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select USE_OF
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help
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Systems based on OMAP2, OMAP3, OMAP4 or OMAP5
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if ARCH_OMAP2PLUS
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menu "TI OMAP2/3/4 Specific Features"
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config ARCH_OMAP2PLUS_TYPICAL
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bool "Typical OMAP configuration"
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default y
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select AEABI
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select HIGHMEM
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select I2C
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select I2C_OMAP
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select MENELAUS if ARCH_OMAP2
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select NEON if ARCH_OMAP3 || ARCH_OMAP4 || SOC_OMAP5
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select PM_RUNTIME
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select REGULATOR
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select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4
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select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4
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select VFP
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help
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Compile a kernel suitable for booting most boards
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config SOC_HAS_OMAP2_SDRC
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bool "OMAP2 SDRAM Controller support"
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config SOC_HAS_REALTIME_COUNTER
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bool "Real time free running counter"
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depends on SOC_OMAP5
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default y
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config ARCH_OMAP2
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bool "TI OMAP2"
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depends on ARCH_OMAP2PLUS
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depends on ARCH_MULTI_V6
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default y
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select CPU_V6
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select MULTI_IRQ_HANDLER
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select SOC_HAS_OMAP2_SDRC
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select COMMON_CLK
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config ARCH_OMAP3
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bool "TI OMAP3"
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depends on ARCH_OMAP2PLUS
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depends on ARCH_MULTI_V7
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default y
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select ARCH_HAS_OPP
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select ARM_CPU_SUSPEND if PM
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select CPU_V7
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select MULTI_IRQ_HANDLER
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select OMAP_INTERCONNECT
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select PM_OPP if PM
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select PM_RUNTIME if CPU_IDLE
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select SOC_HAS_OMAP2_SDRC
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select COMMON_CLK
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select USB_ARCH_HAS_EHCI if USB_SUPPORT
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config ARCH_OMAP4
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bool "TI OMAP4"
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default y
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depends on ARCH_OMAP2PLUS
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depends on ARCH_MULTI_V7
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select ARCH_HAS_OPP
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select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
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select ARM_CPU_SUSPEND if PM
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select ARM_ERRATA_720789
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select ARM_GIC
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select CACHE_L2X0
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select CPU_V7
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select HAVE_ARM_SCU if SMP
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select HAVE_ARM_TWD if LOCAL_TIMERS
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select HAVE_SMP
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select LOCAL_TIMERS if SMP
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select OMAP_INTERCONNECT
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select PL310_ERRATA_588369
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select PL310_ERRATA_727915
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select PM_OPP if PM
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select PM_RUNTIME if CPU_IDLE
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select USB_ARCH_HAS_EHCI if USB_SUPPORT
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select COMMON_CLK
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select ARM_ERRATA_754322
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select ARM_ERRATA_775420
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config SOC_OMAP5
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bool "TI OMAP5"
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depends on ARCH_MULTI_V7
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select ARM_CPU_SUSPEND if PM
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select ARM_GIC
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select CPU_V7
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select HAVE_SMP
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select COMMON_CLK
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select HAVE_ARM_ARCH_TIMER
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comment "OMAP Core Type"
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depends on ARCH_OMAP2
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config SOC_OMAP2420
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bool "OMAP2420 support"
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depends on ARCH_OMAP2
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default y
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select OMAP_DM_TIMER
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select SOC_HAS_OMAP2_SDRC
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config SOC_OMAP2430
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bool "OMAP2430 support"
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depends on ARCH_OMAP2
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default y
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select SOC_HAS_OMAP2_SDRC
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config SOC_OMAP3430
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bool "OMAP3430 support"
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depends on ARCH_OMAP3
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default y
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select SOC_HAS_OMAP2_SDRC
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config SOC_TI81XX
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bool "TI81XX support"
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depends on ARCH_OMAP3
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default y
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config SOC_AM33XX
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bool "AM33XX support"
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depends on ARCH_MULTI_V7
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default y
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select ARM_CPU_SUSPEND if PM
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select CPU_V7
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select MULTI_IRQ_HANDLER
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select COMMON_CLK
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config SOC_AM43XX
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bool "TI AM43x"
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select CPU_V7
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select MULTI_IRQ_HANDLER
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select ARM_GIC
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select COMMON_CLK
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select MACH_OMAP_GENERIC
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config OMAP_PACKAGE_ZAF
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bool
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config OMAP_PACKAGE_ZAC
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bool
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config OMAP_PACKAGE_CBC
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bool
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config OMAP_PACKAGE_CBB
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bool
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config OMAP_PACKAGE_CUS
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bool
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config OMAP_PACKAGE_CBP
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bool
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comment "OMAP Board Type"
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depends on ARCH_OMAP2PLUS
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config MACH_OMAP_GENERIC
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bool "Generic OMAP2+ board"
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depends on ARCH_OMAP2PLUS
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default y
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help
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Support for generic TI OMAP2+ boards using Flattened Device Tree.
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More information at Documentation/devicetree
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config MACH_OMAP2_TUSB6010
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bool
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depends on ARCH_OMAP2 && SOC_OMAP2420
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default y if MACH_NOKIA_N8X0
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config MACH_OMAP_H4
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bool "OMAP 2420 H4 board"
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depends on SOC_OMAP2420
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default y
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select OMAP_DEBUG_DEVICES
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select OMAP_PACKAGE_ZAF
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config MACH_OMAP_2430SDP
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bool "OMAP 2430 SDP board"
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depends on SOC_OMAP2430
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default y
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select OMAP_PACKAGE_ZAC
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config MACH_OMAP3_BEAGLE
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bool "OMAP3 BEAGLE board"
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depends on ARCH_OMAP3
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default y
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select OMAP_PACKAGE_CBB
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config MACH_DEVKIT8000
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bool "DEVKIT8000 board"
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depends on ARCH_OMAP3
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default y
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select OMAP_PACKAGE_CUS
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config MACH_OMAP_LDP
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bool "OMAP3 LDP board"
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depends on ARCH_OMAP3
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default y
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select OMAP_PACKAGE_CBB
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config MACH_OMAP3530_LV_SOM
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bool "OMAP3 Logic 3530 LV SOM board"
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depends on ARCH_OMAP3
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default y
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select OMAP_PACKAGE_CBB
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help
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Support for the LogicPD OMAP3530 SOM Development kit
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for full description please see the products webpage at
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http://www.logicpd.com/products/development-kits/texas-instruments-zoom%E2%84%A2-omap35x-development-kit
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config MACH_OMAP3_TORPEDO
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bool "OMAP3 Logic 35x Torpedo board"
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depends on ARCH_OMAP3
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default y
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select OMAP_PACKAGE_CBB
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help
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Support for the LogicPD OMAP35x Torpedo Development kit
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for full description please see the products webpage at
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http://www.logicpd.com/products/development-kits/zoom-omap35x-torpedo-development-kit
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config MACH_OVERO
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bool "Gumstix Overo board"
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depends on ARCH_OMAP3
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default y
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select OMAP_PACKAGE_CBB
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config MACH_OMAP3EVM
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bool "OMAP 3530 EVM board"
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depends on ARCH_OMAP3
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default y
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select OMAP_PACKAGE_CBB
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config MACH_OMAP3517EVM
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bool "OMAP3517/ AM3517 EVM board"
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depends on ARCH_OMAP3
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default y
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select OMAP_PACKAGE_CBB
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config MACH_CRANEBOARD
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bool "AM3517/05 CRANE board"
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depends on ARCH_OMAP3
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select OMAP_PACKAGE_CBB
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config MACH_OMAP3_PANDORA
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bool "OMAP3 Pandora"
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depends on ARCH_OMAP3
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default y
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select OMAP_PACKAGE_CBB
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select REGULATOR_FIXED_VOLTAGE if REGULATOR
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config MACH_TOUCHBOOK
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bool "OMAP3 Touch Book"
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depends on ARCH_OMAP3
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default y
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select OMAP_PACKAGE_CBB
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config MACH_OMAP_3430SDP
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bool "OMAP 3430 SDP board"
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depends on ARCH_OMAP3
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default y
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select OMAP_PACKAGE_CBB
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config MACH_NOKIA_N800
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bool
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config MACH_NOKIA_N810
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bool
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config MACH_NOKIA_N810_WIMAX
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bool
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config MACH_NOKIA_N8X0
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bool "Nokia N800/N810"
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depends on SOC_OMAP2420
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default y
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select MACH_NOKIA_N800
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select MACH_NOKIA_N810
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select MACH_NOKIA_N810_WIMAX
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select OMAP_PACKAGE_ZAC
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config MACH_NOKIA_RM680
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bool "Nokia N950 (RM-680) / N9 (RM-696) phones"
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depends on ARCH_OMAP3
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default y
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select MACH_NOKIA_RM696
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select OMAP_PACKAGE_CBB
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config MACH_NOKIA_RX51
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bool "Nokia N900 (RX-51) phone"
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depends on ARCH_OMAP3
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default y
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select OMAP_PACKAGE_CBB
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config MACH_OMAP_ZOOM2
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bool "OMAP3 Zoom2 board"
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depends on ARCH_OMAP3
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default y
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select OMAP_PACKAGE_CBB
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select REGULATOR_FIXED_VOLTAGE if REGULATOR
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config MACH_OMAP_ZOOM3
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bool "OMAP3630 Zoom3 board"
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depends on ARCH_OMAP3
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default y
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select OMAP_PACKAGE_CBP
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select REGULATOR_FIXED_VOLTAGE if REGULATOR
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config MACH_CM_T35
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bool "CompuLab CM-T35/CM-T3730 modules"
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depends on ARCH_OMAP3
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default y
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select MACH_CM_T3730
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select OMAP_PACKAGE_CUS
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config MACH_CM_T3517
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bool "CompuLab CM-T3517 module"
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depends on ARCH_OMAP3
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default y
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select OMAP_PACKAGE_CBB
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config MACH_CM_T3730
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bool
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config MACH_IGEP0020
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bool "IGEP v2 board"
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depends on ARCH_OMAP3
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default y
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select OMAP_PACKAGE_CBB
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config MACH_IGEP0030
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bool "IGEP OMAP3 module"
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depends on ARCH_OMAP3
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default y
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select MACH_IGEP0020
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select OMAP_PACKAGE_CBB
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config MACH_SBC3530
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bool "OMAP3 SBC STALKER board"
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depends on ARCH_OMAP3
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default y
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select OMAP_PACKAGE_CUS
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config MACH_OMAP_3630SDP
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bool "OMAP3630 SDP board"
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depends on ARCH_OMAP3
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default y
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select OMAP_PACKAGE_CBP
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config MACH_TI8168EVM
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bool "TI8168 Evaluation Module"
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depends on SOC_TI81XX
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default y
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config MACH_TI8148EVM
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bool "TI8148 Evaluation Module"
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depends on SOC_TI81XX
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default y
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config OMAP3_EMU
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bool "OMAP3 debugging peripherals"
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depends on ARCH_OMAP3
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select ARM_AMBA
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select OC_ETM
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help
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Say Y here to enable debugging hardware of omap3
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config OMAP3_SDRC_AC_TIMING
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bool "Enable SDRC AC timing register changes"
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depends on ARCH_OMAP3
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default n
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help
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If you know that none of your system initiators will attempt to
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access SDRAM during CORE DVFS, select Y here. This should boost
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SDRAM performance at lower CORE OPPs. There are relatively few
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users who will wish to say yes at this point - almost everyone will
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wish to say no. Selecting yes without understanding what is
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going on could result in system crashes;
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config OMAP4_ERRATA_I688
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bool "OMAP4 errata: Async Bridge Corruption"
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depends on (ARCH_OMAP4 || SOC_OMAP5) && !ARCH_MULTIPLATFORM
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select ARCH_HAS_BARRIERS
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help
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If a data is stalled inside asynchronous bridge because of back
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pressure, it may be accepted multiple times, creating pointer
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misalignment that will corrupt next transfers on that data path
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until next reset of the system (No recovery procedure once the
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issue is hit, the path remains consistently broken). Async bridge
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can be found on path between MPU to EMIF and MPU to L3 interconnect.
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This situation can happen only when the idle is initiated by a
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Master Request Disconnection (which is trigged by software when
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executing WFI on CPU).
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The work-around for this errata needs all the initiators connected
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through async bridge must ensure that data path is properly drained
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before issuing WFI. This condition will be met if one Strongly ordered
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access is performed to the target right before executing the WFI.
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In MPU case, L3 T2ASYNC FIFO and DDR T2ASYNC FIFO needs to be drained.
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IO barrier ensure that there is no synchronisation loss on initiators
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operating on both interconnect port simultaneously.
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endmenu
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endif
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