mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-16 03:58:46 +07:00
cc440cdad5
Similar to VMX, the state that is captured through the currently available IOCTLs is a mix of L1 and L2 state, dependent on whether the L2 guest was running at the moment when the process was interrupted to save its state. In particular, the SVM-specific state for nested virtualization includes the L1 saved state (including the interrupt flag), the cached L2 controls, and the GIF. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
312 lines
8.5 KiB
C
312 lines
8.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef ARCH_X86_KVM_CPUID_H
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#define ARCH_X86_KVM_CPUID_H
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#include "x86.h"
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#include <asm/cpu.h>
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#include <asm/processor.h>
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extern u32 kvm_cpu_caps[NCAPINTS] __read_mostly;
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void kvm_set_cpu_caps(void);
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int kvm_update_cpuid(struct kvm_vcpu *vcpu);
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struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
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u32 function, u32 index);
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int kvm_dev_ioctl_get_cpuid(struct kvm_cpuid2 *cpuid,
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struct kvm_cpuid_entry2 __user *entries,
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unsigned int type);
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int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
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struct kvm_cpuid *cpuid,
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struct kvm_cpuid_entry __user *entries);
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int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
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struct kvm_cpuid2 *cpuid,
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struct kvm_cpuid_entry2 __user *entries);
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int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
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struct kvm_cpuid2 *cpuid,
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struct kvm_cpuid_entry2 __user *entries);
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bool kvm_cpuid(struct kvm_vcpu *vcpu, u32 *eax, u32 *ebx,
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u32 *ecx, u32 *edx, bool exact_only);
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int cpuid_query_maxphyaddr(struct kvm_vcpu *vcpu);
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static inline int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
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{
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return vcpu->arch.maxphyaddr;
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}
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struct cpuid_reg {
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u32 function;
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u32 index;
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int reg;
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};
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static const struct cpuid_reg reverse_cpuid[] = {
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[CPUID_1_EDX] = { 1, 0, CPUID_EDX},
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[CPUID_8000_0001_EDX] = {0x80000001, 0, CPUID_EDX},
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[CPUID_8086_0001_EDX] = {0x80860001, 0, CPUID_EDX},
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[CPUID_1_ECX] = { 1, 0, CPUID_ECX},
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[CPUID_C000_0001_EDX] = {0xc0000001, 0, CPUID_EDX},
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[CPUID_8000_0001_ECX] = {0x80000001, 0, CPUID_ECX},
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[CPUID_7_0_EBX] = { 7, 0, CPUID_EBX},
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[CPUID_D_1_EAX] = { 0xd, 1, CPUID_EAX},
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[CPUID_8000_0008_EBX] = {0x80000008, 0, CPUID_EBX},
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[CPUID_6_EAX] = { 6, 0, CPUID_EAX},
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[CPUID_8000_000A_EDX] = {0x8000000a, 0, CPUID_EDX},
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[CPUID_7_ECX] = { 7, 0, CPUID_ECX},
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[CPUID_8000_0007_EBX] = {0x80000007, 0, CPUID_EBX},
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[CPUID_7_EDX] = { 7, 0, CPUID_EDX},
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[CPUID_7_1_EAX] = { 7, 1, CPUID_EAX},
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};
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/*
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* Reverse CPUID and its derivatives can only be used for hardware-defined
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* feature words, i.e. words whose bits directly correspond to a CPUID leaf.
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* Retrieving a feature bit or masking guest CPUID from a Linux-defined word
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* is nonsensical as the bit number/mask is an arbitrary software-defined value
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* and can't be used by KVM to query/control guest capabilities. And obviously
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* the leaf being queried must have an entry in the lookup table.
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*/
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static __always_inline void reverse_cpuid_check(unsigned int x86_leaf)
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{
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BUILD_BUG_ON(x86_leaf == CPUID_LNX_1);
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BUILD_BUG_ON(x86_leaf == CPUID_LNX_2);
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BUILD_BUG_ON(x86_leaf == CPUID_LNX_3);
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BUILD_BUG_ON(x86_leaf == CPUID_LNX_4);
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BUILD_BUG_ON(x86_leaf >= ARRAY_SIZE(reverse_cpuid));
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BUILD_BUG_ON(reverse_cpuid[x86_leaf].function == 0);
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}
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/*
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* Retrieve the bit mask from an X86_FEATURE_* definition. Features contain
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* the hardware defined bit number (stored in bits 4:0) and a software defined
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* "word" (stored in bits 31:5). The word is used to index into arrays of
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* bit masks that hold the per-cpu feature capabilities, e.g. this_cpu_has().
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*/
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static __always_inline u32 __feature_bit(int x86_feature)
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{
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reverse_cpuid_check(x86_feature / 32);
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return 1 << (x86_feature & 31);
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}
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#define feature_bit(name) __feature_bit(X86_FEATURE_##name)
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static __always_inline struct cpuid_reg x86_feature_cpuid(unsigned int x86_feature)
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{
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unsigned int x86_leaf = x86_feature / 32;
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reverse_cpuid_check(x86_leaf);
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return reverse_cpuid[x86_leaf];
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}
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static __always_inline u32 *__cpuid_entry_get_reg(struct kvm_cpuid_entry2 *entry,
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u32 reg)
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{
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switch (reg) {
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case CPUID_EAX:
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return &entry->eax;
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case CPUID_EBX:
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return &entry->ebx;
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case CPUID_ECX:
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return &entry->ecx;
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case CPUID_EDX:
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return &entry->edx;
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default:
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BUILD_BUG();
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return NULL;
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}
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}
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static __always_inline u32 *cpuid_entry_get_reg(struct kvm_cpuid_entry2 *entry,
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unsigned int x86_feature)
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{
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const struct cpuid_reg cpuid = x86_feature_cpuid(x86_feature);
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return __cpuid_entry_get_reg(entry, cpuid.reg);
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}
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static __always_inline u32 cpuid_entry_get(struct kvm_cpuid_entry2 *entry,
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unsigned int x86_feature)
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{
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u32 *reg = cpuid_entry_get_reg(entry, x86_feature);
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return *reg & __feature_bit(x86_feature);
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}
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static __always_inline bool cpuid_entry_has(struct kvm_cpuid_entry2 *entry,
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unsigned int x86_feature)
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{
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return cpuid_entry_get(entry, x86_feature);
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}
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static __always_inline void cpuid_entry_clear(struct kvm_cpuid_entry2 *entry,
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unsigned int x86_feature)
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{
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u32 *reg = cpuid_entry_get_reg(entry, x86_feature);
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*reg &= ~__feature_bit(x86_feature);
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}
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static __always_inline void cpuid_entry_set(struct kvm_cpuid_entry2 *entry,
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unsigned int x86_feature)
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{
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u32 *reg = cpuid_entry_get_reg(entry, x86_feature);
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*reg |= __feature_bit(x86_feature);
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}
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static __always_inline void cpuid_entry_change(struct kvm_cpuid_entry2 *entry,
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unsigned int x86_feature,
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bool set)
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{
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u32 *reg = cpuid_entry_get_reg(entry, x86_feature);
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/*
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* Open coded instead of using cpuid_entry_{clear,set}() to coerce the
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* compiler into using CMOV instead of Jcc when possible.
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*/
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if (set)
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*reg |= __feature_bit(x86_feature);
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else
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*reg &= ~__feature_bit(x86_feature);
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}
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static __always_inline void cpuid_entry_override(struct kvm_cpuid_entry2 *entry,
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enum cpuid_leafs leaf)
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{
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u32 *reg = cpuid_entry_get_reg(entry, leaf * 32);
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BUILD_BUG_ON(leaf >= ARRAY_SIZE(kvm_cpu_caps));
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*reg = kvm_cpu_caps[leaf];
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}
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static __always_inline u32 *guest_cpuid_get_register(struct kvm_vcpu *vcpu,
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unsigned int x86_feature)
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{
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const struct cpuid_reg cpuid = x86_feature_cpuid(x86_feature);
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struct kvm_cpuid_entry2 *entry;
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entry = kvm_find_cpuid_entry(vcpu, cpuid.function, cpuid.index);
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if (!entry)
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return NULL;
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return __cpuid_entry_get_reg(entry, cpuid.reg);
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}
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static __always_inline bool guest_cpuid_has(struct kvm_vcpu *vcpu,
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unsigned int x86_feature)
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{
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u32 *reg;
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reg = guest_cpuid_get_register(vcpu, x86_feature);
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if (!reg)
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return false;
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return *reg & __feature_bit(x86_feature);
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}
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static __always_inline void guest_cpuid_clear(struct kvm_vcpu *vcpu,
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unsigned int x86_feature)
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{
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u32 *reg;
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reg = guest_cpuid_get_register(vcpu, x86_feature);
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if (reg)
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*reg &= ~__feature_bit(x86_feature);
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}
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static inline bool guest_cpuid_is_amd_or_hygon(struct kvm_vcpu *vcpu)
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{
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struct kvm_cpuid_entry2 *best;
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best = kvm_find_cpuid_entry(vcpu, 0, 0);
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return best &&
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(is_guest_vendor_amd(best->ebx, best->ecx, best->edx) ||
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is_guest_vendor_hygon(best->ebx, best->ecx, best->edx));
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}
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static inline int guest_cpuid_family(struct kvm_vcpu *vcpu)
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{
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struct kvm_cpuid_entry2 *best;
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best = kvm_find_cpuid_entry(vcpu, 0x1, 0);
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if (!best)
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return -1;
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return x86_family(best->eax);
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}
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static inline int guest_cpuid_model(struct kvm_vcpu *vcpu)
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{
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struct kvm_cpuid_entry2 *best;
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best = kvm_find_cpuid_entry(vcpu, 0x1, 0);
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if (!best)
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return -1;
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return x86_model(best->eax);
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}
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static inline int guest_cpuid_stepping(struct kvm_vcpu *vcpu)
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{
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struct kvm_cpuid_entry2 *best;
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best = kvm_find_cpuid_entry(vcpu, 0x1, 0);
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if (!best)
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return -1;
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return x86_stepping(best->eax);
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}
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static inline bool supports_cpuid_fault(struct kvm_vcpu *vcpu)
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{
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return vcpu->arch.msr_platform_info & MSR_PLATFORM_INFO_CPUID_FAULT;
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}
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static inline bool cpuid_fault_enabled(struct kvm_vcpu *vcpu)
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{
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return vcpu->arch.msr_misc_features_enables &
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MSR_MISC_FEATURES_ENABLES_CPUID_FAULT;
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}
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static __always_inline void kvm_cpu_cap_clear(unsigned int x86_feature)
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{
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unsigned int x86_leaf = x86_feature / 32;
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reverse_cpuid_check(x86_leaf);
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kvm_cpu_caps[x86_leaf] &= ~__feature_bit(x86_feature);
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}
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static __always_inline void kvm_cpu_cap_set(unsigned int x86_feature)
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{
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unsigned int x86_leaf = x86_feature / 32;
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reverse_cpuid_check(x86_leaf);
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kvm_cpu_caps[x86_leaf] |= __feature_bit(x86_feature);
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}
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static __always_inline u32 kvm_cpu_cap_get(unsigned int x86_feature)
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{
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unsigned int x86_leaf = x86_feature / 32;
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reverse_cpuid_check(x86_leaf);
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return kvm_cpu_caps[x86_leaf] & __feature_bit(x86_feature);
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}
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static __always_inline bool kvm_cpu_cap_has(unsigned int x86_feature)
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{
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return !!kvm_cpu_cap_get(x86_feature);
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}
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static __always_inline void kvm_cpu_cap_check_and_set(unsigned int x86_feature)
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{
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if (boot_cpu_has(x86_feature))
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kvm_cpu_cap_set(x86_feature);
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}
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static inline bool page_address_valid(struct kvm_vcpu *vcpu, gpa_t gpa)
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{
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return PAGE_ALIGNED(gpa) && !(gpa >> cpuid_maxphyaddr(vcpu));
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}
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#endif
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