mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-26 08:45:08 +07:00
ec939e4c94
Various driver updates for platforms:
- A larger set of work on Tegra 2/3 around memory controller and
regulator features, some fuse cleanups, etc..
- MMP platform drivers, in particular for USB PHY, and other smaller
additions.
- Samsung Exynos 5422 driver for DMC (dynamic memory configuration),
and ASV (adaptive voltage), allowing the platform to run at more
optimal operating points.
- Misc refactorings and support for RZ/G2N and R8A774B1 from Renesas
- Clock/reset control driver for TI/OMAP
- Meson-A1 reset controller support
- Qualcomm sdm845 and sda845 SoC IDs for socinfo
-----BEGIN PGP SIGNATURE-----
iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAl3pORkPHG9sb2ZAbGl4
b20ubmV0AAoJEIwa5zzehBx3FK0P/0EG4lK+il7nE3pd9yIGUjlcYuumIjoxvyC9
9ef202POJLIO3yMlsNyGFR+aOknFO/GtGvDkDFhTtlsGCL40tVzVsyo7ZQo+8mXD
abr+H74NmRXImc+SISYR8X1CD6vEi3oi/no1y5dRzknlBikfsdSLKXJSMYBJ2A6t
DNLwu0h1IZhPk7XQQsxaElG/a9HN8eueMdP20J1IlhOh0GiOwm+rbsLSZNbA/W9m
53XhFs3Ag39SDE0BfXsS+XOWTE7FheZsZk2XQrOwYm9PnxjpIWH7FE2sYsk6uUIc
Pa1b6wB5zlRnxvVHP0m3GXhbTUJDYDK3oybHffI4Mzd0cyZQHC92LhUXFrlTxkaf
6kyhJOTdd5KMlZ2LS7jkwLqb30ieXBPKAREjdbRt6hpvu5P6G+bZQphTEeNAZC61
XnX8mQ/XeoHdoGY5MvS8ht6a1qDF29ebA0/02seicThGK6tS9Qsju6Zo0sg9H1NH
weK6jDuzLq5jpv/LB1apigrDSx+zddRzrwkwy85hR5aWOQhG0xjOoFBProbTS0to
wR46zCEkbGZv4uc0gRuIdp0NR/lguqgDWPeoLluoTqmcpKS6N3RyxD0bWzlvgDFA
fpYxVNKavHneWjfZ7U5RbYXD6jycJcuLaCOs16nrtUbMgJ9pqclLIaZXn7ZTRIuT
RW6NgfZV
=dk7w
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC driver updates from Olof Johansson:
"Various driver updates for platforms:
- A larger set of work on Tegra 2/3 around memory controller and
regulator features, some fuse cleanups, etc..
- MMP platform drivers, in particular for USB PHY, and other smaller
additions.
- Samsung Exynos 5422 driver for DMC (dynamic memory configuration),
and ASV (adaptive voltage), allowing the platform to run at more
optimal operating points.
- Misc refactorings and support for RZ/G2N and R8A774B1 from Renesas
- Clock/reset control driver for TI/OMAP
- Meson-A1 reset controller support
- Qualcomm sdm845 and sda845 SoC IDs for socinfo"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (150 commits)
firmware: arm_scmi: Fix doorbell ring logic for !CONFIG_64BIT
soc: fsl: add RCPM driver
dt-bindings: fsl: rcpm: Add 'little-endian' and update Chassis definition
memory: tegra: Consolidate registers definition into common header
memory: tegra: Ensure timing control debug features are disabled
memory: tegra: Introduce Tegra30 EMC driver
memory: tegra: Do not handle error from wait_for_completion_timeout()
memory: tegra: Increase handshake timeout on Tegra20
memory: tegra: Print a brief info message about EMC timings
memory: tegra: Pre-configure debug register on Tegra20
memory: tegra: Include io.h instead of iopoll.h
memory: tegra: Adapt for Tegra20 clock driver changes
memory: tegra: Don't set EMC rate to maximum on probe for Tegra20
memory: tegra: Add gr2d and gr3d to DRM IOMMU group
memory: tegra: Set DMA mask based on supported address bits
soc: at91: Add Atmel SFR SN (Serial Number) support
memory: atmel-ebi: switch to SPDX license identifiers
memory: atmel-ebi: move NUM_CS definition inside EBI driver
soc: mediatek: Refactor bus protection control
soc: mediatek: Refactor sram control
...
93 lines
3.1 KiB
C
93 lines
3.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
|
|
#ifndef _LINUX_RESET_CONTROLLER_H_
|
|
#define _LINUX_RESET_CONTROLLER_H_
|
|
|
|
#include <linux/list.h>
|
|
|
|
struct reset_controller_dev;
|
|
|
|
/**
|
|
* struct reset_control_ops - reset controller driver callbacks
|
|
*
|
|
* @reset: for self-deasserting resets, does all necessary
|
|
* things to reset the device
|
|
* @assert: manually assert the reset line, if supported
|
|
* @deassert: manually deassert the reset line, if supported
|
|
* @status: return the status of the reset line, if supported
|
|
*/
|
|
struct reset_control_ops {
|
|
int (*reset)(struct reset_controller_dev *rcdev, unsigned long id);
|
|
int (*assert)(struct reset_controller_dev *rcdev, unsigned long id);
|
|
int (*deassert)(struct reset_controller_dev *rcdev, unsigned long id);
|
|
int (*status)(struct reset_controller_dev *rcdev, unsigned long id);
|
|
};
|
|
|
|
struct module;
|
|
struct device_node;
|
|
struct of_phandle_args;
|
|
|
|
/**
|
|
* struct reset_control_lookup - represents a single lookup entry
|
|
*
|
|
* @list: internal list of all reset lookup entries
|
|
* @provider: name of the reset controller device controlling this reset line
|
|
* @index: ID of the reset controller in the reset controller device
|
|
* @dev_id: name of the device associated with this reset line
|
|
* @con_id: name of the reset line (can be NULL)
|
|
*/
|
|
struct reset_control_lookup {
|
|
struct list_head list;
|
|
const char *provider;
|
|
unsigned int index;
|
|
const char *dev_id;
|
|
const char *con_id;
|
|
};
|
|
|
|
#define RESET_LOOKUP(_provider, _index, _dev_id, _con_id) \
|
|
{ \
|
|
.provider = _provider, \
|
|
.index = _index, \
|
|
.dev_id = _dev_id, \
|
|
.con_id = _con_id, \
|
|
}
|
|
|
|
/**
|
|
* struct reset_controller_dev - reset controller entity that might
|
|
* provide multiple reset controls
|
|
* @ops: a pointer to device specific struct reset_control_ops
|
|
* @owner: kernel module of the reset controller driver
|
|
* @list: internal list of reset controller devices
|
|
* @reset_control_head: head of internal list of requested reset controls
|
|
* @dev: corresponding driver model device struct
|
|
* @of_node: corresponding device tree node as phandle target
|
|
* @of_reset_n_cells: number of cells in reset line specifiers
|
|
* @of_xlate: translation function to translate from specifier as found in the
|
|
* device tree to id as given to the reset control ops, defaults
|
|
* to :c:func:`of_reset_simple_xlate`.
|
|
* @nr_resets: number of reset controls in this reset controller device
|
|
*/
|
|
struct reset_controller_dev {
|
|
const struct reset_control_ops *ops;
|
|
struct module *owner;
|
|
struct list_head list;
|
|
struct list_head reset_control_head;
|
|
struct device *dev;
|
|
struct device_node *of_node;
|
|
int of_reset_n_cells;
|
|
int (*of_xlate)(struct reset_controller_dev *rcdev,
|
|
const struct of_phandle_args *reset_spec);
|
|
unsigned int nr_resets;
|
|
};
|
|
|
|
int reset_controller_register(struct reset_controller_dev *rcdev);
|
|
void reset_controller_unregister(struct reset_controller_dev *rcdev);
|
|
|
|
struct device;
|
|
int devm_reset_controller_register(struct device *dev,
|
|
struct reset_controller_dev *rcdev);
|
|
|
|
void reset_controller_add_lookup(struct reset_control_lookup *lookup,
|
|
unsigned int num_entries);
|
|
|
|
#endif
|