mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-22 11:58:21 +07:00
b72ce26cb7
The iWave RZ/G1N board is almost identical to RZ/G1M. cmt and rwdt modules are SoC specific and should be part of board dts rather than SoM dtsi. By moving these nodes to the common dtsi it allows cmt and rwdt to be enabled on both of these boards with less lines of code. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
96 lines
1.7 KiB
Plaintext
96 lines
1.7 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree Source for the iWave-RZG1M-20M Qseven SOM
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*
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* Copyright (C) 2017 Renesas Electronics Corp.
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*/
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#include "r8a7743.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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compatible = "iwave,g20m", "renesas,r8a7743";
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memory@40000000 {
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device_type = "memory";
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reg = <0 0x40000000 0 0x20000000>;
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};
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memory@200000000 {
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device_type = "memory";
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reg = <2 0x00000000 0 0x20000000>;
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};
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reg_3p3v: 3p3v {
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compatible = "regulator-fixed";
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regulator-name = "3P3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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regulator-boot-on;
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};
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};
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&extal_clk {
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clock-frequency = <20000000>;
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};
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&pfc {
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mmcif0_pins: mmc {
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groups = "mmc_data8_b", "mmc_ctrl";
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function = "mmc";
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};
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qspi_pins: qspi {
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groups = "qspi_ctrl", "qspi_data2";
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function = "qspi";
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};
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sdhi0_pins: sd0 {
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groups = "sdhi0_data4", "sdhi0_ctrl";
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function = "sdhi0";
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power-source = <3300>;
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};
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};
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&mmcif0 {
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pinctrl-0 = <&mmcif0_pins>;
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pinctrl-names = "default";
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vmmc-supply = <®_3p3v>;
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bus-width = <8>;
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non-removable;
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status = "okay";
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};
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&qspi {
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pinctrl-0 = <&qspi_pins>;
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pinctrl-names = "default";
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status = "okay";
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/* WARNING - This device contains the bootloader. Handle with care. */
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flash: flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "sst,sst25vf016b", "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <50000000>;
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spi-tx-bus-width = <1>;
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spi-rx-bus-width = <1>;
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m25p,fast-read;
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spi-cpol;
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spi-cpha;
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};
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};
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&sdhi0 {
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pinctrl-0 = <&sdhi0_pins>;
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pinctrl-names = "default";
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vmmc-supply = <®_3p3v>;
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vqmmc-supply = <®_3p3v>;
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cd-gpios = <&gpio7 11 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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