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aecc313490
SolidRun Clearfog GTR L8 and S4 SBCs are based on Armada 385. They features 8 (L8) or 4 (S4) switched Ethernet ports, 1 1Gb Ethernet port, 1 directly connected SFP port, 1 SFP port behind the switch (not currently described in DT), 3 mini-PCIe slots, eMMC, SPI flash, USB3 port. https://developer.solid-run.com/products/clearfog-gtr-a385/ Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
80 lines
1.2 KiB
Plaintext
80 lines
1.2 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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#include "armada-385-clearfog-gtr.dtsi"
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/ {
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model = "SolidRun Clearfog GTR S4";
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};
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&sfp0 {
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tx-fault-gpio = <&gpio0 24 GPIO_ACTIVE_HIGH>;
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};
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&mdio {
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switch0: switch0@4 {
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compatible = "marvell,mv88e6085";
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reg = <4>;
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pinctrl-names = "default";
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pinctrl-0 = <&cf_gtr_switch_reset_pins>;
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reset-gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@1 {
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reg = <1>;
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label = "lan2";
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phy-handle = <&switch0phy0>;
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};
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port@2 {
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reg = <2>;
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label = "lan1";
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phy-handle = <&switch0phy1>;
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};
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port@3 {
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reg = <3>;
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label = "lan4";
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phy-handle = <&switch0phy2>;
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};
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port@4 {
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reg = <4>;
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label = "lan3";
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phy-handle = <&switch0phy3>;
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};
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port@5 {
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reg = <5>;
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label = "cpu";
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ethernet = <ð1>;
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};
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};
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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switch0phy0: switch0phy0@11 {
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reg = <0x11>;
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};
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switch0phy1: switch0phy1@12 {
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reg = <0x12>;
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};
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switch0phy2: switch0phy2@13 {
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reg = <0x13>;
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};
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switch0phy3: switch0phy3@14 {
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reg = <0x14>;
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};
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};
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};
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};
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