linux_dsm_epyc7002/drivers/media/video/s5p-mfc/s5p_mfc_pm.c
Kamil Debski af93574678 [media] MFC: Add MFC 5.1 V4L2 driver
Multi Format Codec 5.1 is a hardware video coding acceleration
module found in the S5PV210 and Exynos4 Samsung SoCs. It is
capable of handling a range of video codecs and this driver
provides a V4L2 interface for video decoding and encoding.

Signed-off-by: Kamil Debski <k.debski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Jeongtae Park <jtp.park@samsung.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
2011-07-27 17:56:00 -03:00

118 lines
2.3 KiB
C

/*
* linux/drivers/media/video/s5p-mfc/s5p_mfc_pm.c
*
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
* http://www.samsung.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/platform_device.h>
#ifdef CONFIG_PM_RUNTIME
#include <linux/pm_runtime.h>
#endif
#include "s5p_mfc_common.h"
#include "s5p_mfc_debug.h"
#include "s5p_mfc_pm.h"
#define MFC_CLKNAME "sclk_mfc"
#define MFC_GATE_CLK_NAME "mfc"
#define CLK_DEBUG
static struct s5p_mfc_pm *pm;
static struct s5p_mfc_dev *p_dev;
#ifdef CLK_DEBUG
atomic_t clk_ref;
#endif
int s5p_mfc_init_pm(struct s5p_mfc_dev *dev)
{
int ret = 0;
pm = &dev->pm;
p_dev = dev;
pm->clock_gate = clk_get(&dev->plat_dev->dev, MFC_GATE_CLK_NAME);
if (IS_ERR(pm->clock_gate)) {
mfc_err("Failed to get clock-gating control\n");
ret = -ENOENT;
goto err_g_ip_clk;
}
pm->clock = clk_get(&dev->plat_dev->dev, MFC_CLKNAME);
if (IS_ERR(pm->clock)) {
mfc_err("Failed to get MFC clock\n");
ret = -ENOENT;
goto err_g_ip_clk_2;
}
atomic_set(&pm->power, 0);
#ifdef CONFIG_PM_RUNTIME
pm->device = &dev->plat_dev->dev;
pm_runtime_enable(pm->device);
#endif
#ifdef CLK_DEBUG
atomic_set(&clk_ref, 0);
#endif
return 0;
err_g_ip_clk_2:
clk_put(pm->clock_gate);
err_g_ip_clk:
return ret;
}
void s5p_mfc_final_pm(struct s5p_mfc_dev *dev)
{
clk_put(pm->clock_gate);
clk_put(pm->clock);
#ifdef CONFIG_PM_RUNTIME
pm_runtime_disable(pm->device);
#endif
}
int s5p_mfc_clock_on(void)
{
int ret;
#ifdef CLK_DEBUG
atomic_inc(&clk_ref);
mfc_debug(3, "+ %d", atomic_read(&clk_ref));
#endif
ret = clk_enable(pm->clock_gate);
return ret;
}
void s5p_mfc_clock_off(void)
{
#ifdef CLK_DEBUG
atomic_dec(&clk_ref);
mfc_debug(3, "- %d", atomic_read(&clk_ref));
#endif
clk_disable(pm->clock_gate);
}
int s5p_mfc_power_on(void)
{
#ifdef CONFIG_PM_RUNTIME
return pm_runtime_get_sync(pm->device);
#else
atomic_set(&pm->power, 1);
return 0;
#endif
}
int s5p_mfc_power_off(void)
{
#ifdef CONFIG_PM_RUNTIME
return pm_runtime_put_sync(pm->device);
#else
atomic_set(&pm->power, 0);
return 0;
#endif
}