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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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3c30a4a357
In order to move realview into multiplatform, we have to prevent device drivers from accessing the machine header files. In case of the clk driver, this is very simple, we just copy the small set of register definitions into the driver that needs them. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
99 lines
2.8 KiB
C
99 lines
2.8 KiB
C
/*
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* Clock driver for the ARM RealView boards
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* Copyright (C) 2012 Linus Walleij
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/clkdev.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/clk-provider.h>
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#include "clk-icst.h"
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#define REALVIEW_SYS_OSC0_OFFSET 0x0C
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#define REALVIEW_SYS_OSC1_OFFSET 0x10
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#define REALVIEW_SYS_OSC2_OFFSET 0x14
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#define REALVIEW_SYS_OSC3_OFFSET 0x18
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#define REALVIEW_SYS_OSC4_OFFSET 0x1C /* OSC1 for RealView/AB */
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#define REALVIEW_SYS_LOCK_OFFSET 0x20
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/*
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* Implementation of the ARM RealView clock trees.
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*/
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static const struct icst_params realview_oscvco_params = {
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.ref = 24000000,
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.vco_max = ICST307_VCO_MAX,
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.vco_min = ICST307_VCO_MIN,
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.vd_min = 4 + 8,
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.vd_max = 511 + 8,
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.rd_min = 1 + 2,
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.rd_max = 127 + 2,
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.s2div = icst307_s2div,
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.idx2s = icst307_idx2s,
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};
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static const struct clk_icst_desc realview_osc0_desc __initconst = {
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.params = &realview_oscvco_params,
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.vco_offset = REALVIEW_SYS_OSC0_OFFSET,
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.lock_offset = REALVIEW_SYS_LOCK_OFFSET,
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};
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static const struct clk_icst_desc realview_osc4_desc __initconst = {
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.params = &realview_oscvco_params,
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.vco_offset = REALVIEW_SYS_OSC4_OFFSET,
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.lock_offset = REALVIEW_SYS_LOCK_OFFSET,
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};
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/*
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* realview_clk_init() - set up the RealView clock tree
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*/
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void __init realview_clk_init(void __iomem *sysbase, bool is_pb1176)
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{
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struct clk *clk;
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/* APB clock dummy */
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clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT, 0);
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clk_register_clkdev(clk, "apb_pclk", NULL);
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/* 24 MHz clock */
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clk = clk_register_fixed_rate(NULL, "clk24mhz", NULL, CLK_IS_ROOT,
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24000000);
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clk_register_clkdev(clk, NULL, "dev:uart0");
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clk_register_clkdev(clk, NULL, "dev:uart1");
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clk_register_clkdev(clk, NULL, "dev:uart2");
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clk_register_clkdev(clk, NULL, "fpga:kmi0");
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clk_register_clkdev(clk, NULL, "fpga:kmi1");
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clk_register_clkdev(clk, NULL, "fpga:mmc0");
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clk_register_clkdev(clk, NULL, "dev:ssp0");
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if (is_pb1176) {
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/*
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* UART3 is on the dev chip in PB1176
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* UART4 only exists in PB1176
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*/
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clk_register_clkdev(clk, NULL, "dev:uart3");
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clk_register_clkdev(clk, NULL, "dev:uart4");
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} else
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clk_register_clkdev(clk, NULL, "fpga:uart3");
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/* 1 MHz clock */
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clk = clk_register_fixed_rate(NULL, "clk1mhz", NULL, CLK_IS_ROOT,
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1000000);
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clk_register_clkdev(clk, NULL, "sp804");
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/* ICST VCO clock */
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if (is_pb1176)
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clk = icst_clk_register(NULL, &realview_osc0_desc,
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"osc0", NULL, sysbase);
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else
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clk = icst_clk_register(NULL, &realview_osc4_desc,
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"osc4", NULL, sysbase);
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clk_register_clkdev(clk, NULL, "dev:clcd");
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clk_register_clkdev(clk, NULL, "issp:clcd");
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}
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