Imre Deak fbdcb06880 drm/i915/skl: don't set the AsyncFlip performance mode for Gen9+ ... The following sets the AsyncFlip performance mode for everything above Gen6: commit 4790cb36b3eede8fb0cca529dc1d31b9936fa24b Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Sun Jan 20 16:11:20 2013 +0000 drm/i915: Disable AsyncFlip performance optimisations Starting from Gen9 the MI_MODE register layout changes and doesn't include the above bit. Reviewed-by: Thomas Wood <thomas.wood@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>		2014-09-24 14:33:15 +02:00
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drm	drm/i915/skl: don't set the AsyncFlip performance mode for Gen9+	2014-09-24 14:33:15 +02:00
host1x	drm/tegra: Make job submission 64-bit safe	2014-08-04 10:07:36 +02:00
ipu-v3	gpu: ipu-v3: Add ipu_dump()	2014-09-02 14:55:56 +02:00
vga	vgaarb: We can own non-decoded resources	2014-07-08 11:15:09 +10:00
Makefile	gpu: ipu-v3: Move i.MX IPUv3 core driver out of staging	2014-06-04 11:06:52 +02:00