mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
f3f1ea34fe
We get a link error when CCU_MULT is not set with the
newly added driver:
drivers/clk/sunxi-ng/ccu-sun5i.o:(.data.__compound_literal.17+0x4): undefined reference to `ccu_mult_ops'
drivers/clk/sunxi-ng/ccu-sun5i.o:(.data.__compound_literal.5+0x4): undefined reference to `ccu_mult_ops'
Fixes: 5e73761786 ("clk: sunxi-ng: Add sun5i CCU driver")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
145 lines
2.6 KiB
Plaintext
145 lines
2.6 KiB
Plaintext
config SUNXI_CCU
|
|
bool "Clock support for Allwinner SoCs"
|
|
depends on ARCH_SUNXI || COMPILE_TEST
|
|
default ARCH_SUNXI
|
|
|
|
if SUNXI_CCU
|
|
|
|
# Base clock types
|
|
|
|
config SUNXI_CCU_DIV
|
|
bool
|
|
select SUNXI_CCU_MUX
|
|
|
|
config SUNXI_CCU_FRAC
|
|
bool
|
|
|
|
config SUNXI_CCU_GATE
|
|
bool
|
|
|
|
config SUNXI_CCU_MUX
|
|
bool
|
|
|
|
config SUNXI_CCU_MULT
|
|
bool
|
|
select SUNXI_CCU_MUX
|
|
|
|
config SUNXI_CCU_PHASE
|
|
bool
|
|
|
|
# Multi-factor clocks
|
|
|
|
config SUNXI_CCU_NK
|
|
bool
|
|
select SUNXI_CCU_GATE
|
|
|
|
config SUNXI_CCU_NKM
|
|
bool
|
|
select SUNXI_CCU_GATE
|
|
|
|
config SUNXI_CCU_NKMP
|
|
bool
|
|
select SUNXI_CCU_GATE
|
|
|
|
config SUNXI_CCU_NM
|
|
bool
|
|
select SUNXI_CCU_FRAC
|
|
select SUNXI_CCU_GATE
|
|
|
|
config SUNXI_CCU_MP
|
|
bool
|
|
select SUNXI_CCU_GATE
|
|
select SUNXI_CCU_MUX
|
|
|
|
# SoC Drivers
|
|
|
|
config SUN50I_A64_CCU
|
|
bool "Support for the Allwinner A64 CCU"
|
|
select SUNXI_CCU_DIV
|
|
select SUNXI_CCU_NK
|
|
select SUNXI_CCU_NKM
|
|
select SUNXI_CCU_NKMP
|
|
select SUNXI_CCU_NM
|
|
select SUNXI_CCU_MP
|
|
select SUNXI_CCU_PHASE
|
|
default ARM64 && ARCH_SUNXI
|
|
|
|
config SUN5I_CCU
|
|
bool "Support for the Allwinner sun5i family CCM"
|
|
select SUNXI_CCU_DIV
|
|
select SUNXI_CCU_MULT
|
|
select SUNXI_CCU_NK
|
|
select SUNXI_CCU_NKM
|
|
select SUNXI_CCU_NM
|
|
select SUNXI_CCU_MP
|
|
select SUNXI_CCU_PHASE
|
|
default MACH_SUN5I
|
|
|
|
config SUN6I_A31_CCU
|
|
bool "Support for the Allwinner A31/A31s CCU"
|
|
select SUNXI_CCU_DIV
|
|
select SUNXI_CCU_NK
|
|
select SUNXI_CCU_NKM
|
|
select SUNXI_CCU_NM
|
|
select SUNXI_CCU_MP
|
|
select SUNXI_CCU_PHASE
|
|
default MACH_SUN6I
|
|
|
|
config SUN8I_A23_CCU
|
|
bool "Support for the Allwinner A23 CCU"
|
|
select SUNXI_CCU_DIV
|
|
select SUNXI_CCU_MULT
|
|
select SUNXI_CCU_NK
|
|
select SUNXI_CCU_NKM
|
|
select SUNXI_CCU_NKMP
|
|
select SUNXI_CCU_NM
|
|
select SUNXI_CCU_MP
|
|
select SUNXI_CCU_PHASE
|
|
default MACH_SUN8I
|
|
|
|
config SUN8I_A33_CCU
|
|
bool "Support for the Allwinner A33 CCU"
|
|
select SUNXI_CCU_DIV
|
|
select SUNXI_CCU_MULT
|
|
select SUNXI_CCU_NK
|
|
select SUNXI_CCU_NKM
|
|
select SUNXI_CCU_NKMP
|
|
select SUNXI_CCU_NM
|
|
select SUNXI_CCU_MP
|
|
select SUNXI_CCU_PHASE
|
|
default MACH_SUN8I
|
|
|
|
config SUN8I_H3_CCU
|
|
bool "Support for the Allwinner H3 CCU"
|
|
select SUNXI_CCU_DIV
|
|
select SUNXI_CCU_NK
|
|
select SUNXI_CCU_NKM
|
|
select SUNXI_CCU_NKMP
|
|
select SUNXI_CCU_NM
|
|
select SUNXI_CCU_MP
|
|
select SUNXI_CCU_PHASE
|
|
default MACH_SUN8I
|
|
|
|
config SUN8I_V3S_CCU
|
|
bool "Support for the Allwinner V3s CCU"
|
|
select SUNXI_CCU_DIV
|
|
select SUNXI_CCU_NK
|
|
select SUNXI_CCU_NKM
|
|
select SUNXI_CCU_NKMP
|
|
select SUNXI_CCU_NM
|
|
select SUNXI_CCU_MP
|
|
select SUNXI_CCU_PHASE
|
|
default MACH_SUN8I
|
|
|
|
config SUN9I_A80_CCU
|
|
bool "Support for the Allwinner A80 CCU"
|
|
select SUNXI_CCU_DIV
|
|
select SUNXI_CCU_GATE
|
|
select SUNXI_CCU_NKMP
|
|
select SUNXI_CCU_NM
|
|
select SUNXI_CCU_MP
|
|
select SUNXI_CCU_PHASE
|
|
default MACH_SUN9I
|
|
|
|
endif
|