mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-15 12:46:51 +07:00
0ab5171b89
Aneesh/Ben reported that the change to do_page_fault() we made in commit1d18ad0268
("powerpc/mm: Detect instruction fetch denied and report") needs to handle the case where CPU_FTR_COHERENT_ICACHE is missing but we have CPU_FTR_NOEXECUTE. In those cases the check added for SRR1_ISI_N_OR_G might trigger a false positive. This patch adds a check for CPU_FTR_COHERENT_ICACHE in addition to the MSR value. Fixes:1d18ad0268
("powerpc/mm: Detect instruction fetch denied and report") Reported-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Balbir Singh <bsingharora@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
564 lines
16 KiB
C
564 lines
16 KiB
C
/*
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* PowerPC version
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* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
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*
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* Derived from "arch/i386/mm/fault.c"
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* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
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*
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* Modified by Cort Dougan and Paul Mackerras.
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*
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* Modified for PPC64 by Dave Engebretsen (engebret@ibm.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/signal.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/string.h>
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#include <linux/types.h>
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#include <linux/ptrace.h>
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#include <linux/mman.h>
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#include <linux/mm.h>
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#include <linux/interrupt.h>
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#include <linux/highmem.h>
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#include <linux/extable.h>
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#include <linux/kprobes.h>
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#include <linux/kdebug.h>
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#include <linux/perf_event.h>
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#include <linux/ratelimit.h>
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#include <linux/context_tracking.h>
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#include <linux/hugetlb.h>
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#include <linux/uaccess.h>
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#include <asm/firmware.h>
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#include <asm/page.h>
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#include <asm/pgtable.h>
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#include <asm/mmu.h>
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#include <asm/mmu_context.h>
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#include <asm/tlbflush.h>
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#include <asm/siginfo.h>
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#include <asm/debug.h>
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#include "icswx.h"
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#ifdef CONFIG_KPROBES
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static inline int notify_page_fault(struct pt_regs *regs)
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{
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int ret = 0;
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/* kprobe_running() needs smp_processor_id() */
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if (!user_mode(regs)) {
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preempt_disable();
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if (kprobe_running() && kprobe_fault_handler(regs, 11))
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ret = 1;
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preempt_enable();
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}
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return ret;
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}
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#else
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static inline int notify_page_fault(struct pt_regs *regs)
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{
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return 0;
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}
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#endif
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/*
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* Check whether the instruction at regs->nip is a store using
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* an update addressing form which will update r1.
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*/
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static int store_updates_sp(struct pt_regs *regs)
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{
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unsigned int inst;
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if (get_user(inst, (unsigned int __user *)regs->nip))
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return 0;
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/* check for 1 in the rA field */
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if (((inst >> 16) & 0x1f) != 1)
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return 0;
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/* check major opcode */
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switch (inst >> 26) {
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case 37: /* stwu */
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case 39: /* stbu */
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case 45: /* sthu */
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case 53: /* stfsu */
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case 55: /* stfdu */
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return 1;
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case 62: /* std or stdu */
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return (inst & 3) == 1;
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case 31:
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/* check minor opcode */
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switch ((inst >> 1) & 0x3ff) {
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case 181: /* stdux */
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case 183: /* stwux */
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case 247: /* stbux */
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case 439: /* sthux */
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case 695: /* stfsux */
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case 759: /* stfdux */
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return 1;
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}
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}
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return 0;
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}
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/*
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* do_page_fault error handling helpers
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*/
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#define MM_FAULT_RETURN 0
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#define MM_FAULT_CONTINUE -1
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#define MM_FAULT_ERR(sig) (sig)
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static int do_sigbus(struct pt_regs *regs, unsigned long address,
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unsigned int fault)
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{
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siginfo_t info;
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unsigned int lsb = 0;
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up_read(¤t->mm->mmap_sem);
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if (!user_mode(regs))
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return MM_FAULT_ERR(SIGBUS);
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current->thread.trap_nr = BUS_ADRERR;
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info.si_signo = SIGBUS;
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info.si_errno = 0;
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info.si_code = BUS_ADRERR;
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info.si_addr = (void __user *)address;
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#ifdef CONFIG_MEMORY_FAILURE
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if (fault & (VM_FAULT_HWPOISON|VM_FAULT_HWPOISON_LARGE)) {
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pr_err("MCE: Killing %s:%d due to hardware memory corruption fault at %lx\n",
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current->comm, current->pid, address);
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info.si_code = BUS_MCEERR_AR;
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}
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if (fault & VM_FAULT_HWPOISON_LARGE)
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lsb = hstate_index_to_shift(VM_FAULT_GET_HINDEX(fault));
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if (fault & VM_FAULT_HWPOISON)
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lsb = PAGE_SHIFT;
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#endif
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info.si_addr_lsb = lsb;
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force_sig_info(SIGBUS, &info, current);
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return MM_FAULT_RETURN;
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}
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static int mm_fault_error(struct pt_regs *regs, unsigned long addr, int fault)
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{
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/*
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* Pagefault was interrupted by SIGKILL. We have no reason to
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* continue the pagefault.
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*/
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if (fatal_signal_pending(current)) {
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/*
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* If we have retry set, the mmap semaphore will have
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* alrady been released in __lock_page_or_retry(). Else
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* we release it now.
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*/
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if (!(fault & VM_FAULT_RETRY))
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up_read(¤t->mm->mmap_sem);
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/* Coming from kernel, we need to deal with uaccess fixups */
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if (user_mode(regs))
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return MM_FAULT_RETURN;
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return MM_FAULT_ERR(SIGKILL);
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}
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/* No fault: be happy */
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if (!(fault & VM_FAULT_ERROR))
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return MM_FAULT_CONTINUE;
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/* Out of memory */
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if (fault & VM_FAULT_OOM) {
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up_read(¤t->mm->mmap_sem);
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/*
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* We ran out of memory, or some other thing happened to us that
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* made us unable to handle the page fault gracefully.
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*/
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if (!user_mode(regs))
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return MM_FAULT_ERR(SIGKILL);
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pagefault_out_of_memory();
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return MM_FAULT_RETURN;
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}
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if (fault & (VM_FAULT_SIGBUS|VM_FAULT_HWPOISON|VM_FAULT_HWPOISON_LARGE))
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return do_sigbus(regs, addr, fault);
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/* We don't understand the fault code, this is fatal */
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BUG();
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return MM_FAULT_CONTINUE;
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}
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/*
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* For 600- and 800-family processors, the error_code parameter is DSISR
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* for a data fault, SRR1 for an instruction fault. For 400-family processors
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* the error_code parameter is ESR for a data fault, 0 for an instruction
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* fault.
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* For 64-bit processors, the error_code parameter is
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* - DSISR for a non-SLB data access fault,
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* - SRR1 & 0x08000000 for a non-SLB instruction access fault
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* - 0 any SLB fault.
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*
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* The return value is 0 if the fault was handled, or the signal
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* number if this is a kernel fault that can't be handled here.
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*/
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int do_page_fault(struct pt_regs *regs, unsigned long address,
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unsigned long error_code)
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{
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enum ctx_state prev_state = exception_enter();
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struct vm_area_struct * vma;
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struct mm_struct *mm = current->mm;
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unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE;
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int code = SEGV_MAPERR;
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int is_write = 0;
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int trap = TRAP(regs);
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int is_exec = trap == 0x400;
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int fault;
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int rc = 0, store_update_sp = 0;
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#if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE))
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/*
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* Fortunately the bit assignments in SRR1 for an instruction
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* fault and DSISR for a data fault are mostly the same for the
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* bits we are interested in. But there are some bits which
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* indicate errors in DSISR but can validly be set in SRR1.
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*/
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if (trap == 0x400)
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error_code &= 0x48200000;
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else
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is_write = error_code & DSISR_ISSTORE;
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#else
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is_write = error_code & ESR_DST;
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#endif /* CONFIG_4xx || CONFIG_BOOKE */
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#ifdef CONFIG_PPC_ICSWX
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/*
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* we need to do this early because this "data storage
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* interrupt" does not update the DAR/DEAR so we don't want to
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* look at it
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*/
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if (error_code & ICSWX_DSI_UCT) {
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rc = acop_handle_fault(regs, address, error_code);
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if (rc)
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goto bail;
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}
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#endif /* CONFIG_PPC_ICSWX */
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if (notify_page_fault(regs))
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goto bail;
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if (unlikely(debugger_fault_handler(regs)))
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goto bail;
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/* On a kernel SLB miss we can only check for a valid exception entry */
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if (!user_mode(regs) && (address >= TASK_SIZE)) {
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rc = SIGSEGV;
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goto bail;
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}
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#if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE) || \
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defined(CONFIG_PPC_BOOK3S_64))
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if (error_code & DSISR_DABRMATCH) {
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/* breakpoint match */
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do_break(regs, address, error_code);
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goto bail;
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}
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#endif
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/* We restore the interrupt state now */
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if (!arch_irq_disabled_regs(regs))
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local_irq_enable();
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if (faulthandler_disabled() || mm == NULL) {
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if (!user_mode(regs)) {
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rc = SIGSEGV;
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goto bail;
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}
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/* faulthandler_disabled() in user mode is really bad,
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as is current->mm == NULL. */
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printk(KERN_EMERG "Page fault in user mode with "
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"faulthandler_disabled() = %d mm = %p\n",
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faulthandler_disabled(), mm);
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printk(KERN_EMERG "NIP = %lx MSR = %lx\n",
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regs->nip, regs->msr);
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die("Weird page fault", regs, SIGSEGV);
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}
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perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address);
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/*
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* We want to do this outside mmap_sem, because reading code around nip
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* can result in fault, which will cause a deadlock when called with
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* mmap_sem held
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*/
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if (user_mode(regs))
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store_update_sp = store_updates_sp(regs);
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if (user_mode(regs))
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flags |= FAULT_FLAG_USER;
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/* When running in the kernel we expect faults to occur only to
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* addresses in user space. All other faults represent errors in the
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* kernel and should generate an OOPS. Unfortunately, in the case of an
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* erroneous fault occurring in a code path which already holds mmap_sem
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* we will deadlock attempting to validate the fault against the
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* address space. Luckily the kernel only validly references user
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* space from well defined areas of code, which are listed in the
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* exceptions table.
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*
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* As the vast majority of faults will be valid we will only perform
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* the source reference check when there is a possibility of a deadlock.
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* Attempt to lock the address space, if we cannot we then validate the
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* source. If this is invalid we can skip the address space check,
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* thus avoiding the deadlock.
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*/
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if (!down_read_trylock(&mm->mmap_sem)) {
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if (!user_mode(regs) && !search_exception_tables(regs->nip))
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goto bad_area_nosemaphore;
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retry:
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down_read(&mm->mmap_sem);
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} else {
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/*
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* The above down_read_trylock() might have succeeded in
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* which case we'll have missed the might_sleep() from
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* down_read():
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*/
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might_sleep();
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}
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vma = find_vma(mm, address);
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if (!vma)
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goto bad_area;
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if (vma->vm_start <= address)
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goto good_area;
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if (!(vma->vm_flags & VM_GROWSDOWN))
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goto bad_area;
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/*
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* N.B. The POWER/Open ABI allows programs to access up to
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* 288 bytes below the stack pointer.
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* The kernel signal delivery code writes up to about 1.5kB
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* below the stack pointer (r1) before decrementing it.
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* The exec code can write slightly over 640kB to the stack
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* before setting the user r1. Thus we allow the stack to
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* expand to 1MB without further checks.
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*/
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if (address + 0x100000 < vma->vm_end) {
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/* get user regs even if this fault is in kernel mode */
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struct pt_regs *uregs = current->thread.regs;
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if (uregs == NULL)
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goto bad_area;
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/*
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* A user-mode access to an address a long way below
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* the stack pointer is only valid if the instruction
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* is one which would update the stack pointer to the
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* address accessed if the instruction completed,
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* i.e. either stwu rs,n(r1) or stwux rs,r1,rb
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* (or the byte, halfword, float or double forms).
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*
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* If we don't check this then any write to the area
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* between the last mapped region and the stack will
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* expand the stack rather than segfaulting.
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*/
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if (address + 2048 < uregs->gpr[1] && !store_update_sp)
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goto bad_area;
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}
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if (expand_stack(vma, address))
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goto bad_area;
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good_area:
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code = SEGV_ACCERR;
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#if defined(CONFIG_6xx)
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if (error_code & 0x95700000)
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/* an error such as lwarx to I/O controller space,
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address matching DABR, eciwx, etc. */
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goto bad_area;
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#endif /* CONFIG_6xx */
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#if defined(CONFIG_8xx)
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/* The MPC8xx seems to always set 0x80000000, which is
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* "undefined". Of those that can be set, this is the only
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* one which seems bad.
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*/
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if (error_code & 0x10000000)
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/* Guarded storage error. */
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goto bad_area;
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#endif /* CONFIG_8xx */
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if (is_exec) {
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/*
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* An execution fault + no execute ?
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*
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* On CPUs that don't have CPU_FTR_COHERENT_ICACHE we
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* deliberately create NX mappings, and use the fault to do the
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* cache flush. This is usually handled in hash_page_do_lazy_icache()
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* but we could end up here if that races with a concurrent PTE
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* update. In that case we need to fall through here to the VMA
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* check below.
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*/
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if (cpu_has_feature(CPU_FTR_COHERENT_ICACHE) &&
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(regs->msr & SRR1_ISI_N_OR_G))
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goto bad_area;
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/*
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* Allow execution from readable areas if the MMU does not
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* provide separate controls over reading and executing.
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*
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* Note: That code used to not be enabled for 4xx/BookE.
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* It is now as I/D cache coherency for these is done at
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* set_pte_at() time and I see no reason why the test
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* below wouldn't be valid on those processors. This -may-
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* break programs compiled with a really old ABI though.
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*/
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if (!(vma->vm_flags & VM_EXEC) &&
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(cpu_has_feature(CPU_FTR_NOEXECUTE) ||
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!(vma->vm_flags & (VM_READ | VM_WRITE))))
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goto bad_area;
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#ifdef CONFIG_PPC_STD_MMU
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/*
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* protfault should only happen due to us
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* mapping a region readonly temporarily. PROT_NONE
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* is also covered by the VMA check above.
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*/
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WARN_ON_ONCE(error_code & DSISR_PROTFAULT);
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#endif /* CONFIG_PPC_STD_MMU */
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/* a write */
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} else if (is_write) {
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if (!(vma->vm_flags & VM_WRITE))
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goto bad_area;
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flags |= FAULT_FLAG_WRITE;
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/* a read */
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} else {
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if (!(vma->vm_flags & (VM_READ | VM_EXEC | VM_WRITE)))
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goto bad_area;
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WARN_ON_ONCE(error_code & DSISR_PROTFAULT);
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}
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/*
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* If for any reason at all we couldn't handle the fault,
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* make sure we exit gracefully rather than endlessly redo
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* the fault.
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*/
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fault = handle_mm_fault(vma, address, flags);
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if (unlikely(fault & (VM_FAULT_RETRY|VM_FAULT_ERROR))) {
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if (fault & VM_FAULT_SIGSEGV)
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goto bad_area;
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rc = mm_fault_error(regs, address, fault);
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if (rc >= MM_FAULT_RETURN)
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goto bail;
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else
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rc = 0;
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}
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/*
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* Major/minor page fault accounting is only done on the
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* initial attempt. If we go through a retry, it is extremely
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* likely that the page will be found in page cache at that point.
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*/
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if (flags & FAULT_FLAG_ALLOW_RETRY) {
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if (fault & VM_FAULT_MAJOR) {
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current->maj_flt++;
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perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1,
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regs, address);
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#ifdef CONFIG_PPC_SMLPAR
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if (firmware_has_feature(FW_FEATURE_CMO)) {
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u32 page_ins;
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preempt_disable();
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page_ins = be32_to_cpu(get_lppaca()->page_ins);
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page_ins += 1 << PAGE_FACTOR;
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get_lppaca()->page_ins = cpu_to_be32(page_ins);
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preempt_enable();
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}
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#endif /* CONFIG_PPC_SMLPAR */
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} else {
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current->min_flt++;
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perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1,
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regs, address);
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|
}
|
|
if (fault & VM_FAULT_RETRY) {
|
|
/* Clear FAULT_FLAG_ALLOW_RETRY to avoid any risk
|
|
* of starvation. */
|
|
flags &= ~FAULT_FLAG_ALLOW_RETRY;
|
|
flags |= FAULT_FLAG_TRIED;
|
|
goto retry;
|
|
}
|
|
}
|
|
|
|
up_read(&mm->mmap_sem);
|
|
goto bail;
|
|
|
|
bad_area:
|
|
up_read(&mm->mmap_sem);
|
|
|
|
bad_area_nosemaphore:
|
|
/* User mode accesses cause a SIGSEGV */
|
|
if (user_mode(regs)) {
|
|
_exception(SIGSEGV, regs, code, address);
|
|
goto bail;
|
|
}
|
|
|
|
if (is_exec && (error_code & DSISR_PROTFAULT))
|
|
printk_ratelimited(KERN_CRIT "kernel tried to execute NX-protected"
|
|
" page (%lx) - exploit attempt? (uid: %d)\n",
|
|
address, from_kuid(&init_user_ns, current_uid()));
|
|
|
|
rc = SIGSEGV;
|
|
|
|
bail:
|
|
exception_exit(prev_state);
|
|
return rc;
|
|
}
|
|
NOKPROBE_SYMBOL(do_page_fault);
|
|
|
|
/*
|
|
* bad_page_fault is called when we have a bad access from the kernel.
|
|
* It is called from the DSI and ISI handlers in head.S and from some
|
|
* of the procedures in traps.c.
|
|
*/
|
|
void bad_page_fault(struct pt_regs *regs, unsigned long address, int sig)
|
|
{
|
|
const struct exception_table_entry *entry;
|
|
|
|
/* Are we prepared to handle this fault? */
|
|
if ((entry = search_exception_tables(regs->nip)) != NULL) {
|
|
regs->nip = extable_fixup(entry);
|
|
return;
|
|
}
|
|
|
|
/* kernel has accessed a bad area */
|
|
|
|
switch (regs->trap) {
|
|
case 0x300:
|
|
case 0x380:
|
|
printk(KERN_ALERT "Unable to handle kernel paging request for "
|
|
"data at address 0x%08lx\n", regs->dar);
|
|
break;
|
|
case 0x400:
|
|
case 0x480:
|
|
printk(KERN_ALERT "Unable to handle kernel paging request for "
|
|
"instruction fetch\n");
|
|
break;
|
|
case 0x600:
|
|
printk(KERN_ALERT "Unable to handle kernel paging request for "
|
|
"unaligned access at address 0x%08lx\n", regs->dar);
|
|
break;
|
|
default:
|
|
printk(KERN_ALERT "Unable to handle kernel paging request for "
|
|
"unknown fault\n");
|
|
break;
|
|
}
|
|
printk(KERN_ALERT "Faulting instruction address: 0x%08lx\n",
|
|
regs->nip);
|
|
|
|
if (task_stack_end_corrupted(current))
|
|
printk(KERN_ALERT "Thread overran stack, or stack corrupted\n");
|
|
|
|
die("Kernel access of bad area", regs, sig);
|
|
}
|