mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-25 23:55:36 +07:00
18fa692d80
The switch to per-process address spaces erroneously dropped the check
which validated that the command buffer is mapped through the linear
apperture as required by the hardware. This turned a system
misconfiguration with a helpful error message into a very hard to
debug issue. Reinstate the check at the appropriate location.
Fixes: 17e4660ae3
(drm/etnaviv: implement per-process address spaces on MMUv2)
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Guido Günther <agx@sigxcpu.org>
517 lines
12 KiB
C
517 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2015-2018 Etnaviv Project
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*/
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#include <linux/dma-mapping.h>
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#include <linux/scatterlist.h>
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#include "common.xml.h"
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#include "etnaviv_cmdbuf.h"
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#include "etnaviv_drv.h"
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#include "etnaviv_gem.h"
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#include "etnaviv_gpu.h"
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#include "etnaviv_mmu.h"
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static void etnaviv_context_unmap(struct etnaviv_iommu_context *context,
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unsigned long iova, size_t size)
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{
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size_t unmapped_page, unmapped = 0;
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size_t pgsize = SZ_4K;
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if (!IS_ALIGNED(iova | size, pgsize)) {
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pr_err("unaligned: iova 0x%lx size 0x%zx min_pagesz 0x%zx\n",
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iova, size, pgsize);
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return;
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}
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while (unmapped < size) {
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unmapped_page = context->global->ops->unmap(context, iova,
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pgsize);
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if (!unmapped_page)
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break;
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iova += unmapped_page;
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unmapped += unmapped_page;
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}
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}
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static int etnaviv_context_map(struct etnaviv_iommu_context *context,
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unsigned long iova, phys_addr_t paddr,
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size_t size, int prot)
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{
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unsigned long orig_iova = iova;
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size_t pgsize = SZ_4K;
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size_t orig_size = size;
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int ret = 0;
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if (!IS_ALIGNED(iova | paddr | size, pgsize)) {
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pr_err("unaligned: iova 0x%lx pa %pa size 0x%zx min_pagesz 0x%zx\n",
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iova, &paddr, size, pgsize);
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return -EINVAL;
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}
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while (size) {
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ret = context->global->ops->map(context, iova, paddr, pgsize,
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prot);
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if (ret)
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break;
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iova += pgsize;
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paddr += pgsize;
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size -= pgsize;
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}
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/* unroll mapping in case something went wrong */
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if (ret)
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etnaviv_context_unmap(context, orig_iova, orig_size - size);
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return ret;
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}
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static int etnaviv_iommu_map(struct etnaviv_iommu_context *context, u32 iova,
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struct sg_table *sgt, unsigned len, int prot)
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{ struct scatterlist *sg;
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unsigned int da = iova;
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unsigned int i, j;
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int ret;
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if (!context || !sgt)
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return -EINVAL;
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for_each_sg(sgt->sgl, sg, sgt->nents, i) {
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u32 pa = sg_dma_address(sg) - sg->offset;
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size_t bytes = sg_dma_len(sg) + sg->offset;
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VERB("map[%d]: %08x %08x(%zx)", i, iova, pa, bytes);
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ret = etnaviv_context_map(context, da, pa, bytes, prot);
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if (ret)
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goto fail;
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da += bytes;
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}
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return 0;
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fail:
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da = iova;
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for_each_sg(sgt->sgl, sg, i, j) {
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size_t bytes = sg_dma_len(sg) + sg->offset;
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etnaviv_context_unmap(context, da, bytes);
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da += bytes;
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}
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return ret;
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}
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static void etnaviv_iommu_unmap(struct etnaviv_iommu_context *context, u32 iova,
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struct sg_table *sgt, unsigned len)
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{
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struct scatterlist *sg;
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unsigned int da = iova;
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int i;
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for_each_sg(sgt->sgl, sg, sgt->nents, i) {
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size_t bytes = sg_dma_len(sg) + sg->offset;
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etnaviv_context_unmap(context, da, bytes);
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VERB("unmap[%d]: %08x(%zx)", i, iova, bytes);
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BUG_ON(!PAGE_ALIGNED(bytes));
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da += bytes;
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}
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}
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static void etnaviv_iommu_remove_mapping(struct etnaviv_iommu_context *context,
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struct etnaviv_vram_mapping *mapping)
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{
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struct etnaviv_gem_object *etnaviv_obj = mapping->object;
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etnaviv_iommu_unmap(context, mapping->vram_node.start,
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etnaviv_obj->sgt, etnaviv_obj->base.size);
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drm_mm_remove_node(&mapping->vram_node);
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}
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static int etnaviv_iommu_find_iova(struct etnaviv_iommu_context *context,
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struct drm_mm_node *node, size_t size)
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{
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struct etnaviv_vram_mapping *free = NULL;
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enum drm_mm_insert_mode mode = DRM_MM_INSERT_LOW;
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int ret;
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lockdep_assert_held(&context->lock);
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while (1) {
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struct etnaviv_vram_mapping *m, *n;
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struct drm_mm_scan scan;
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struct list_head list;
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bool found;
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ret = drm_mm_insert_node_in_range(&context->mm, node,
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size, 0, 0, 0, U64_MAX, mode);
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if (ret != -ENOSPC)
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break;
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/* Try to retire some entries */
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drm_mm_scan_init(&scan, &context->mm, size, 0, 0, mode);
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found = 0;
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INIT_LIST_HEAD(&list);
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list_for_each_entry(free, &context->mappings, mmu_node) {
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/* If this vram node has not been used, skip this. */
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if (!free->vram_node.mm)
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continue;
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/*
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* If the iova is pinned, then it's in-use,
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* so we must keep its mapping.
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*/
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if (free->use)
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continue;
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list_add(&free->scan_node, &list);
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if (drm_mm_scan_add_block(&scan, &free->vram_node)) {
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found = true;
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break;
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}
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}
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if (!found) {
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/* Nothing found, clean up and fail */
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list_for_each_entry_safe(m, n, &list, scan_node)
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BUG_ON(drm_mm_scan_remove_block(&scan, &m->vram_node));
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break;
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}
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/*
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* drm_mm does not allow any other operations while
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* scanning, so we have to remove all blocks first.
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* If drm_mm_scan_remove_block() returns false, we
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* can leave the block pinned.
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*/
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list_for_each_entry_safe(m, n, &list, scan_node)
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if (!drm_mm_scan_remove_block(&scan, &m->vram_node))
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list_del_init(&m->scan_node);
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/*
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* Unmap the blocks which need to be reaped from the MMU.
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* Clear the mmu pointer to prevent the mapping_get finding
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* this mapping.
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*/
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list_for_each_entry_safe(m, n, &list, scan_node) {
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etnaviv_iommu_remove_mapping(context, m);
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m->context = NULL;
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list_del_init(&m->mmu_node);
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list_del_init(&m->scan_node);
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}
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mode = DRM_MM_INSERT_EVICT;
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/*
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* We removed enough mappings so that the new allocation will
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* succeed, retry the allocation one more time.
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*/
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}
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return ret;
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}
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static int etnaviv_iommu_insert_exact(struct etnaviv_iommu_context *context,
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struct drm_mm_node *node, size_t size, u64 va)
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{
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return drm_mm_insert_node_in_range(&context->mm, node, size, 0, 0, va,
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va + size, DRM_MM_INSERT_LOWEST);
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}
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int etnaviv_iommu_map_gem(struct etnaviv_iommu_context *context,
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struct etnaviv_gem_object *etnaviv_obj, u32 memory_base,
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struct etnaviv_vram_mapping *mapping, u64 va)
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{
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struct sg_table *sgt = etnaviv_obj->sgt;
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struct drm_mm_node *node;
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int ret;
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lockdep_assert_held(&etnaviv_obj->lock);
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mutex_lock(&context->lock);
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/* v1 MMU can optimize single entry (contiguous) scatterlists */
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if (context->global->version == ETNAVIV_IOMMU_V1 &&
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sgt->nents == 1 && !(etnaviv_obj->flags & ETNA_BO_FORCE_MMU)) {
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u32 iova;
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iova = sg_dma_address(sgt->sgl) - memory_base;
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if (iova < 0x80000000 - sg_dma_len(sgt->sgl)) {
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mapping->iova = iova;
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list_add_tail(&mapping->mmu_node, &context->mappings);
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ret = 0;
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goto unlock;
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}
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}
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node = &mapping->vram_node;
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if (va)
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ret = etnaviv_iommu_insert_exact(context, node,
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etnaviv_obj->base.size, va);
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else
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ret = etnaviv_iommu_find_iova(context, node,
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etnaviv_obj->base.size);
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if (ret < 0)
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goto unlock;
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mapping->iova = node->start;
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ret = etnaviv_iommu_map(context, node->start, sgt, etnaviv_obj->base.size,
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ETNAVIV_PROT_READ | ETNAVIV_PROT_WRITE);
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if (ret < 0) {
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drm_mm_remove_node(node);
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goto unlock;
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}
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list_add_tail(&mapping->mmu_node, &context->mappings);
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context->flush_seq++;
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unlock:
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mutex_unlock(&context->lock);
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return ret;
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}
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void etnaviv_iommu_unmap_gem(struct etnaviv_iommu_context *context,
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struct etnaviv_vram_mapping *mapping)
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{
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WARN_ON(mapping->use);
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mutex_lock(&context->lock);
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/* If the vram node is on the mm, unmap and remove the node */
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if (mapping->vram_node.mm == &context->mm)
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etnaviv_iommu_remove_mapping(context, mapping);
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list_del(&mapping->mmu_node);
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context->flush_seq++;
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mutex_unlock(&context->lock);
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}
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static void etnaviv_iommu_context_free(struct kref *kref)
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{
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struct etnaviv_iommu_context *context =
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container_of(kref, struct etnaviv_iommu_context, refcount);
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etnaviv_cmdbuf_suballoc_unmap(context, &context->cmdbuf_mapping);
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context->global->ops->free(context);
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}
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void etnaviv_iommu_context_put(struct etnaviv_iommu_context *context)
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{
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kref_put(&context->refcount, etnaviv_iommu_context_free);
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}
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struct etnaviv_iommu_context *
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etnaviv_iommu_context_init(struct etnaviv_iommu_global *global,
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struct etnaviv_cmdbuf_suballoc *suballoc)
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{
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struct etnaviv_iommu_context *ctx;
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int ret;
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if (global->version == ETNAVIV_IOMMU_V1)
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ctx = etnaviv_iommuv1_context_alloc(global);
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else
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ctx = etnaviv_iommuv2_context_alloc(global);
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if (!ctx)
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return NULL;
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ret = etnaviv_cmdbuf_suballoc_map(suballoc, ctx, &ctx->cmdbuf_mapping,
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global->memory_base);
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if (ret)
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goto out_free;
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if (global->version == ETNAVIV_IOMMU_V1 &&
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ctx->cmdbuf_mapping.iova > 0x80000000) {
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dev_err(global->dev,
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"command buffer outside valid memory window\n");
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goto out_unmap;
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}
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return ctx;
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out_unmap:
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etnaviv_cmdbuf_suballoc_unmap(ctx, &ctx->cmdbuf_mapping);
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out_free:
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global->ops->free(ctx);
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return NULL;
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}
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void etnaviv_iommu_restore(struct etnaviv_gpu *gpu,
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struct etnaviv_iommu_context *context)
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{
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context->global->ops->restore(gpu, context);
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}
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int etnaviv_iommu_get_suballoc_va(struct etnaviv_iommu_context *context,
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struct etnaviv_vram_mapping *mapping,
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u32 memory_base, dma_addr_t paddr,
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size_t size)
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{
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mutex_lock(&context->lock);
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if (mapping->use > 0) {
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mapping->use++;
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mutex_unlock(&context->lock);
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return 0;
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}
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/*
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* For MMUv1 we don't add the suballoc region to the pagetables, as
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* those GPUs can only work with cmdbufs accessed through the linear
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* window. Instead we manufacture a mapping to make it look uniform
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* to the upper layers.
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*/
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if (context->global->version == ETNAVIV_IOMMU_V1) {
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mapping->iova = paddr - memory_base;
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} else {
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struct drm_mm_node *node = &mapping->vram_node;
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int ret;
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ret = etnaviv_iommu_find_iova(context, node, size);
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if (ret < 0) {
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mutex_unlock(&context->lock);
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return ret;
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}
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mapping->iova = node->start;
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ret = etnaviv_context_map(context, node->start, paddr, size,
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ETNAVIV_PROT_READ);
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if (ret < 0) {
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drm_mm_remove_node(node);
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mutex_unlock(&context->lock);
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return ret;
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}
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context->flush_seq++;
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}
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list_add_tail(&mapping->mmu_node, &context->mappings);
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mapping->use = 1;
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mutex_unlock(&context->lock);
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return 0;
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}
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void etnaviv_iommu_put_suballoc_va(struct etnaviv_iommu_context *context,
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struct etnaviv_vram_mapping *mapping)
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{
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struct drm_mm_node *node = &mapping->vram_node;
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mutex_lock(&context->lock);
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mapping->use--;
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if (mapping->use > 0 || context->global->version == ETNAVIV_IOMMU_V1) {
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mutex_unlock(&context->lock);
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return;
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}
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etnaviv_context_unmap(context, node->start, node->size);
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drm_mm_remove_node(node);
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mutex_unlock(&context->lock);
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}
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size_t etnaviv_iommu_dump_size(struct etnaviv_iommu_context *context)
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{
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return context->global->ops->dump_size(context);
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}
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void etnaviv_iommu_dump(struct etnaviv_iommu_context *context, void *buf)
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{
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context->global->ops->dump(context, buf);
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}
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int etnaviv_iommu_global_init(struct etnaviv_gpu *gpu)
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{
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enum etnaviv_iommu_version version = ETNAVIV_IOMMU_V1;
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struct etnaviv_drm_private *priv = gpu->drm->dev_private;
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struct etnaviv_iommu_global *global;
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struct device *dev = gpu->drm->dev;
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if (gpu->identity.minor_features1 & chipMinorFeatures1_MMU_VERSION)
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version = ETNAVIV_IOMMU_V2;
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if (priv->mmu_global) {
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if (priv->mmu_global->version != version) {
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dev_err(gpu->dev,
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"MMU version doesn't match global version\n");
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return -ENXIO;
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}
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priv->mmu_global->use++;
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return 0;
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}
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global = kzalloc(sizeof(*global), GFP_KERNEL);
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if (!global)
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return -ENOMEM;
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global->bad_page_cpu = dma_alloc_wc(dev, SZ_4K, &global->bad_page_dma,
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GFP_KERNEL);
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if (!global->bad_page_cpu)
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goto free_global;
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memset32(global->bad_page_cpu, 0xdead55aa, SZ_4K / sizeof(u32));
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if (version == ETNAVIV_IOMMU_V2) {
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global->v2.pta_cpu = dma_alloc_wc(dev, ETNAVIV_PTA_SIZE,
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&global->v2.pta_dma, GFP_KERNEL);
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if (!global->v2.pta_cpu)
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goto free_bad_page;
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}
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global->dev = dev;
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global->version = version;
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global->use = 1;
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mutex_init(&global->lock);
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if (version == ETNAVIV_IOMMU_V1)
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global->ops = &etnaviv_iommuv1_ops;
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else
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global->ops = &etnaviv_iommuv2_ops;
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priv->mmu_global = global;
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return 0;
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free_bad_page:
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dma_free_wc(dev, SZ_4K, global->bad_page_cpu, global->bad_page_dma);
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free_global:
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kfree(global);
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return -ENOMEM;
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}
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void etnaviv_iommu_global_fini(struct etnaviv_gpu *gpu)
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{
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struct etnaviv_drm_private *priv = gpu->drm->dev_private;
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struct etnaviv_iommu_global *global = priv->mmu_global;
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if (--global->use > 0)
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return;
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if (global->v2.pta_cpu)
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dma_free_wc(global->dev, ETNAVIV_PTA_SIZE,
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global->v2.pta_cpu, global->v2.pta_dma);
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if (global->bad_page_cpu)
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dma_free_wc(global->dev, SZ_4K,
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global->bad_page_cpu, global->bad_page_dma);
|
|
|
|
mutex_destroy(&global->lock);
|
|
kfree(global);
|
|
|
|
priv->mmu_global = NULL;
|
|
}
|