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fb19739d7f
On the first generation of Allwinner SoCs (A10-A31), the i2s controller was using the MCLK as BCLK parent. However, this changed since the introduction of the A83t and BCLK now uses the module clock as its parent. Let's introduce a hook to get the parent rate and use that in our divider calculations. Fixes: |
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.. | ||
Kconfig | ||
Makefile | ||
sun4i-codec.c | ||
sun4i-i2s.c | ||
sun4i-spdif.c | ||
sun8i-adda-pr-regmap.c | ||
sun8i-adda-pr-regmap.h | ||
sun8i-codec-analog.c | ||
sun8i-codec.c | ||
sun50i-codec-analog.c |